2026-03-02 01:31:22.028 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.244.20:5700'
2026-03-02 01:31:22.028 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.244.20:5802)
2026-03-02 01:31:22.028 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.244.20:5801)
2026-03-02 01:31:22.028 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.244.22:6700'
2026-03-02 01:31:22.028 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.244.22:6802)
2026-03-02 01:31:22.028 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.244.22:6801)
2026-03-02 01:31:22.028 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.244.20:5700/1'
2026-03-02 01:31:22.028 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.244.20:5804)
2026-03-02 01:31:22.028 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.244.20:5803)
2026-03-02 01:31:22.028 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.244.20:5700/2'
2026-03-02 01:31:22.028 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.244.20:5806)
2026-03-02 01:31:22.028 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.244.20:5805)
2026-03-02 01:31:22.028 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.244.20:5700/3'
2026-03-02 01:31:22.028 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.244.20:5808)
2026-03-02 01:31:22.028 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.244.20:5807)
2026-03-02 01:31:22.028 [INFO] fake_trx.py:429 Init complete
2026-03-02 01:31:22.028 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-03-02 01:31:22.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:22.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:22.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:22.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:22.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:22.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:26.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:26.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:26.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:26.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:26.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 0 -> 1
2026-03-02 01:31:26.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:31:26.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:31:26.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:26.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:26.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:26.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:31:26.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:26.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 0 -> 1
2026-03-02 01:31:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:26.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:31:26.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:31:26.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:26.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:26.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:26.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:31:26.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:26.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 0 -> 1
2026-03-02 01:31:26.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:26.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:26.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 0 -> 1
2026-03-02 01:31:26.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:31:26.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:31:26.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:31:26.558 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:31:26.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:26.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:26.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:31:27.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:31:27.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:27.099 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:31:27.101 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:31:27.103 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:31:27.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:27.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:27.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:27.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:27.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:27.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:27.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:27.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:27.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:27.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:27.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:27.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:27.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:27.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:31:27.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:27.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:27.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:27.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:27.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:27.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:27.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:27.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:27.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:27.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:27.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:27.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:27.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:27.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:27.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:27.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:27.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:27.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:31:28.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:28.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:28.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:28.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:28.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:28.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:28.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:28.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:28.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:28.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:28.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:28.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:28.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:28.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:31:28.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:28.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:28.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:28.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:28.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:28.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:28.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:28.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:28.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:28.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:28.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:28.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:28.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:28.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:28.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:28.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:28.928 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:31:28.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:28.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:28.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:28.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:28.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:29.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:29.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:29.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:29.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:29.401 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:31:29.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:29.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:29.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:29.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:29.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:29.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:29.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:29.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:29.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:29.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:29.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:29.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:29.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:29.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:29.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:31:30.347 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:31:30.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:30.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:30.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:30.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:30.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:30.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:30.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:30.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:30.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:30.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:30.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:30.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:30.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:30.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:30.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:30.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:30.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:30.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:30.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:30.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:30.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:30.819 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:31:31.292 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:31:31.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:31.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:31.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:31.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:31.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:31.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:31.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:31.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:31.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:31.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:31.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:31.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:31.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:31.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:31.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:31.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:31.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:31.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:31:31.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:31.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:31.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:31.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:31.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:31.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:31.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:31.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:31.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:31.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:31.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:31.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:32.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:32.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:31:32.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:32.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:32.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:32.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:32.710 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:31:32.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:32.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:33.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:33.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:33.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:33.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:33.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:33.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:33.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:33.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:33.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:33.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:33.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:33.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:31:33.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:33.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:33.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:33.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:33.655 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:31:34.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:34.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:34.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:34.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:34.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:34.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:34.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:34.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:34.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:34.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:34.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:34.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:34.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:34.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:34.127 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:31:34.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:34.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:34.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:34.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:34.599 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:31:34.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:34.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:34.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:34.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:34.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:34.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:34.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:34.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:34.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:34.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:34.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:34.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:34.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:35.072 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:31:35.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:35.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:35.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:35.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:35.544 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:31:35.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:35.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:35.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:35.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:35.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:35.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:35.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:35.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:35.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:35.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:35.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:35.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:36.016 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:31:36.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:36.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:36.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:36.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:36.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:36.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:36.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:36.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:36.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:36.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:36.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:36.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:36.490 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:31:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:36.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:36.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:36.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:36.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:36.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:36.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:36.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:36.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:36.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:36.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:36.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:36.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:36.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:36.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:36.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:36.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:36.962 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:31:37.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:37.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:37.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:37.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:37.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:37.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:37.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:37.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:37.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:37.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:37.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:37.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:37.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:37.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.434 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:31:37.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:37.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:37.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:37.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:37.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:37.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:37.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:37.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:37.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:37.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:37.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:37.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:37.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:37.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:37.905 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:31:38.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:38.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:38.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:38.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:38.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:38.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:38.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:38.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:38.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:38.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:38.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:38.376 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:31:38.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:38.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:38.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:38.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:38.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:38.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:38.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:38.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:38.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:38.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:38.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:38.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:38.848 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:31:38.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:38.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:38.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:38.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:38.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:39.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:39.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:39.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:39.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:39.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:39.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:39.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:39.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:39.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:39.321 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:31:39.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:39.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:39.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:39.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:39.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:39.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:39.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:39.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:39.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:39.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:39.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:39.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:31:39.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:31:39.794 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:31:39.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:39.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:31:39.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:31:39.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:39.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:40.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:31:40.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:40.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:40.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:40.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:40.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:40.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:40.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:40.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:40.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:40.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:40.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:40.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:40.251 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:31:40.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:45.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:45.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:45.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:45.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:45.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:45.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:45.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:45.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:45.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:45.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:45.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:31:45.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:31:45.273 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:31:45.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:45.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:45.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:45.274 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:31:45.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:45.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:31:45.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:45.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:31:45.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:31:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:45.276 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:45.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:45.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:31:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:45.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:31:45.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:45.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:45.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:31:45.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:45.280 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:31:45.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:31:45.281 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:31:45.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:45.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:31:45.762 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:31:45.808 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:31:45.810 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:31:45.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.812 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:31:45.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:45.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:45.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:45.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:45.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.229 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:31:46.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:46.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:46.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:46.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:46.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:46.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 01:31:46.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-03-02 01:31:47.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:31:47.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:47.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:47.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:47.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:47.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:31:47.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:47.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:47.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:47.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:47.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:47.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:47.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:47.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:47.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:47.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:47.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:47.645 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:31:47.646 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=517 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:47.646 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=517 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:47.646 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:47.646 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:47.646 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:47.646 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:52.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:52.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:52.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:52.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:52.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:52.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:52.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:52.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:52.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:52.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:52.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:31:52.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:31:52.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:31:52.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:52.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:52.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:52.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:31:52.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:52.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:31:52.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:52.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:31:52.666 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:31:52.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:52.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:52.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:52.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:31:52.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:52.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:31:52.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:52.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:31:52.669 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:31:52.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:52.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:52.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:52.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:31:52.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:52.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:31:52.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:31:52.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:31:52.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:31:52.674 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:31:52.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:52.679 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:31:53.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:31:53.195 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:31:53.198 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:31:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:53.199 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:31:53.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:53.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:53.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:53.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:53.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:53.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:53.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:53.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:53.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:53.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:53.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:53.247 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:31:53.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:53.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:53.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:53.247 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:58.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:58.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:58.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:58.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:58.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:58.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:58.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:58.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:58.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:58.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:31:58.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:31:58.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:31:58.260 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:31:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:58.260 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:58.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:58.261 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:31:58.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:31:58.261 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:31:58.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:58.263 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:31:58.263 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:31:58.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:58.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:31:58.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:31:58.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:58.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:31:58.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:58.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:31:58.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:31:58.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:31:58.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:31:58.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:31:58.270 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:31:58.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:31:58.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:31:58.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:31:58.274 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:31:58.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:31:58.789 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:31:58.790 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:31:58.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:31:58.792 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:31:58.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:31:58.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:31:58.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:31:58.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:31:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:31:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:31:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:31:58.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:31:58.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:31:58.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:31:58.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:31:58.814 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:31:58.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:31:58.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:31:58.814 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:58.814 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:58.814 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:58.814 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:58.814 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:31:58.814 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:03.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:32:03.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:32:03.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:32:03.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:32:03.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:32:03.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:32:03.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:32:03.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:32:03.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:03.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:32:03.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:32:03.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:32:03.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:32:03.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:32:03.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:03.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:32:03.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:32:03.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:32:03.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:32:03.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:03.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:32:03.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:32:03.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:32:03.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:03.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:32:03.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:32:03.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:32:03.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:32:03.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:03.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:32:03.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:32:03.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:32:03.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:03.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:32:03.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:32:03.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:32:03.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:32:03.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:32:03.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:32:03.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:32:03.846 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:32:03.846 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:03.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:03.851 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:32:04.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:32:04.368 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:32:04.369 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:32:04.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:04.371 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:32:04.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:04.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:04.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:04.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:04.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:32:04.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:32:04.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:32:04.478 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:32:04.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:32:04.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:32:04.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:32:04.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:04.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:04.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:04.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:04.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:04.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:32:09.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:32:09.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:32:09.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:32:09.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:32:09.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:32:09.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:32:09.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:32:09.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:32:09.492 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:09.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:32:09.492 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:32:09.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:32:09.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:32:09.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:32:09.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:09.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:32:09.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:32:09.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:32:09.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:32:09.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:09.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:32:09.497 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:32:09.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:32:09.497 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:09.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:32:09.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:32:09.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:32:09.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:32:09.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:09.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:32:09.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:32:09.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:32:09.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:32:09.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:32:09.500 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:32:09.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:32:09.500 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:32:09.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:32:09.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:32:09.502 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:32:09.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:09.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:32:09.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:32:09.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:32:10.030 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:32:10.032 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:32:10.034 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:32:10.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:10.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:10.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:10.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:10.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:10.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:10.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:10.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:10.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:10.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:10.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:10.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:10.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:10.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:10.457 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:32:10.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:10.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:10.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:10.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:10.929 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:32:11.403 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:32:11.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:11.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:11.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:11.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:32:12.347 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:32:12.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:12.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:12.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:12.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:12.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:32:13.289 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:32:13.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:13.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:13.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:13.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:13.762 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:32:14.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:14.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:14.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:14.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:14.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:14.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:14.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:14.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:14.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:14.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:14.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:14.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:14.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:14.234 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:32:14.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:14.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:14.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:14.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:14.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:14.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:32:14.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:32:14.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:32:14.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:32:14.706 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:32:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:32:15.652 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:32:16.124 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:32:16.595 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:32:17.066 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:32:17.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:32:18.012 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:32:18.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:18.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:18.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:18.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:18.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:18.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:18.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:18.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:18.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:18.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:18.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:18.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:18.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:18.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:18.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:18.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:18.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:18.484 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:32:18.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:18.955 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:32:19.426 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:32:19.899 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:32:20.371 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:32:20.844 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:32:21.317 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:32:21.789 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:32:22.261 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:32:22.732 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:32:22.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:22.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:22.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:22.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:22.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:22.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:22.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:22.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:22.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:22.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:22.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:22.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:22.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:22.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:22.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:22.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:22.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:23.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:23.205 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:32:23.678 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:32:24.150 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:32:24.621 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:32:25.095 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:32:25.567 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:32:26.039 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:32:26.510 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:32:26.984 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:32:27.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:27.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:27.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:27.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:27.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:27.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:27.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:27.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:27.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:27.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:27.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:27.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:27.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:27.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:27.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:27.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:27.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:27.456 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:32:27.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:27.929 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:32:28.403 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:32:28.875 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:32:29.349 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:32:29.821 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:32:30.294 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:32:30.768 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:32:31.240 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:32:31.711 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:32:31.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:31.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:31.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:31.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:31.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:31.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:31.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:31.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:31.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:31.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:31.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:31.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:31.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:31.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:31.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:31.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:32.182 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:32:32.655 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:32:32.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:33.128 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:32:33.601 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:32:34.074 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:32:34.547 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:32:35.019 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:32:35.493 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:32:35.965 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:32:36.438 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:32:36.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:36.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:36.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:36.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:36.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:36.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:36.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:36.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:36.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:36.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:36.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:36.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:36.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:36.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:36.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:36.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:36.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:36.908 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:32:37.382 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:32:37.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:37.855 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:32:38.327 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:32:38.801 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:32:39.273 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:32:39.746 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:32:40.219 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:32:40.692 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:32:41.164 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:32:41.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:41.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:41.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:41.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:41.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:41.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:41.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:41.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:41.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:41.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:41.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:41.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:41.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:41.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:41.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:41.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:41.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:41.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:41.637 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:32:42.110 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:32:42.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:42.582 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:32:43.053 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:32:43.524 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:32:43.995 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 01:32:44.468 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 01:32:44.941 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 01:32:45.413 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 01:32:45.884 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 01:32:46.357 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 01:32:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:46.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:46.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:46.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:46.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:46.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:46.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:46.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:46.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:46.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:46.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:46.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:46.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:46.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:46.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:46.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:46.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:46.830 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 01:32:47.302 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 01:32:47.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:47.776 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 01:32:48.248 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 01:32:48.720 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 01:32:49.191 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 01:32:49.664 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 01:32:50.137 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 01:32:50.609 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 01:32:51.080 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 01:32:51.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:51.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:51.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:51.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:51.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:51.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:51.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:51.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:51.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:51.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:51.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:51.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:32:51.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:51.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:51.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:51.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:51.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:51.553 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 01:32:52.026 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 01:32:52.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:52.498 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 01:32:52.972 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 01:32:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 01:32:53.917 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 01:32:54.388 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 01:32:54.861 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 01:32:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 01:32:55.806 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 01:32:56.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:56.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:56.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:56.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:56.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:32:56.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:32:56.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:32:56.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:56.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:56.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:56.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:32:56.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:32:56.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:56.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:32:56.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:32:56.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:56.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:32:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 01:32:56.752 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 01:32:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:32:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 01:32:57.699 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 01:32:58.171 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 01:32:58.645 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 01:32:59.117 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 01:32:59.589 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 01:33:00.060 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 01:33:00.531 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 01:33:00.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:00.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:00.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:00.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:00.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:00.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:00.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:00.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:00.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:00.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:00.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:00.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:00.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:00.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:00.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:00.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:00.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:01.004 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 01:33:01.477 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 01:33:01.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:01.949 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 01:33:02.420 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 01:33:02.891 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 01:33:03.361 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 01:33:03.832 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 01:33:04.303 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 01:33:04.776 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 01:33:05.249 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 01:33:05.721 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 01:33:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:05.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:05.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:05.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:05.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:05.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:05.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:05.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:05.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:05.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:05.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:05.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:05.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:05.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:05.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:05.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:05.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:05.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:06.192 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 01:33:06.665 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 01:33:07.138 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 01:33:07.610 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 01:33:08.084 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 01:33:08.556 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 01:33:09.028 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 01:33:09.499 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 01:33:09.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:09.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:09.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:09.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:09.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:09.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:09.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:09.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:09.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:09.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:09.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:09.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:09.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:09.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:09.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:09.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:09.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:09.972 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 01:33:10.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:10.444 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 01:33:10.916 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 01:33:11.387 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 01:33:11.861 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 01:33:12.333 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 01:33:12.805 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 01:33:13.276 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 01:33:13.749 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 01:33:14.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:14.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:14.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:14.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:14.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:14.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:14.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:14.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:14.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:14.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:14.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:14.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:14.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:14.222 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 01:33:14.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:14.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:14.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:14.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:14.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:14.694 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 01:33:15.168 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 01:33:15.640 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 01:33:16.112 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 01:33:16.586 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 01:33:17.058 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 01:33:17.530 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 01:33:18.001 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 01:33:18.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:18.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:18.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:18.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:18.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:18.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:18.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:18.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:18.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:18.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:18.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:18.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:18.473 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 01:33:18.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:18.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:18.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:18.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:18.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:18.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:18.947 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 01:33:19.419 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 01:33:19.891 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 01:33:20.364 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 01:33:20.836 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 01:33:21.307 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 01:33:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 01:33:22.253 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 01:33:22.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:22.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:22.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:22.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:22.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:22.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:22.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:22.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:22.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:22.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:22.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:22.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:22.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:22.724 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 01:33:22.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:22.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:22.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:22.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:23.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:23.196 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 01:33:23.669 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 01:33:24.141 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 01:33:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 01:33:25.084 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 01:33:25.558 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 01:33:26.030 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 01:33:26.502 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 01:33:26.976 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 01:33:27.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:27.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:27.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:27.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:27.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:27.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:27.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:27.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:27.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:27.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:27.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:27.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:27.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:27.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:27.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:27.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:27.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:27.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:27.448 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 01:33:27.920 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 01:33:28.391 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 01:33:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 01:33:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 01:33:29.808 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 01:33:30.280 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 01:33:30.753 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 01:33:31.226 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 01:33:31.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:31.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:31.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:31.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:31.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:31.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:31.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:31.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:31.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:31.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:31.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:31.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:31.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:31.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:31.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:31.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:31.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:31.698 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 01:33:32.169 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 01:33:32.640 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 01:33:33.113 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 01:33:33.585 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 01:33:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 01:33:34.528 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 01:33:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 01:33:35.474 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-02 01:33:35.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:35.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:35.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:35.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:35.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:35.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:35.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:35.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:35.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:35.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:35.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:35.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:35.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:35.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:35.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:35.946 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-02 01:33:36.417 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-02 01:33:36.891 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-02 01:33:37.363 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-02 01:33:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-02 01:33:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-02 01:33:38.779 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-02 01:33:39.252 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-02 01:33:39.724 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-02 01:33:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:39.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:39.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:39.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:39.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:39.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:39.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:39.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:39.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:33:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:33:39.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:33:39.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:33:39.944 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:33:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19531 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19531 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19531 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19531 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:39.945 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19532 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:44.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:33:44.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:33:44.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:33:44.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:33:44.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:33:44.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:44.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:44.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:33:44.957 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:44.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:33:44.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:33:44.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:33:44.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:33:44.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:44.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:33:44.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:33:44.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:33:44.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:44.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:33:44.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:33:44.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:33:44.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:33:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:33:44.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:33:44.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:33:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:33:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:33:44.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:33:44.969 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:33:44.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:33:44.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:33:44.970 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:33:49.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:33:49.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:33:49.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:33:49.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:33:49.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:49.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:49.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:33:49.986 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:49.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:33:49.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:33:49.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:33:49.989 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:33:49.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:33:49.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:49.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:33:49.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:33:49.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:33:49.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:33:49.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:49.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:33:49.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:33:49.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:33:49.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:49.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:33:49.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:33:49.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:33:49.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:33:49.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:33:49.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:33:49.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:33:49.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:33:49.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:33:49.997 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:33:49.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:50.001 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:33:50.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:33:50.516 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:33:50.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:50.519 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:33:50.521 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:33:50.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:50.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:50.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:50.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:50.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:50.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:50.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:50.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:50.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:50.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:50.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:50.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:50.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:50.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:50.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:50.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:50.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:50.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:50.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:50.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:50.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:50.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:50.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:50.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:33:50.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:51.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:51.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:51.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:51.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:51.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:51.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:51.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:51.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:51.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:51.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:51.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:51.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:51.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:51.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:51.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:51.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:51.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:51.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:51.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:51.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:51.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:51.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:51.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:51.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:51.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:51.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:51.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:33:51.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:51.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:51.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:51.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:51.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:51.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:51.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:51.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:51.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:51.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:51.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:51.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:51.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:51.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:33:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:51.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:51.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:51.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:51.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:52.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:52.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:52.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:52.365 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:33:52.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:52.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:52.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:52.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:52.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:52.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:52.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:52.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:52.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:52.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:52.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:52.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:52.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:52.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.838 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:33:52.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:52.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:52.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:52.941 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=637 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:52.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:52.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:52.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:52.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:52.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:52.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:52.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:52.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:53.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:53.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:53.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:53.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:53.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:53.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:53.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:53.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:53.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:53.311 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:33:53.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:53.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:53.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:53.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:53.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:53.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:53.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:53.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:53.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:53.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:53.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:53.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:53.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:53.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:53.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:53.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:53.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:53.783 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:33:54.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:54.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:54.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:54.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:54.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:54.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:54.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:54.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:54.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:54.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:54.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:54.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:54.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:54.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:54.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.255 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:33:54.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:54.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:54.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:54.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:54.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:54.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:54.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:54.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:54.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:54.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:33:54.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:54.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:54.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:54.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:54.728 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:33:55.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:55.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:33:55.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:55.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:55.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:55.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:55.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:55.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:55.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:55.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:55.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:55.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:55.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:55.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:55.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:55.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:55.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:55.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:55.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:55.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:33:55.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:55.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:55.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:55.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:55.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:55.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:55.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:55.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:55.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:55.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:55.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:55.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:56.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:56.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:56.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:56.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.147 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:33:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:56.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:56.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:56.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:56.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:56.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:56.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:56.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:56.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:56.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:56.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:56.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:56.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:56.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.619 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:33:56.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:56.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:56.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:56.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:56.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:56.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:56.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:56.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:56.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:56.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:56.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:56.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:56.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:56.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:56.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.090 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:33:57.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:57.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:57.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:57.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:57.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:57.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:57.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:57.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:57.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:57.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:57.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:57.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:57.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:57.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.560 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:33:57.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:57.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:57.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:57.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:57.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:57.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:57.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:57.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:57.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:57.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:57.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:57.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:57.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:57.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:57.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.031 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:33:58.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:58.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:58.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:58.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:58.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:58.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:58.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:58.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:58.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:58.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:58.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:58.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:58.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:58.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:58.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:58.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:58.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:58.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:58.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:58.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:58.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:58.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:58.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:58.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:58.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:58.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:58.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.504 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:33:58.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:58.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:58.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:58.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:58.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:58.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:58.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:58.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:58.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:58.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:58.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:58.977 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:33:58.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:58.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:58.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:58.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:59.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:59.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:59.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:59.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:59.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:59.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:59.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:33:59.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:59.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:59.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:59.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:33:59.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:33:59.448 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:33:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:59.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:33:59.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:33:59.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:59.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:59.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:33:59.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:33:59.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:33:59.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:33:59.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:33:59.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:33:59.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:33:59.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:33:59.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:33:59.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:33:59.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:33:59.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:33:59.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:33:59.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:33:59.912 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:33:59.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:59.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:33:59.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:34:04.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:34:04.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:34:04.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:34:04.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:34:04.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:34:04.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:34:04.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:34:04.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:34:04.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:04.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:34:04.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:34:04.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:34:04.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:34:04.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:34:04.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:04.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:34:04.931 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:34:04.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:34:04.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:34:04.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:04.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:34:04.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:34:04.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:34:04.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:04.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:34:04.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:34:04.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:34:04.937 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:34:04.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:04.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:34:04.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:34:04.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:34:04.941 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:04.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:34:04.941 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:34:04.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:34:04.941 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:34:04.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:04.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:34:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:34:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:34:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:34:04.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:34:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:34:04.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:34:04.947 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:34:04.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:04.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:34:05.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:34:05.483 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:34:05.485 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:34:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:05.489 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:34:05.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:05.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:05.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:05.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:05.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:05.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:05.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:05.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:05.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:05.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:05.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:05.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:05.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:05.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:34:05.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:05.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:05.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:05.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:06.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:06.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:34:06.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:06.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:06.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:06.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:06.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:06.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:06.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:06.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:06.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:06.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:06.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:06.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:06.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:06.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:06.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:06.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:06.847 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:34:06.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:07.320 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:34:07.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:07.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:07.792 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:34:07.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:07.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:07.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:07.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:08.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:08.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:08.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:08.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:08.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:08.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:08.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:08.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:08.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:08.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:08.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:08.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:08.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:08.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:08.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:08.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:08.263 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:34:08.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:08.734 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:34:08.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:08.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:08.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:08.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:09.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:09.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:09.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:09.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:09.172 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=913 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:34:09.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:09.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:09.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:09.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:09.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:09.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:09.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:09.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:09.206 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:34:09.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:09.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:09.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:09.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:09.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:09.679 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:34:09.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:09.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:09.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:09.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:10.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:10.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:34:10.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:10.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:10.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:10.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:34:10.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:10.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:10.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:10.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:10.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:10.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:10.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:10.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:10.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:10.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:10.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:10.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:10.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:34:11.570 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:34:11.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:11.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:12.043 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:34:12.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:12.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:12.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:12.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:12.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:12.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:12.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:12.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:12.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:12.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:12.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:12.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:12.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:12.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:12.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:12.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:12.516 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:34:12.988 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:34:13.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:13.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:13.462 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:34:13.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:13.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:13.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:13.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:13.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:13.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:13.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:13.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:13.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:13.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:13.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:13.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:13.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:13.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:13.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:13.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:13.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:13.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:34:14.407 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:34:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:14.880 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:34:15.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:15.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:15.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:15.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:15.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:15.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:15.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:15.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:15.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:15.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:15.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:15.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:15.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:15.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:15.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:15.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:15.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:15.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:15.353 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:34:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:34:16.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:16.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:16.299 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:34:16.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:16.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:16.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:16.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:16.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:16.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:16.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:16.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:16.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:16.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:16.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:16.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:16.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:16.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:16.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:16.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:16.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:16.771 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:34:17.243 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:34:17.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:17.713 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:34:17.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:18.184 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:34:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:18.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:18.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:18.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:18.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:18.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:18.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:18.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:18.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:18.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:18.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:18.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:18.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:18.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:18.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:18.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:18.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:18.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:18.657 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:34:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:34:19.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:19.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:34:20.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:20.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:20.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:20.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:20.076 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:34:20.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:20.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:20.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:20.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:20.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:20.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:20.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:20.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:20.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:20.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:20.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:20.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:20.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:20.548 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:34:21.021 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:34:21.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:21.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:21.494 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:34:21.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:21.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:21.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:21.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:21.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:21.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:21.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:21.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:21.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:21.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:21.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:21.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:21.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:21.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:21.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:21.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:21.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:21.966 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:34:22.438 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:34:22.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:22.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:22.908 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:34:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:23.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:23.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:23.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:23.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:23.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:23.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:23.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:23.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:23.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:23.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:23.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:23.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:23.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:23.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:23.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:23.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:34:23.850 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:34:24.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:24.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:24.323 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:34:24.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:24.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:24.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:24.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:24.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:24.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:24.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:24.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:24.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:24.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:24.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:24.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:24.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:24.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:24.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:24.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:24.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:24.795 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:34:25.267 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:34:25.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:25.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:25.738 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:34:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:25.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:25.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:25.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:25.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:25.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:25.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:25.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:25.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:25.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:25.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:25.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:25.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:25.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:25.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:25.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:25.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:34:26.684 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:34:26.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:26.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:27.156 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:34:27.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:27.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:27.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:27.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:27.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:27.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:27.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:27.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:27.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:27.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:27.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:27.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:27.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:27.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:27.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:27.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:27.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:27.627 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:34:28.097 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:34:28.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:28.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:28.571 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:34:28.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:28.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:28.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:28.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:28.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:28.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:28.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:28.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:28.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:28.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:28.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:28.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:28.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:28.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:28.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:28.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:28.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:29.043 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:34:29.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:29.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:29.515 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:34:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:29.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:29.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:29.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:29.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:29.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:29.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:29.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:29.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:29.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:29.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:29.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:29.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:34:29.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:29.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:29.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:29.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:30.459 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:34:30.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:30.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:30.932 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:34:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:31.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:31.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:31.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:31.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:31.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:31.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:31.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:31.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:31.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:31.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:31.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:31.403 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:34:31.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:31.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:31.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:31.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:31.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:31.875 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:34:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:32.345 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:34:32.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:32.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:32.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:32.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:32.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:32.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:32.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:32.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:32.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:32.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:32.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:32.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:32.818 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:34:32.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:32.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:32.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:32.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:32.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:33.291 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:34:33.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:33.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:33.763 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:34:34.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:34.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:34.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:34.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:34.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:34.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:34:34.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:34:34.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:34:34.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:34:34.221 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:34:34.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:34:34.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:34:39.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:34:39.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:34:39.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:34:39.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:34:39.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:34:39.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:34:39.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:34:39.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:34:39.236 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:39.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:34:39.236 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:34:39.239 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:34:39.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:34:39.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:34:39.240 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:39.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:34:39.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:34:39.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:34:39.241 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:34:39.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:39.243 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:34:39.243 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:34:39.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:34:39.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:39.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:34:39.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:34:39.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:34:39.244 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:34:39.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:34:39.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:34:39.246 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:34:39.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:39.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.250 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:34:39.250 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:34:39.250 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:34:39.250 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:34:39.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:34:39.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:34:39.255 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:34:39.734 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:34:39.781 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:34:39.782 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:34:39.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:39.783 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:34:39.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:39.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:39.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:39.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:39.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:39.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:39.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:39.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:39.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:39.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:39.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:39.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:39.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:40.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:34:40.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:40.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:40.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:40.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:40.678 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:34:41.151 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:34:41.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:41.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:41.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:41.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:41.624 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:34:42.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:34:42.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:42.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:42.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:42.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:42.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:34:43.040 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:34:43.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:43.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:43.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:43.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:43.513 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:34:43.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:43.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:43.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:43.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:43.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:43.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:43.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:43.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:43.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:43.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:43.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:43.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:43.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:43.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:43.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:43.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:43.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:43.985 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:34:44.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:34:44.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:34:44.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:34:44.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:34:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:34:44.929 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:34:45.402 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:34:45.874 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:34:46.345 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:34:46.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:34:47.291 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:34:47.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:34:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:47.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:47.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:47.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:48.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:48.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:48.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:48.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:48.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:48.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:48.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:48.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:48.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:48.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:48.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:48.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:48.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:34:48.705 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:34:49.178 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:34:49.650 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:34:50.122 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:34:50.593 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:34:51.067 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:34:51.539 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:34:51.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:51.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:51.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:51.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:51.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:51.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:51.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:51.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:51.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:51.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:51.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:52.011 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:34:52.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:52.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:52.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:52.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:52.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:52.482 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:34:52.956 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:34:53.428 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:34:53.900 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:34:54.371 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:34:54.844 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:34:55.317 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:34:55.789 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:34:56.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:56.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:56.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:56.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:56.260 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:34:56.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:34:56.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:34:56.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:34:56.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:56.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:56.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:56.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:34:56.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:34:56.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:34:56.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:34:56.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:34:56.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:56.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:34:56.731 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:34:57.204 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:34:57.677 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:34:58.149 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:34:58.620 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:34:59.094 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:34:59.566 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:35:00.039 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:35:00.509 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:35:00.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:00.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:00.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:00.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:00.916 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=4680 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:35:00.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:00.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:00.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:00.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:00.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:00.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:00.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:00.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:00.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:00.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:00.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:00.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:00.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:00.982 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:35:01.455 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:35:01.927 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:35:02.398 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:35:02.869 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:35:03.343 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:35:03.816 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:35:04.289 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:35:04.762 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:35:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:35:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:05.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:05.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:05.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:05.313 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=5629 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:35:05.313 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=5629 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:35:05.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:05.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:05.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:05.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:05.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:05.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:05.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:05.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:05.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:05.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:05.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:05.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:05.707 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:35:06.180 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:35:06.652 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:35:07.126 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:35:07.598 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:35:08.071 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:35:08.545 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:35:09.017 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:35:09.491 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:35:09.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:09.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:09.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:09.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:09.710 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=6578 tn=2 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:35:09.710 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=6578 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:35:09.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:09.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:09.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:09.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:09.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:09.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:09.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:09.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:09.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:35:09.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:09.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:09.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:09.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:09.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:09.963 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:35:10.436 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:35:10.909 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:35:11.382 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:35:11.854 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:35:12.325 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:35:12.798 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:35:13.271 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:35:13.743 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 01:35:14.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:14.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:14.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:14.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:14.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:14.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:14.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:14.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:14.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:14.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:14.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:14.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:14.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:14.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:14.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:14.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:14.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:14.215 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 01:35:14.688 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 01:35:15.161 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 01:35:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 01:35:16.102 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 01:35:16.573 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 01:35:17.044 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 01:35:17.517 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 01:35:17.990 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 01:35:18.462 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 01:35:18.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:18.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:18.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:18.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:18.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:18.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:18.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:18.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:18.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:18.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:18.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:18.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:18.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:35:18.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:18.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:18.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:18.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:18.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:18.933 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 01:35:19.407 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 01:35:19.879 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 01:35:20.352 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 01:35:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 01:35:21.298 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 01:35:21.772 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 01:35:22.244 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 01:35:22.717 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 01:35:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:22.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:22.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:22.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:22.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:22.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:22.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:22.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:22.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:22.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:22.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:22.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:22.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:22.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:22.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:22.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:23.187 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 01:35:23.658 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 01:35:24.132 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 01:35:24.605 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 01:35:25.077 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 01:35:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 01:35:26.023 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 01:35:26.495 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 01:35:26.969 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 01:35:27.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:27.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:27.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:27.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:27.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:27.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:27.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:27.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:27.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:27.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:27.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:27.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:27.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:27.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:27.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:27.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:27.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:27.441 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 01:35:27.913 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 01:35:28.385 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 01:35:28.859 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 01:35:29.331 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 01:35:29.802 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 01:35:30.275 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 01:35:30.748 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 01:35:31.220 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 01:35:31.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:31.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:31.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:31.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:31.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:31.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:31.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:31.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:31.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:31.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:31.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:31.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:31.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:31.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:31.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:31.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:31.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 01:35:32.162 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 01:35:32.635 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 01:35:33.108 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 01:35:33.580 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 01:35:34.050 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 01:35:34.524 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 01:35:34.996 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 01:35:35.468 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 01:35:35.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:35.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:35.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:35.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:35.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:35.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:35.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:35.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:35.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:35.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:35.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:35.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:35.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:35.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:35.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:35.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:35.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:35.939 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 01:35:36.410 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 01:35:36.883 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 01:35:37.356 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 01:35:37.828 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 01:35:38.299 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 01:35:38.772 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 01:35:39.245 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 01:35:39.717 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 01:35:39.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:39.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:39.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:39.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:39.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:39.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:39.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:39.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:39.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:39.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:39.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:39.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:39.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:39.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:39.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:39.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:39.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 01:35:40.661 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 01:35:41.134 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 01:35:41.606 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 01:35:42.077 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 01:35:42.550 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 01:35:43.022 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 01:35:43.494 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 01:35:43.965 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 01:35:44.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:44.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:44.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:44.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:44.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:44.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:44.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:44.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:44.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:44.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:44.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:44.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:44.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:44.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:44.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:44.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:44.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:44.438 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 01:35:44.911 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 01:35:45.383 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 01:35:45.856 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 01:35:46.329 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 01:35:46.801 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 01:35:47.272 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 01:35:47.745 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 01:35:48.218 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 01:35:48.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:48.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:48.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:48.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:48.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:48.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:48.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:48.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:48.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:48.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:48.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:48.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:48.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:48.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:48.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:48.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:48.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:48.690 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 01:35:49.161 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 01:35:49.634 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 01:35:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 01:35:50.579 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 01:35:51.050 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 01:35:51.520 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 01:35:51.994 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 01:35:52.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:52.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:52.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:52.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:52.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:52.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:52.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:52.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:52.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:52.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:52.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:52.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:52.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:52.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:52.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:52.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:52.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:52.466 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 01:35:52.938 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 01:35:53.409 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 01:35:53.883 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 01:35:54.355 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 01:35:54.827 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 01:35:55.298 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 01:35:55.772 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 01:35:56.244 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 01:35:56.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:56.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:56.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:56.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:56.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:35:56.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:35:56.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:35:56.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:56.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:56.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:56.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:35:56.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:35:56.715 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 01:35:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:35:56.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:35:56.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:35:56.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:56.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:35:57.188 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 01:35:57.661 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 01:35:58.133 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 01:35:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 01:35:59.075 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 01:35:59.549 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 01:36:00.021 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 01:36:00.493 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 01:36:00.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:00.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:00.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:00.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:00.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:00.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:00.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:00.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:00.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:00.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:00.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:00.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:00.966 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 01:36:00.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:00.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:00.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:00.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:00.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:01.438 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 01:36:01.910 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 01:36:02.384 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 01:36:02.856 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 01:36:03.328 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 01:36:03.801 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 01:36:04.274 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 01:36:04.746 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 01:36:05.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:05.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:05.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:05.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:05.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:05.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:05.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:05.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:05.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:36:05.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:36:05.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:36:05.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:36:05.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:36:05.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:36:05.215 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:36:05.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:36:05.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:36:05.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:36:05.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:36:05.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:36:05.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:36:10.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:36:10.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:36:10.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:36:10.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:36:10.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:36:10.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:36:10.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:36:10.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:36:10.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:10.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:36:10.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:36:10.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:36:10.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:36:10.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:36:10.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:10.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:36:10.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:36:10.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:36:10.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:36:10.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:36:10.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:36:10.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:36:10.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:36:10.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:36:10.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:36:10.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:10.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:36:10.228 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:36:10.228 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:36:10.228 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:10.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:36:10.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:36:10.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:36:10.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:36:10.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:36:10.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:36:10.229 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:36:15.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:36:15.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:36:15.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:36:15.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:36:15.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:36:15.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:36:15.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:36:15.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:36:15.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:15.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:36:15.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:36:15.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:36:15.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:36:15.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:36:15.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:15.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:36:15.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:36:15.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:36:15.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:36:15.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:15.253 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:36:15.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:36:15.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:36:15.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:15.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:36:15.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:36:15.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:36:15.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:36:15.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:36:15.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:36:15.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:36:15.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:15.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:36:15.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:36:15.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:36:15.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:36:15.262 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:36:15.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:15.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:36:15.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:36:15.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:36:15.787 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:36:15.789 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:36:15.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:15.792 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:36:15.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:15.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:15.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:15.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:15.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:15.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:15.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:15.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:15.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:15.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:15.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:15.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:15.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:16.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:36:16.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:16.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:16.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:16.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:16.690 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:36:17.164 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:36:17.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:17.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:17.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:17.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:17.636 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:36:18.108 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:36:18.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:18.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:18.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:18.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:18.581 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:36:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:36:19.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:19.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:19.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:19.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:19.526 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:36:19.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:19.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:19.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:19.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:19.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:19.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:19.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:19.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:19.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:19.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:19.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:19.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:19.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:19.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:19.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:19.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:19.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:19.999 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:36:20.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:36:20.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:36:20.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:36:20.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:36:20.472 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:36:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:36:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:36:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:36:22.361 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:36:22.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:36:23.304 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:36:23.777 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:36:24.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:24.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:24.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:24.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:24.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:24.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:24.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:24.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:24.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:24.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:24.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:24.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:24.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:24.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:24.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:24.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:24.249 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:36:24.721 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:36:25.192 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:36:25.666 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:36:26.138 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:36:26.610 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:36:27.081 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:36:27.554 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:36:28.027 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:36:28.499 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:36:28.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:28.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:28.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:28.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:28.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:28.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:28.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:28.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:28.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:28.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:28.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:28.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:28.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:28.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:28.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:28.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:28.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:28.970 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:36:29.444 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:36:29.916 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:36:30.388 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:36:30.859 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:36:31.333 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:36:31.805 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:36:32.277 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:36:32.751 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:36:32.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:32.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:32.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:32.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:32.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:32.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:32.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:32.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:32.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:32.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:32.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:32.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:32.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:32.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:32.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:32.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:33.223 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:36:33.696 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:36:34.169 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:36:34.641 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:36:35.114 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:36:35.585 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:36:36.058 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:36:36.531 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:36:37.003 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:36:37.477 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:36:37.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:37.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:37.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:37.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:37.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:37.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:37.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:37.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:37.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:37.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:37.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:37.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:37.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:37.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:37.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:37.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:37.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:37.949 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:36:38.422 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:36:38.895 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:36:39.368 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:36:39.840 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:36:40.314 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:36:40.787 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:36:41.259 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:36:41.733 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:36:42.205 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:36:42.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:42.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:42.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:42.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:42.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:42.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:42.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:42.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:42.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:42.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:42.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:42.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:42.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:42.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:42.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:42.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:42.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:42.678 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:36:43.149 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:36:43.623 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:36:44.095 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:36:44.566 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:36:45.039 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:36:45.512 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:36:45.985 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:36:46.458 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:36:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:36:47.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:47.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:47.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:47.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:47.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:47.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:47.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:47.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:47.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:47.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:47.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:47.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:47.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:47.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:47.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:47.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:47.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:47.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:47.403 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:36:47.874 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:36:48.344 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:36:48.815 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:36:49.286 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:36:49.757 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 01:36:50.230 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 01:36:50.703 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 01:36:51.175 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 01:36:51.646 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 01:36:52.120 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 01:36:52.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:52.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:52.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:52.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:52.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:52.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:52.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:52.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:52.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:52.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:52.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:52.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:52.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:52.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:52.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:52.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:52.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:52.592 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 01:36:53.064 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 01:36:53.538 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 01:36:54.010 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 01:36:54.482 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 01:36:54.956 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 01:36:55.429 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 01:36:55.901 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 01:36:56.372 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 01:36:56.842 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 01:36:57.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:57.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:57.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:57.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:57.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:36:57.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:36:57.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:36:57.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:57.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:57.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:57.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:36:57.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:36:57.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:36:57.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:36:57.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:36:57.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:36:57.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:57.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:36:57.313 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 01:36:57.787 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 01:36:58.259 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 01:36:58.731 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 01:36:59.205 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 01:36:59.678 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 01:37:00.152 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 01:37:00.624 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 01:37:01.095 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 01:37:01.569 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 01:37:01.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:01.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:01.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:01.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:01.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:01.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:01.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:01.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:01.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:01.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:01.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:01.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:01.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:01.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:01.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:01.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:01.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:02.041 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 01:37:02.513 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 01:37:02.987 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 01:37:03.459 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 01:37:03.930 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 01:37:04.404 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 01:37:04.877 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 01:37:05.349 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 01:37:05.823 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 01:37:06.295 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 01:37:06.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:06.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:06.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:06.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:06.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:06.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:06.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:06.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:06.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:06.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:06.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:06.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:06.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:06.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:06.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:06.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:06.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:06.767 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 01:37:07.238 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 01:37:07.712 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 01:37:08.184 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 01:37:08.656 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 01:37:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 01:37:09.602 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 01:37:10.075 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 01:37:10.548 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 01:37:11.021 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 01:37:11.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:11.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:11.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:11.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:11.493 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 01:37:11.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:11.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:11.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:11.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:11.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:11.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:11.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:11.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:11.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:11.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:11.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:11.964 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 01:37:12.438 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 01:37:12.910 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 01:37:13.382 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 01:37:13.853 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 01:37:14.324 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 01:37:14.797 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 01:37:15.269 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 01:37:15.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:15.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:15.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:15.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:15.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:15.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:15.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:15.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:15.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:15.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:15.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:15.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:15.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:15.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:15.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:15.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:15.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:15.741 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 01:37:16.212 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 01:37:16.686 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 01:37:17.158 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 01:37:17.630 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 01:37:18.101 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 01:37:18.574 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 01:37:19.047 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 01:37:19.519 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 01:37:19.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:19.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:19.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:19.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:19.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:19.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:19.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:19.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:19.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:19.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:19.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:19.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:19.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:19.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:19.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:19.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:19.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:19.992 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 01:37:20.465 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 01:37:20.937 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 01:37:21.408 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 01:37:21.881 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 01:37:22.354 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 01:37:22.825 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 01:37:23.297 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 01:37:23.771 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 01:37:24.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:24.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:24.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:24.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:24.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:24.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:24.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:24.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:24.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:24.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:24.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:24.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:24.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:24.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:24.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:24.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:24.242 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 01:37:24.714 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 01:37:25.188 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 01:37:25.660 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 01:37:26.132 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 01:37:26.603 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 01:37:27.077 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 01:37:27.549 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 01:37:28.021 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 01:37:28.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:28.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:28.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:28.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:28.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:28.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:28.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:28.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:28.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:28.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:28.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:28.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:28.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:28.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:28.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:28.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:28.492 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 01:37:28.963 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 01:37:29.436 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 01:37:29.909 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 01:37:30.381 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 01:37:30.852 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 01:37:31.325 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 01:37:31.797 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 01:37:32.269 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 01:37:32.743 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 01:37:32.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:32.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:32.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:32.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:32.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:32.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:32.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:32.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:32.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:32.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:32.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:32.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:32.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:32.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:32.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:32.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:32.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:33.215 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 01:37:33.687 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 01:37:34.161 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 01:37:34.633 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 01:37:35.106 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 01:37:35.579 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 01:37:36.051 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 01:37:36.523 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 01:37:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 01:37:37.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:37.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:37.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:37.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:37.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:37.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:37.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:37.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:37.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:37.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:37.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:37.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:37.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:37.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:37.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:37.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:37.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:37.467 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 01:37:37.940 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 01:37:38.412 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 01:37:38.883 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 01:37:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 01:37:39.825 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 01:37:40.298 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 01:37:40.770 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 01:37:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-02 01:37:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:41.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:41.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:41.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:41.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:41.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:41.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:41.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:41.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:41.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:41.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:41.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:41.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:41.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:41.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:41.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:41.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:41.713 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-02 01:37:42.186 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-02 01:37:42.659 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-02 01:37:43.131 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-02 01:37:43.602 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-02 01:37:44.073 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-02 01:37:44.546 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-02 01:37:45.018 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-02 01:37:45.490 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-02 01:37:45.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:45.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:45.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:45.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:45.634 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=19515 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:37:45.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:37:45.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:37:45.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:37:45.644 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:37:50.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:37:50.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:37:50.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:37:50.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:37:50.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:37:50.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:37:50.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:37:50.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:37:50.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:50.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:37:50.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:37:50.663 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:37:50.663 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:37:50.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:37:50.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:50.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:37:50.664 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:37:50.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:37:50.665 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:37:50.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:50.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:37:50.666 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:37:50.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:37:50.667 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:50.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:37:50.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:37:50.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:37:50.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:37:50.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:50.668 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:37:50.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:37:50.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:37:50.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:50.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:37:50.669 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:37:50.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:37:50.669 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:37:50.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:50.671 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:37:50.671 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:37:50.671 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:37:50.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:37:50.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:37:50.672 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:50.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:50.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:37:55.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:37:55.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:37:55.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:37:55.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:37:55.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:37:55.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:37:55.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:37:55.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:55.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:37:55.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:37:55.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:37:55.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:37:55.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:37:55.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:55.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:37:55.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:37:55.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:37:55.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:37:55.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:55.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:37:55.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:37:55.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:37:55.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:55.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:37:55.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:37:55.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:37:55.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:37:55.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:55.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:37:55.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:37:55.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:37:55.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:37:55.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:37:55.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:37:55.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:37:55.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:37:55.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:37:55.699 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:37:55.699 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:37:55.699 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:37:55.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:37:55.704 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:37:56.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:37:56.224 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:37:56.226 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:37:56.228 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:37:56.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:56.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:56.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:56.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:56.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:56.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:56.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:56.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:56.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:56.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:56.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:56.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:56.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:56.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:56.654 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:37:56.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:56.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:56.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:56.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:57.125 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:37:57.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:57.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:57.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:57.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:57.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:57.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:57.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:57.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:57.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:57.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:57.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:57.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:57.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:57.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:57.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:57.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:57.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:57.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:37:57.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:57.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:57.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:57.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:58.071 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:37:58.543 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:37:58.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:58.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:58.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:58.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:58.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:58.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:58.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:58.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:58.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:58.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:58.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:58.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:58.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:58.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:58.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:58.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:58.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:58.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:58.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:58.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:58.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:59.014 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:37:59.485 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:37:59.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:37:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:37:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:37:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:37:59.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:37:59.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:59.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:59.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:59.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:37:59.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:37:59.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:37:59.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:37:59.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:37:59.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:37:59.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:37:59.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:37:59.958 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:37:59.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:00.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:00.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:00.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:00.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:00.431 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:38:00.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:00.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:00.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:00.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:00.903 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:38:01.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:01.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:01.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:01.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:01.374 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:38:01.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:01.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:01.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:01.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:01.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:01.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:01.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:01.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:01.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:01.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:01.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:01.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:01.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:01.845 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:38:02.318 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:38:02.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:02.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:02.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:02.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:02.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:02.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:02.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:02.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:02.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:02.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:02.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:02.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:02.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:02.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:02.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:02.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:02.790 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:38:03.262 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:38:03.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:03.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:03.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:03.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:03.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:03.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:03.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:03.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:03.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:03.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:03.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:03.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:03.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:03.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:03.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:03.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:03.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:03.733 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:38:04.207 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:38:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:04.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:04.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:04.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:04.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:04.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:04.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:04.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:04.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:04.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:04.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:04.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:04.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:04.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:04.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:04.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:04.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:04.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:04.679 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:38:05.151 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:38:05.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:05.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:05.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:05.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:05.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:05.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:05.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:05.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:05.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:05.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:05.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:05.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:05.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:05.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:05.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:05.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:05.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:05.622 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:38:06.093 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:38:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:06.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:06.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:06.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:06.527 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=2340 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:06.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:06.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:06.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:06.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:06.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:06.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:06.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:06.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:06.564 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:38:06.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:06.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:06.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:06.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:06.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:06.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:07.035 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:38:07.505 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:38:07.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:07.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:07.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:07.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:07.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:07.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:07.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:07.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:07.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:07.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:07.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:07.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:07.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:07.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:38:07.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:07.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:07.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:07.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:38:08.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:08.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:08.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:08.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:08.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:08.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:08.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:08.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:08.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:08.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:08.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:08.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:08.923 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:38:08.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:08.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:08.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:08.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:09.394 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:38:09.867 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:38:09.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:09.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:09.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:09.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:09.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:09.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:09.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:09.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:09.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:09.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:09.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:09.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:09.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:09.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:09.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:09.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:09.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:10.340 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:38:10.812 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:38:10.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:10.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:10.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:10.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:10.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:10.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:10.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:10.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:10.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:10.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:10.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:10.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:11.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:11.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:11.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:11.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:11.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:11.283 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:38:11.753 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:38:12.227 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:38:12.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:12.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:12.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:12.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:12.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:12.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:12.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:12.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:12.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:12.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:12.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:12.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:12.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:12.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:12.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:12.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:12.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:12.699 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:38:13.171 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:38:13.663 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:38:13.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:13.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:13.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:13.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:13.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:13.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:13.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:13.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:13.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:13.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:13.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:13.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:13.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:13.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:13.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:13.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:13.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:14.135 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:38:14.606 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:38:15.080 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:38:15.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:15.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:15.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:15.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:15.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:15.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:15.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:15.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:15.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:15.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:15.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:15.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:15.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:15.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:15.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:15.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:15.552 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:38:16.024 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:38:16.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:16.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:16.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:16.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:16.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:16.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:16.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:16.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:16.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:16.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:16.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:16.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:16.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:16.496 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:38:16.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:16.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:16.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:16.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:16.969 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:38:17.441 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:38:17.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:17.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:17.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:17.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:17.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:17.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:17.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:17.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:17.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:17.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:17.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:17.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:17.912 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:38:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:17.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:17.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:17.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:17.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:18.383 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:38:18.856 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:38:19.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:19.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:19.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:19.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:19.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:19.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:19.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:19.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:19.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:19.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:19.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:19.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:19.329 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:38:19.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:19.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:19.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:19.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:19.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:19.801 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:38:20.272 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:38:20.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:20.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:20.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:20.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:20.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:20.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:20.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:20.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:20.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:38:20.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:38:20.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:38:20.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:38:20.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:38:20.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:38:20.735 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:38:20.735 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:20.735 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:20.735 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:20.735 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:20.735 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:20.735 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:25.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:38:25.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:38:25.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:38:25.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:38:25.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:38:25.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:38:25.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:38:25.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:38:25.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:38:25.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:38:25.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:38:25.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:38:25.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:38:25.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:38:25.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:38:25.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:38:25.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:38:25.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:38:25.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:38:25.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.746 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:38:25.746 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:38:25.746 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:38:25.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:38:25.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:38:26.229 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:38:26.269 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:38:26.271 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:38:26.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:26.274 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:38:26.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:26.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:26.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:26.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:26.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:26.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:26.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:26.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:26.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:26.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:26.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:26.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:26.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:26.702 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:38:26.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:26.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:26.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:26.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:27.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:38:27.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:38:27.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:27.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:27.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:27.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:28.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:38:28.591 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:38:28.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:28.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:28.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:28.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:29.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:38:29.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:29.536 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:38:29.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:29.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:29.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:29.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:30.008 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:38:30.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:30.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:30.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:30.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:30.084 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=936 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:30.084 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:30.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:30.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:30.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:30.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:30.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:30.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:30.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:30.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:30.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:30.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:30.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:38:30.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:30.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:30.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:30.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:30.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:38:31.427 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:38:31.900 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:38:32.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:38:32.845 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:38:33.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:33.316 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:38:33.790 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:38:33.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:33.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:33.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:33.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:33.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:33.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:33.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:33.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:33.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:33.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:33.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:33.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:34.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:34.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:34.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:34.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:34.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:34.262 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:38:34.734 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:38:35.207 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:38:35.680 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:38:36.152 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:38:36.625 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:38:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:37.098 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:38:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:37.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:37.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:37.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:37.552 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=2548 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:37.552 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=2548 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:37.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:37.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:37.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:37.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:37.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:37.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:37.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:37.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:37.570 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:38:37.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:37.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:37.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:38.044 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:38:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:38:38.988 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:38:39.459 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:38:39.933 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:38:40.406 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:38:40.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:40.877 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:38:41.350 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:38:41.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:41.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:41.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:41.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:41.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:41.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:41.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:41.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:41.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:41.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:41.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:41.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:41.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:41.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:41.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:41.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:41.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:41.822 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:38:42.294 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:38:42.765 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:38:43.236 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:38:43.709 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:38:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:38:44.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:44.654 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:38:45.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:45.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:45.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:45.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:45.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:45.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:45.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:45.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:45.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:45.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:45.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:45.125 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:38:45.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:45.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:45.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:45.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:45.599 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:38:46.071 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:38:46.543 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:38:47.014 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:38:47.485 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:38:47.958 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:38:48.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:48.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:48.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:48.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:48.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:48.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:48.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:48.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:48.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:48.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:48.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:48.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:48.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:48.429 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:38:48.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:48.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:48.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:48.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:48.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:48.901 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:38:49.373 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:38:49.846 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:38:50.318 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:38:50.790 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:38:51.261 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:38:51.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:51.735 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:38:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:52.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:52.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:52.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:52.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:38:52.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:52.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:52.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:52.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:38:52.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:38:52.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:38:52.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:38:52.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:38:52.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:52.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:52.207 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:38:52.679 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:38:53.150 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:38:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:38:54.096 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:38:54.568 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:38:55.041 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:38:55.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:38:55.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:38:55.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:38:55.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:38:55.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:38:55.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:38:55.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:38:55.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:38:55.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:38:55.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:38:55.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:38:55.448 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:38:55.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:38:55.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:38:55.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:38:55.449 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.449 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.449 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.449 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.449 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:38:55.450 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:00.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:39:00.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:39:00.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:39:00.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:39:00.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:39:00.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:39:00.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:39:00.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:39:00.461 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:00.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:39:00.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:39:00.465 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:39:00.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:39:00.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:39:00.465 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:00.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:39:00.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:39:00.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:39:00.466 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:39:00.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:00.468 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:39:00.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:39:00.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:39:00.469 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:00.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:39:00.469 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:39:00.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:39:00.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:39:00.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:39:00.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:39:00.471 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:39:00.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:00.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:39:00.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:39:00.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:39:00.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:39:00.473 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:39:00.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:39:00.474 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:39:00.474 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:00.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:00.479 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:39:00.957 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:39:01.002 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:39:01.005 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:39:01.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:01.007 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:39:01.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:01.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:01.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:01.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:01.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:01.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:01.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:01.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:01.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:01.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:01.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:01.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:01.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:01.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:39:01.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:01.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:01.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:01.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:01.904 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:39:02.376 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:39:02.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:02.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:02.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:02.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:02.848 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:39:03.319 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:39:03.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:03.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:03.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:03.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:03.793 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:39:04.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:04.265 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:39:04.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:04.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:04.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:04.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:04.737 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:39:04.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:04.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:04.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:04.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:04.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:04.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:04.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:04.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:04.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:04.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:04.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:04.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:04.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:04.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:04.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:05.210 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:39:05.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:05.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:05.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:05.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:05.683 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:39:06.155 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:39:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:39:07.101 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:39:07.574 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:39:07.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:08.045 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:39:08.518 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:39:08.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:08.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:08.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:08.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:08.663 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:08.663 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=1768 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:08.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:08.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:08.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:08.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:08.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:08.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:08.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:08.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:08.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:08.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:08.991 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:39:09.463 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:39:09.937 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:39:10.409 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:39:10.882 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:39:11.355 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:39:11.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:11.828 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:39:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:39:12.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:12.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:12.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:12.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:12.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:12.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:12.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:12.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:12.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:12.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:12.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:12.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:12.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:12.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:12.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:12.774 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:39:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:13.247 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:39:13.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:13.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:13.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:13.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:13.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:13.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:13.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:13.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:13.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:13.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:13.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:13.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:13.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:13.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:13.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:13.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:13.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:13.720 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:39:14.192 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:39:14.665 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:39:15.138 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:39:15.610 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:39:16.082 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:39:16.553 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:39:16.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:17.024 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:39:17.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:17.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:17.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:17.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:17.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:17.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:17.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:17.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:17.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:17.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:17.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:17.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:17.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:17.495 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:39:17.966 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:39:18.436 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:39:18.909 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:39:19.382 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:39:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:39:20.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:20.328 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:39:20.800 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:39:20.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:20.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:20.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:20.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:20.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:20.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:20.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:20.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:20.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:20.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:20.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:20.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:20.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:20.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:21.272 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:39:21.744 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:39:22.217 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:39:22.690 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:39:23.162 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:39:23.633 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:39:23.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:24.103 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:39:24.574 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:39:24.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:24.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:24.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:24.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:24.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:24.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:24.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:24.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:24.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:24.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:24.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:24.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:24.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:24.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:24.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:25.045 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:39:25.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:25.518 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:39:25.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:25.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:25.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:25.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:25.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:25.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:25.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:25.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:25.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:25.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:25.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:25.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:25.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:25.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:25.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:25.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:25.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:25.991 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:39:26.463 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:39:26.934 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:39:27.405 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:39:27.878 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:39:28.350 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:39:28.822 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:39:29.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:29.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:29.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:29.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:29.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:29.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:29.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:29.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:29.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:29.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:29.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:29.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:29.293 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:39:29.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:29.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:29.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:29.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:29.767 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:39:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:39:30.712 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:39:31.182 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:39:31.656 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:39:32.128 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:39:32.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:32.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:32.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:32.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:32.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:32.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:32.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:32.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:32.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:32.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:32.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:32.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:32.600 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:39:32.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:32.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:32.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:32.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:33.074 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:39:33.546 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:39:34.018 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:39:34.489 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:39:34.962 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 01:39:35.435 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 01:39:35.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:35.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:35.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:35.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:35.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:35.876 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=7645 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:35.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:35.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:35.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:35.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:35.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:35.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:35.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:35.907 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 01:39:35.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:35.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:35.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:35.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:36.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:36.378 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 01:39:36.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:36.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:36.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:36.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:36.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:36.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:36.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:36.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:36.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:36.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:36.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:36.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:36.849 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 01:39:36.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:36.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:36.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:36.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:36.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:37.320 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 01:39:37.794 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 01:39:38.266 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 01:39:38.738 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 01:39:39.209 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 01:39:39.682 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 01:39:40.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:40.155 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 01:39:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:40.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:40.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:40.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:40.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:40.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:40.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:40.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:40.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:40.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:40.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:40.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:40.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:40.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:40.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:40.626 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 01:39:41.098 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 01:39:41.571 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 01:39:42.043 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 01:39:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 01:39:42.987 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 01:39:43.460 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 01:39:43.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:43.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:43.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:43.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:43.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:43.850 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=9369 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:43.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:43.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:43.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:43.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:43.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:43.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:43.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:43.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:43.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:43.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:43.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:43.932 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 01:39:44.404 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 01:39:44.875 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 01:39:45.349 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 01:39:45.821 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 01:39:46.293 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 01:39:46.764 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 01:39:46.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:47.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:47.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:47.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:47.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:47.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:47.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:47.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:47.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:47.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:47.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:47.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:39:47.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:47.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:47.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:47.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:47.237 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 01:39:47.710 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 01:39:47.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:48.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:48.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:48.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:48.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:48.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:48.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:48.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:48.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:48.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:39:48.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:39:48.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:39:48.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:39:48.116 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:39:48.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:39:48.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:48.116 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:39:53.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:39:53.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:39:53.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:39:53.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:39:53.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:39:53.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:39:53.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:39:53.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:39:53.127 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:53.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:39:53.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:39:53.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:39:53.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:39:53.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:39:53.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:39:53.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:39:53.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:53.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:39:53.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:39:53.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:39:53.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:39:53.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:39:53.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:39:53.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:39:53.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:39:53.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:53.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:39:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:39:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:39:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:39:53.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:39:53.133 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:39:53.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:39:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:39:53.138 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:39:53.616 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:39:53.657 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:39:53.660 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:39:53.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:39:53.662 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:39:53.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:39:53.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:39:53.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:39:53.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:39:53.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:39:53.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:39:53.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:39:53.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:39:54.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:39:54.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:54.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:54.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:54.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:54.559 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:39:55.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:39:55.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:55.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:55.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:55.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:55.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:39:55.971 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:39:56.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:56.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:56.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:56.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:56.442 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:39:56.913 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:39:57.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:57.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:57.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:57.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:57.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:39:57.854 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:39:58.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:39:58.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:39:58.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:39:58.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:39:58.324 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:39:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:39:59.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:39:59.737 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:40:00.207 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:40:00.679 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:40:01.150 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:40:01.620 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:40:02.091 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:40:02.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:02.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:02.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:02.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:02.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:02.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:02.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:02.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:02.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:02.451 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:40:02.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:02.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:02.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:02.451 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:07.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:07.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:07.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:07.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:07.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:07.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:07.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:07.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:07.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:07.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:07.465 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:40:07.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:40:07.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:40:07.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:07.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:07.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:07.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:40:07.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:07.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:40:07.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:07.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:40:07.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:40:07.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:07.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:07.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:07.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:40:07.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:07.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:40:07.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:07.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:40:07.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:40:07.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:07.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:07.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:07.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:40:07.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:07.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:40:07.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:07.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:40:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:40:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:40:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:40:07.484 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:40:07.484 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:40:07.484 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:07.488 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:40:07.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:40:08.015 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:08.017 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:40:08.019 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:40:08.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:08.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:08.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:08.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:08.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:08.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:08.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:08.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:08.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:08.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:40:08.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:08.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:08.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:08.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:40:09.381 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:40:09.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:09.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:09.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:09.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:09.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:40:10.323 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:40:10.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:10.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:10.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:10.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:10.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:40:11.264 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:40:11.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:11.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:11.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:11.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:11.734 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:40:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:40:12.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:12.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:12.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:12.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:12.676 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:40:13.147 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:40:13.618 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:40:14.089 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:40:14.560 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:40:15.032 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:40:15.505 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:40:15.977 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:40:16.448 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:40:16.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:16.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:16.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:16.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:16.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:16.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:16.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:16.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:16.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:16.820 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:40:16.820 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.820 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.820 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:16.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:21.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:21.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:21.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:21.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:21.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:21.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:21.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:21.832 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:40:21.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:40:21.835 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:40:21.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:21.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:21.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:21.836 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:40:21.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:21.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:40:21.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:21.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:40:21.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:40:21.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:21.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:21.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:21.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:40:21.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:21.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:40:21.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:21.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:21.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:40:21.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:21.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:40:21.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:40:21.845 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:40:21.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:21.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:21.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:40:22.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:40:22.363 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:22.364 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:40:22.365 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:40:22.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:22.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:22.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:22.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:22.798 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:40:22.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:22.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:22.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:22.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:23.272 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:40:23.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:23.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:23.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:23.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:23.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:23.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:40:23.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:23.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:23.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:23.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:24.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:40:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:40:24.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:24.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:24.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:24.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:25.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:40:25.629 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:40:25.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:25.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:25.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:25.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:26.098 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:40:26.570 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:40:26.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:26.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:26.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:26.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:27.041 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:40:27.512 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:40:27.983 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:40:28.453 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:40:28.924 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:40:29.394 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:40:29.866 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:40:30.337 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:40:30.807 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:40:31.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:40:31.749 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:40:32.219 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:40:32.690 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:40:33.161 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:40:33.632 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:40:34.105 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:40:34.578 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:40:35.050 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:40:35.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:35.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:35.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:35.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:35.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:35.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:35.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:35.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:35.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:35.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:35.181 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:40:35.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:35.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:40.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:40.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:40.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:40.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:40.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:40.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:40.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:40.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:40.200 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:40.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:40.200 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:40:40.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:40:40.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:40:40.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:40.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:40.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:40:40.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:40.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:40:40.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:40.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:40:40.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:40:40.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:40.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:40.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:40.212 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:40:40.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:40.212 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:40:40.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:40.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:40.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:40:40.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:40:40.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:40:40.222 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:40:40.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:40.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:40:40.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:40:40.748 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:40.751 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:40:40.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:40.754 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:40:40.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:40.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:40.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:40.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:40.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:40.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:40.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:40.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:41.178 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:40:41.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:41.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:41.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:41.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:41.649 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:40:41.796 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:42.123 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:40:42.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:42.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:42.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:42.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:42.321 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:42.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:40:42.843 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:43.067 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:40:43.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:43.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:43.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:43.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:43.538 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:40:44.009 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:40:44.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:44.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:44.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:44.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:44.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:40:44.859 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:44.955 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:40:45.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:45.393 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:45.427 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:40:45.898 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:40:45.909 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:40:46.427 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:46.842 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:40:47.315 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:40:47.787 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:40:48.258 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:40:48.433 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:48.731 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:40:49.204 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:40:49.676 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:40:50.147 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:40:50.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:50.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:50.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:50.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:50.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:50.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:50.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:50.487 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:40:50.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:50.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:50.488 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:55.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:55.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:55.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:55.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:55.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:55.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:55.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:55.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:55.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:55.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:40:55.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:40:55.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:40:55.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:40:55.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:55.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:55.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:55.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:40:55.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:40:55.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:40:55.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:55.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:40:55.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:40:55.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:55.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:40:55.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:40:55.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:40:55.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:40:55.508 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:40:55.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:40:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:55.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:40:55.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:40:56.031 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:40:56.033 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:40:56.035 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:40:56.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:56.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:56.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:56.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:56.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:56.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:56.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:56.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:56.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:56.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:56.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:56.462 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:40:56.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:56.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:56.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:56.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:56.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:56.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:56.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:56.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:56.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:56.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:40:56.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:56.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:56.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:56.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:56.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:56.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:56.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:56.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:56.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:56.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:56.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:57.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:40:57.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:40:57.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:57.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:57.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:57.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:57.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:57.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:57.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:40:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:57.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:57.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:57.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:57.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:57.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:57.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:57.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:57.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:58.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:58.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:58.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:58.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:58.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:58.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.342 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:40:58.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:58.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:58.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:58.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:58.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:58.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:58.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:58.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:58.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:58.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:58.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:58.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:58.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:58.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:40:58.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:40:58.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:40:58.814 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:40:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:40:58.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:40:58.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:40:58.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:58.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:59.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:59.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:40:59.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:40:59.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:40:59.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:40:59.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:40:59.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:40:59.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:40:59.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:40:59.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:40:59.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:40:59.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:40:59.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:40:59.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:40:59.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:40:59.021 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:40:59.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:59.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:59.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:59.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:40:59.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:04.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:04.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:04.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:04.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:04.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:04.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:04.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:04.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:04.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:04.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:04.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:41:04.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:41:04.034 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:41:04.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:04.034 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:04.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:04.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:41:04.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:04.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:41:04.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:04.036 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:41:04.036 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:41:04.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:04.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:04.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:04.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:41:04.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:04.037 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:41:04.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:04.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:41:04.038 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:41:04.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:04.038 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:04.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:04.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:41:04.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:04.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:41:04.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:41:04.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:41:04.041 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:41:04.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:04.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:41:04.524 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:41:04.567 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:41:04.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:41:04.571 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:41:04.574 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:41:04.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:41:04.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:41:04.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:41:04.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:41:04.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:41:04.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:41:04.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:41:04.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:41:04.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 01:41:04.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:41:04.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:41:04.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:41:04.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:41:04.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:41:04.997 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:41:05.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:05.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:05.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:05.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:05.468 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:41:05.942 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:41:06.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:06.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:06.414 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:41:06.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:41:06.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:41:06.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:06.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:06.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:06.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:06.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:06.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:06.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:06.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:06.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:06.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:06.693 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:06.693 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:11.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:11.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:11.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:11.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:11.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:11.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:11.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:11.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:11.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:11.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:11.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:41:11.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:41:11.710 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:41:11.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:11.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:11.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:11.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:41:11.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:11.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:41:11.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:11.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:11.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:41:11.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:11.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:41:11.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:41:11.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:11.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:11.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:11.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:41:11.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:11.715 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:41:11.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:41:11.718 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:41:11.718 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:41:11.718 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:11.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:11.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:11.719 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:11.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:16.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:16.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:16.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:16.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:16.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:16.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:16.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:16.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:16.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:16.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:41:16.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:41:16.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:41:16.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:16.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:16.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:16.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:41:16.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:16.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:41:16.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:16.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:41:16.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:41:16.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:16.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:16.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:16.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:41:16.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:16.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:41:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:16.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:41:16.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:41:16.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:16.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:16.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:16.742 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:41:16.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:16.742 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:41:16.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:41:16.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:41:16.745 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:41:16.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:16.750 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:41:17.228 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:41:17.269 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:41:17.270 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:41:17.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:41:17.271 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:41:17.699 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:41:17.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:17.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:17.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:17.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:18.174 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:41:18.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:41:18.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:18.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:18.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:18.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:19.118 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:41:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:41:19.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:19.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:19.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:19.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:20.065 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:41:20.540 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:41:20.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:20.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:20.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:20.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:21.012 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:41:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:41:21.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:21.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:21.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:21.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:21.960 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:41:22.435 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:41:22.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:22.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:22.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:22.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:22.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:22.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:22.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:22.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:22.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:22.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:22.761 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:41:22.761 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:22.761 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:22.761 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:22.761 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:22.761 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:22.761 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:27.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:27.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:27.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:27.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:27.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:27.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:27.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:27.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:27.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:27.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:27.772 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:41:27.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:41:27.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:41:27.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:27.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:27.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:27.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:41:27.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:27.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:41:27.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:27.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:41:27.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:41:27.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:27.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:27.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:27.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:41:27.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:27.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:41:27.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:27.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:41:27.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:41:27.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:27.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:27.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:27.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:41:27.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:27.785 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:41:27.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:27.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:41:27.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:41:27.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:41:27.791 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:41:27.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:27.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:41:28.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:41:28.325 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:41:28.328 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:41:28.329 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:41:28.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:41:28.745 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:41:28.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:28.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:28.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:28.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:29.220 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:41:29.692 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:41:29.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:29.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:29.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:29.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:30.168 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:41:30.640 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:41:30.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:30.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:30.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:30.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:31.114 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:41:31.586 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:41:31.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:31.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:31.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:31.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:32.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:41:32.532 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:41:32.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:32.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:33.004 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:41:33.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:33.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:33.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:33.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:33.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:33.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:33.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:33.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:33.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:33.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:33.343 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:41:33.343 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:33.343 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:41:38.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:38.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:38.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:38.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:38.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:38.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:38.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:38.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:38.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:38.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:38.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:41:38.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:41:38.361 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:41:38.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:38.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:38.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:38.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:41:38.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:38.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:41:38.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:38.363 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:38.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:41:38.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:38.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:38.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:41:38.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:38.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:41:38.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:41:38.367 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:41:38.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:38.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:38.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:38.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:38.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:38.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:38.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:38.368 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:41:38.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:38.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:38.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:43.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:43.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:43.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:43.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:43.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:43.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:43.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:43.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:43.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:41:43.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:41:43.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:41:43.385 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:41:43.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:43.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:43.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:43.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:41:43.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:41:43.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:41:43.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:43.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:41:43.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:41:43.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:43.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:43.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:43.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:41:43.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:41:43.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:41:43.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:43.389 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:41:43.389 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:41:43.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:43.389 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:41:43.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:41:43.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:41:43.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:41:43.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:41:43.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:41:43.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:41:43.392 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:41:43.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:41:43.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:41:43.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:41:43.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:41:43.918 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:41:43.921 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:41:43.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:41:43.923 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:41:43.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:41:43.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:41:43.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:41:44.347 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:41:44.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:44.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:44.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:44.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:44.821 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:41:44.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:41:44.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:41:44.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:41:44.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:41:44.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:41:45.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:41:45.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:45.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:45.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:45.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:45.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:41:46.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:41:46.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:46.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:46.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:46.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:46.707 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:41:47.177 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:41:47.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:47.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:47.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:47.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:47.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:41:48.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:41:48.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:48.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:48.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:48.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:48.590 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:41:49.060 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:41:49.532 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:41:50.002 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:41:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:41:50.944 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:41:51.415 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:41:51.885 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:41:52.356 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:41:52.827 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:41:53.301 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:41:53.773 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:41:54.245 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:41:54.716 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:41:55.186 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:41:55.660 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:41:56.132 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:41:56.605 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:41:57.078 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:41:57.550 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:41:58.022 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:41:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:41:58.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:41:58.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:41:58.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:41:58.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:41:58.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:41:58.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:41:58.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:41:58.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:41:58.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:41:58.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:41:58.698 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:41:58.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:41:58.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:03.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:03.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:03.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:03.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:03.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:03.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:03.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:03.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:03.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:03.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:03.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:42:03.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:42:03.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:42:03.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:03.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:03.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:03.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:42:03.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:03.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:42:03.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:03.722 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:42:03.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:42:03.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:03.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:03.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:03.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:42:03.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:03.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:42:03.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:03.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:42:03.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:42:03.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:03.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:03.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:03.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:42:03.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:03.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:42:03.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:03.729 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:42:03.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:42:03.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:42:03.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:42:03.730 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:42:03.730 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:42:03.730 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:03.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:03.735 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:42:04.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:42:04.258 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:04.260 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:04.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:04.261 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:42:04.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:04.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:04.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:42:04.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:04.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:04.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:04.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:42:04.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:42:04.306 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:04.309 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:04.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:04.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:04.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:04.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:04.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:04.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:42:04.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:05.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:42:05.632 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:42:05.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:05.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:05.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:05.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:06.104 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:42:06.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:42:06.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:06.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:06.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:06.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:07.051 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:42:07.523 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:42:07.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:07.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:07.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:07.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:07.996 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:42:08.469 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:42:08.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:08.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:08.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:08.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:08.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:42:09.415 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:42:09.888 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:42:10.360 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:42:10.834 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:42:11.306 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:42:11.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:42:12.252 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:42:12.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:12.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:12.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:12.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:12.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:12.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:12.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:12.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:12.340 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:42:12.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:12.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:12.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:12.340 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:17.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:17.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:17.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:17.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:17.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:17.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:17.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:17.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:17.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:17.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:17.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:42:17.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:42:17.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:42:17.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:17.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:17.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:17.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:42:17.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:17.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:42:17.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:17.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:42:17.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:42:17.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:17.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:17.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:17.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:42:17.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:17.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:42:17.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:17.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:42:17.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:42:17.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:17.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:17.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:17.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:42:17.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:17.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:42:17.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:42:17.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:42:17.370 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:42:17.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:42:17.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:42:17.899 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:17.900 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:17.903 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:42:17.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:17.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:17.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:42:17.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:17.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:17.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:17.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:42:17.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:42:17.945 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:17.947 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:17.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:17.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:17.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:17.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:18.324 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:42:18.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:18.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:18.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:18.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:18.796 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:42:19.269 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:42:19.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:19.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:19.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:19.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:19.742 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:42:20.215 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:42:20.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:20.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:20.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:20.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:20.687 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:42:21.158 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:42:21.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:21.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:21.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:21.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:21.629 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:42:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:42:22.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:22.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:22.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:22.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:22.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:42:23.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:42:23.521 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:42:23.994 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:42:24.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:42:24.939 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:42:25.412 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:42:25.885 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:42:25.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:25.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:25.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:25.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:25.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:25.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:25.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:25.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:25.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:25.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:25.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:25.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:25.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:25.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:25.975 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:42:30.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:30.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:30.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:30.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:30.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:30.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:30.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:30.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:30.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:30.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:30.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:42:30.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:42:30.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:42:30.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:30.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:30.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:30.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:42:30.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:30.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:42:30.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:30.995 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:30.995 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:42:30.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:30.997 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:30.997 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:42:30.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:42:30.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:42:30.999 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:42:30.999 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:30.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:31.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:31.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:42:31.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:42:31.525 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:31.526 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:31.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:31.526 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:42:31.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:31.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:31.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:42:31.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:31.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:31.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:31.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:42:31.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:42:31.574 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:31.578 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:31.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:31.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:31.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:31.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:31.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:31.954 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:42:32.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:32.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:32.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:32.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:32.425 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:42:32.896 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:42:33.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:33.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:33.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:33.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:33.369 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:42:33.842 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:42:34.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:34.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:34.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:34.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:34.315 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:42:34.785 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:42:35.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:35.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:35.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:35.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:35.259 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:42:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:42:36.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:36.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:36.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:36.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:36.203 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:42:36.676 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:42:37.148 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:42:37.621 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:42:38.091 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:42:38.562 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:42:39.033 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:42:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:42:39.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:39.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:39.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:39.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:39.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:39.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:39.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:42:39.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:39.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:39.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:39.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:42:39.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:42:39.640 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:39.645 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:39.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:39.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:39.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:39.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:39.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:39.975 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:42:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:42:40.918 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:42:41.392 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:42:41.864 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:42:42.335 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:42:42.805 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:42:43.276 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:42:43.749 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:42:44.222 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:42:44.694 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:42:45.167 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:42:45.640 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:42:46.113 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:42:46.586 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:42:47.059 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:42:47.530 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:42:47.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:47.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:47.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:47.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:47.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:47.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:47.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:47.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:47.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:47.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:47.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:47.680 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:42:47.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:47.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:47.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:47.680 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:47.680 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:47.680 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:47.680 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:47.680 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:47.680 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:42:52.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:42:52.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:42:52.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:52.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:52.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:52.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:52.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:42:52.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:52.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:52.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:42:52.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:42:52.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:42:52.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:42:52.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:52.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:52.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:42:52.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:42:52.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:42:52.705 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:42:52.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:52.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:42:52.707 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:42:52.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:52.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:52.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:42:52.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:42:52.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:42:52.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:42:52.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:52.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:42:52.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:42:52.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:52.712 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:42:52.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:42:52.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:42:52.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:42:52.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:42:52.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:52.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:42:52.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:42:52.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:42:52.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:42:52.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:42:52.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:42:52.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:42:52.719 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:42:52.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:42:52.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:42:53.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:42:53.255 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:53.258 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:53.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:53.260 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:42:53.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:42:53.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:42:53.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:42:53.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:53.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:53.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:53.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:42:53.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:42:53.292 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:42:53.294 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:42:53.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:42:53.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:42:53.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:42:53.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:53.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:42:53.673 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:42:53.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:53.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:53.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:53.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:54.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:42:54.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:42:54.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:54.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:54.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:54.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:55.090 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:42:55.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:42:55.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:55.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:55.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:55.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:56.033 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:42:56.504 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:42:56.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:56.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:56.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:56.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:56.977 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:42:57.450 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:42:57.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:42:57.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:42:57.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:42:57.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:42:57.922 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:42:58.393 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:42:58.866 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:42:59.339 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:42:59.811 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:43:00.282 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:43:00.753 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:43:01.224 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:43:01.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:01.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:01.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:01.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:01.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:01.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:01.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:43:01.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:01.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:01.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:01.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:43:01.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:43:01.360 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:01.364 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:01.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:01.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:01.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:01.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:01.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:01.695 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:43:02.168 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:43:02.640 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:43:03.112 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:43:03.583 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:43:04.056 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:43:04.529 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:43:05.002 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:43:05.475 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:43:05.948 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:43:06.421 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:43:06.894 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:43:07.367 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:43:07.839 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:43:08.312 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:43:08.784 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:43:09.256 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:43:09.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:09.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:09.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:09.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:09.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:09.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:09.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:09.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:09.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:43:09.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:43:09.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:43:09.394 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:43:09.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:43:09.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:43:09.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:43:09.394 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:43:09.394 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:43:09.394 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:43:09.394 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:43:09.394 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:43:09.394 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:43:14.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:43:14.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:43:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:43:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:43:14.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:43:14.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:43:14.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:43:14.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:43:14.407 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:14.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:43:14.408 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:43:14.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:43:14.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:43:14.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:43:14.411 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:14.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:43:14.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:43:14.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:43:14.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:43:14.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:14.414 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:43:14.414 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:43:14.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:43:14.414 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:14.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:43:14.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:43:14.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:43:14.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:43:14.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:14.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:43:14.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:43:14.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:43:14.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:43:14.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:43:14.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:43:14.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:43:14.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:43:14.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:43:14.421 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:43:14.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:14.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:43:14.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:43:14.947 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:14.948 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:14.950 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:43:14.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:14.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:14.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:14.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:43:14.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:14.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:14.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:14.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:43:14.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:43:14.995 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:14.999 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:15.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:15.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:15.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:15.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:15.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:15.375 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:43:15.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:15.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:15.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:15.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:15.847 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:43:16.320 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:43:16.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:16.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:16.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:16.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:16.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:43:17.265 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:43:17.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:17.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:17.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:17.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:17.736 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:43:18.209 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:43:18.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:18.681 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:43:19.154 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:43:19.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:19.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:43:20.100 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:43:20.572 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:43:21.043 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:43:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:43:21.989 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:43:22.461 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:43:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:43:23.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:23.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:23.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:23.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:23.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:23.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:23.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:43:23.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:23.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:23.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:23.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:43:23.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:43:23.068 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:23.072 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:23.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:23.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:23.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:23.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:23.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:23.405 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:43:23.878 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:43:24.350 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:43:24.821 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:43:25.292 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:43:25.762 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:43:26.233 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:43:26.706 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:43:27.179 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:43:27.652 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:43:28.124 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:43:28.597 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:43:29.069 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:43:29.540 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:43:30.013 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:43:30.486 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:43:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:43:31.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:31.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:31.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:31.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:31.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:31.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:31.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:31.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:31.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:43:31.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:43:31.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:43:31.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:43:31.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:43:31.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:43:31.109 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:43:36.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:43:36.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:43:36.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:43:36.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:43:36.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:43:36.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:43:36.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:43:36.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:43:36.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:36.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:43:36.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:43:36.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:43:36.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:43:36.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:43:36.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:36.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:43:36.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:43:36.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:43:36.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:43:36.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:36.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:43:36.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:43:36.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:43:36.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:36.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:43:36.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:43:36.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:43:36.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:43:36.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:43:36.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:43:36.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:43:36.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:43:36.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:43:36.136 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:43:36.136 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:43:36.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:43:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:43:36.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:43:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:43:36.662 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:36.664 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:36.667 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:43:36.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:36.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:36.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:43:36.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:36.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:36.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:36.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:43:36.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:43:36.710 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:36.713 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:36.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:36.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:36.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:36.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:36.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:37.091 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:43:37.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:37.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:43:38.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:43:38.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:38.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:38.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:38.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:38.503 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:43:38.976 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:43:39.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:39.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:39.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:39.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:39.449 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:43:39.922 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:43:40.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:40.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:40.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:40.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:40.393 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:43:40.866 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:43:41.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:43:41.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:43:41.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:43:41.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:43:41.339 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:43:41.811 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:43:42.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:43:42.757 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:43:43.229 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:43:43.702 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:43:44.175 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:43:44.648 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:43:44.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:44.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:44.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:44.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:44.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:44.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:44.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:43:44.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:44.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:44.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:44.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:43:44.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:43:44.784 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:44.789 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:44.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:44.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:44.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:44.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:44.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:45.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:43:45.589 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:43:46.060 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:43:46.533 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:43:47.006 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:43:47.479 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:43:47.949 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:43:48.423 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:43:48.895 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:43:49.368 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:43:49.839 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:43:50.309 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:43:50.782 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:43:51.255 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:43:51.728 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:43:52.201 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:43:52.674 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:43:52.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:52.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:52.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:52.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:52.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:43:52.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:43:52.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:43:52.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:52.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:52.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:52.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:43:52.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:43:52.858 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:43:52.862 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:43:52.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:43:52.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:43:52.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:43:52.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:52.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:43:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:43:53.620 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:43:54.093 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:43:54.565 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:43:55.036 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:43:55.509 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:43:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:43:56.453 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:43:56.926 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:43:57.399 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:43:57.871 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:43:58.344 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:43:58.817 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:43:59.290 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:43:59.761 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:44:00.234 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:44:00.706 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:44:00.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:00.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:00.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:00.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:00.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:00.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:00.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:44:00.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:00.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:00.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:00.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:44:00.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:44:00.942 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:00.946 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:00.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:00.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:00.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:00.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:00.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:00.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:01.178 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:44:01.649 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:44:02.120 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:44:02.594 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:44:03.066 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:44:03.539 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:44:04.012 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:44:04.485 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:44:04.957 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:44:05.428 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:44:05.902 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:44:06.375 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:44:06.847 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:44:07.318 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:44:07.791 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:44:08.264 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:44:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:44:08.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:08.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:08.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:08.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:08.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:08.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:08.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:08.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:08.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:44:08.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:44:08.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:44:08.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:44:08.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:44:08.973 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:44:08.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:44:13.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:44:13.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:44:13.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:44:13.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:44:13.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:44:13.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:44:13.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:44:13.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:44:13.982 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:13.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:44:13.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:44:13.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:44:13.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:44:13.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:44:13.984 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:13.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:44:13.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:44:13.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:44:13.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:44:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:44:13.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:44:13.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:44:13.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:44:13.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:44:13.986 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:44:13.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:44:13.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:44:13.988 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:44:13.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:13.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:13.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:44:14.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:44:14.515 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:14.517 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:14.519 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:44:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:14.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:14.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:14.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:44:14.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:14.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:14.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:14.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:44:14.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:44:14.562 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:14.564 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:14.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:14.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:14.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:14.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:14.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:14.943 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:44:14.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:14.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:14.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:14.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:15.414 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:44:15.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:44:15.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:16.355 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:44:16.826 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:44:16.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:16.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:16.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:16.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:17.297 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:44:17.768 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:44:17.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:17.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:17.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:17.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:18.241 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:44:18.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:44:18.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:18.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:19.185 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:44:19.656 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:44:20.130 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:44:20.602 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:44:21.074 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:44:21.545 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:44:22.016 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:44:22.487 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:44:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:22.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:22.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:22.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:22.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:22.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:22.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:44:22.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:22.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:22.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:22.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:44:22.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:44:22.624 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:22.627 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:22.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:22.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:22.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:22.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:22.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:22.960 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:44:23.432 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:44:23.904 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:44:24.376 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:44:24.846 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:44:25.317 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:44:25.790 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:44:26.263 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:44:26.735 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:44:27.206 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:44:27.677 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:44:28.147 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:44:28.618 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:44:29.091 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:44:29.564 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:44:30.036 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:44:30.507 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:44:30.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:30.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:30.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:30.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:30.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:30.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:30.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:30.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:30.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:44:30.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:44:30.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:44:30.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:44:30.653 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:44:30.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:44:30.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:44:35.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:44:35.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:44:35.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:44:35.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:44:35.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:44:35.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:44:35.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:44:35.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:44:35.670 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:35.671 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:44:35.671 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:44:35.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:44:35.674 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:44:35.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:44:35.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:35.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:44:35.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:44:35.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:44:35.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:44:35.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:35.678 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:44:35.678 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:44:35.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:44:35.678 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:35.678 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:44:35.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:44:35.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:44:35.679 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:44:35.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:35.683 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:44:35.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:44:35.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:44:35.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:44:35.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:44:35.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:44:35.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:44:35.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:44:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:44:35.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:44:35.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:44:35.691 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:44:35.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:44:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:44:35.696 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:44:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:44:36.228 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:36.230 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:36.231 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:44:36.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:36.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:36.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:36.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:44:36.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:36.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:36.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:36.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:44:36.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:44:36.265 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:36.268 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:36.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:36.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:36.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:36.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:36.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:36.645 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:44:36.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:36.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:36.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:36.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:37.116 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:44:37.589 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:44:37.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:37.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:37.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:37.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:38.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:44:38.534 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:44:38.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:38.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:38.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:38.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:39.005 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:44:39.478 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:44:39.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:39.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:39.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:39.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:39.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:44:40.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:44:40.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:44:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:44:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:44:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:44:40.894 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:44:41.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:44:41.840 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:44:42.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:44:42.783 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:44:43.256 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:44:43.728 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:44:44.200 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:44:44.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:44.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:44.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:44.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:44.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:44.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:44.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:44:44.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:44.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:44.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:44.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:44:44.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:44:44.337 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:44.340 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:44.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:44.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:44.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:44.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:44.671 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:44:45.144 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:44:45.616 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:44:46.088 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:44:46.559 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:44:47.033 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:44:47.505 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:44:47.977 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:44:48.448 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:44:48.921 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:44:49.394 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:44:49.866 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:44:50.337 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:44:50.810 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:44:51.283 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:44:51.755 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:44:52.226 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:44:52.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:52.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:52.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:52.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:52.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:44:52.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:44:52.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:44:52.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:52.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:52.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:52.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:44:52.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:44:52.408 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:44:52.410 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:44:52.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:44:52.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:44:52.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:44:52.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:52.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:44:52.699 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:44:53.172 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:44:53.644 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:44:54.115 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:44:54.588 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:44:55.061 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:44:55.533 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:44:56.004 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:44:56.477 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:44:56.949 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:44:57.421 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:44:57.892 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:44:58.365 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:44:58.838 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:44:59.310 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:44:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:45:00.254 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:45:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:00.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:00.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:00.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:00.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:00.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:00.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:00.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:00.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:00.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:00.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:00.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:00.487 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:00.488 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:00.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:00.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:00.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:00.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:00.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:00.726 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:45:01.198 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:45:01.669 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:45:02.143 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:45:02.615 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:45:03.087 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:45:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:45:04.032 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:45:04.504 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:45:04.976 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:45:05.447 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:45:05.921 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:45:06.393 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:45:06.865 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:45:07.336 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:45:07.810 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:45:08.282 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:45:08.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:08.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:08.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:08.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:08.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:08.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:45:08.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:45:08.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:45:08.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:45:08.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:45:08.511 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:45:08.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:45:13.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:45:13.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:45:13.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:45:13.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:45:13.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:45:13.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:45:13.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:45:13.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:45:13.527 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:45:13.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:45:13.528 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:45:13.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:45:13.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:45:13.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:45:13.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:45:13.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:45:13.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:45:13.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:45:13.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:45:13.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:13.537 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:45:13.537 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:45:13.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:45:13.537 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:45:13.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:45:13.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:45:13.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:45:13.538 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:45:13.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:13.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:45:13.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:45:13.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:45:13.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:45:13.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:45:13.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:45:13.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:45:13.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:45:13.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:13.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:45:13.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:45:13.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:45:13.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:45:13.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:45:13.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:45:13.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:45:13.548 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:45:13.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:45:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:45:13.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:45:14.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:45:14.080 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:14.081 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:14.083 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:45:14.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:14.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:14.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:14.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:14.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:14.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:14.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:14.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:14.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:14.123 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:14.125 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:14.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:14.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:14.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:14.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:14.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:14.504 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:45:14.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:14.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:14.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:14.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:14.974 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:45:15.445 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:45:15.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:15.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:15.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:15.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:15.918 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:45:16.391 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:45:16.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:16.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:16.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:16.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:16.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:45:17.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:45:17.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:17.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:17.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:17.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:17.808 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:45:18.280 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:45:18.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:45:18.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:45:18.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:45:18.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:45:18.752 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:45:19.223 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:45:19.694 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:45:20.167 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:45:20.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:45:21.111 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:45:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:45:22.056 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:45:22.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:22.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:22.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:22.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:22.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:22.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:22.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:22.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:22.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:22.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:22.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:22.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:22.190 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:22.194 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:22.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:22.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:22.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:22.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:22.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:22.528 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:45:23.000 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:45:23.471 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:45:23.944 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:45:24.417 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:45:24.888 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:45:25.360 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:45:25.833 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:45:26.305 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:45:26.778 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:45:27.250 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:45:27.723 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:45:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:45:28.669 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:45:29.141 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:45:29.614 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:45:30.087 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:45:30.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:30.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:30.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:30.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:30.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:30.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:30.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:30.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:30.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:30.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:30.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:30.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:30.267 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:30.271 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:30.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:30.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:30.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:30.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:30.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:30.559 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:45:31.031 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:45:31.502 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:45:31.973 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:45:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:45:32.919 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:45:33.391 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:45:33.862 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:45:34.335 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:45:34.808 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:45:35.280 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:45:35.751 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:45:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:45:36.696 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:45:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:45:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:45:38.113 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:45:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:38.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:38.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:38.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:38.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:38.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:38.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:38.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:38.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:38.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:38.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:38.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:38.344 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:38.348 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:38.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:38.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:38.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:38.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:38.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:45:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:45:39.527 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:45:40.001 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:45:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:45:40.945 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:45:41.416 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:45:41.889 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:45:42.361 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:45:42.833 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:45:43.304 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:45:43.778 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:45:44.250 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:45:44.722 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:45:45.193 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:45:45.666 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:45:46.139 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:45:46.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:46.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:46.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:46.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:46.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:46.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:46.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:46.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:46.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:46.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:46.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:46.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:46.420 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:46.424 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:46.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:46.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:46.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:46.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:46.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:46.610 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:45:47.082 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:45:47.555 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:45:48.027 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 01:45:48.499 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 01:45:48.971 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 01:45:49.444 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 01:45:49.916 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 01:45:50.388 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 01:45:50.859 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 01:45:51.332 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 01:45:51.804 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 01:45:52.276 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 01:45:52.748 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 01:45:53.221 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 01:45:53.693 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 01:45:54.165 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 01:45:54.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:54.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:54.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:54.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:54.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:45:54.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:45:54.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:45:54.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:54.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:54.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:54.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:45:54.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:45:54.491 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:45:54.494 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:45:54.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:45:54.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:45:54.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:45:54.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:54.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:45:54.636 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 01:45:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 01:45:55.582 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 01:45:56.054 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 01:45:56.525 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 01:45:56.997 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 01:45:57.470 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 01:45:57.939 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 01:45:58.408 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 01:45:58.879 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 01:45:59.353 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 01:45:59.825 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 01:46:00.297 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 01:46:00.768 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 01:46:01.241 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 01:46:01.714 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 01:46:02.186 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 01:46:02.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:02.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:02.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:02.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:02.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:02.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:02.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:46:02.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:02.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:02.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:02.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:46:02.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:46:02.558 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:02.562 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:02.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:02.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:02.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:02.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:02.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:02.659 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 01:46:03.132 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 01:46:03.604 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 01:46:04.075 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 01:46:04.545 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 01:46:05.016 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 01:46:05.487 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 01:46:05.958 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 01:46:06.428 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 01:46:06.899 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 01:46:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 01:46:07.845 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 01:46:08.317 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 01:46:08.788 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 01:46:09.259 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 01:46:09.729 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 01:46:10.200 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 01:46:10.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:10.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:10.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:10.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:10.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:10.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:10.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:46:10.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:10.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:10.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:10.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:46:10.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:46:10.617 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:10.620 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:10.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:10.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:10.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:10.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:10.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:10.671 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 01:46:11.142 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 01:46:11.615 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 01:46:12.087 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 01:46:12.559 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 01:46:13.030 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 01:46:13.501 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 01:46:13.975 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 01:46:14.447 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 01:46:14.919 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 01:46:15.390 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 01:46:15.864 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 01:46:16.336 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 01:46:16.808 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 01:46:17.279 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 01:46:17.749 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 01:46:18.223 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 01:46:18.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:18.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:18.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:18.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:18.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:18.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:18.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:18.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:18.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:18.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:18.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:46:18.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:46:18.640 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:46:18.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:18.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:23.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:46:23.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:46:23.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:23.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:23.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:23.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:23.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:23.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:46:23.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:23.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:46:23.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:46:23.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:46:23.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:46:23.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:46:23.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:23.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:23.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:46:23.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:46:23.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:46:23.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:46:23.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:46:23.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:46:23.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:46:23.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:46:23.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:46:23.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:46:23.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:46:23.665 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:46:23.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:23.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:46:24.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:46:24.183 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:24.185 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:24.186 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:46:24.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:24.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:24.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:24.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:46:24.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:24.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:24.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:24.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:46:24.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:46:24.241 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:24.244 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:24.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:24.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:24.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:24.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:24.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:24.620 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:46:24.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:24.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:24.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:24.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:25.092 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:46:25.563 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:46:25.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:25.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:25.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:25.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:26.035 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:46:26.508 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:46:26.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:26.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:26.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:26.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:26.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:46:27.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:46:27.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:27.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:27.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:27.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:27.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:46:28.396 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:46:28.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:28.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:28.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:28.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:28.868 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:46:29.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:46:29.814 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:46:30.286 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:46:30.760 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:46:31.232 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:46:31.704 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:46:32.178 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:46:32.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:32.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:32.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:32.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:32.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:32.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:32.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:46:32.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:32.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:32.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:32.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:46:32.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:46:32.311 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:32.315 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:32.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:32.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:32.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:32.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:32.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:32.650 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:46:33.122 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:46:33.595 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:46:34.067 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:46:34.540 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:46:35.011 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:46:35.481 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:46:35.952 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:46:36.425 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:46:36.898 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:46:37.370 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:46:37.841 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:46:38.315 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:46:38.786 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:46:39.259 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:46:39.732 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:46:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:46:40.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:40.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:40.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:40.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:40.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:40.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:40.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:40.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:40.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:40.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:46:40.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:46:40.344 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:46:40.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:40.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:40.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:40.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:45.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:46:45.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:46:45.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:45.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:45.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:45.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:45.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:45.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:46:45.351 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:45.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:46:45.351 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:46:45.353 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:46:45.353 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:46:45.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:46:45.354 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:45.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:45.354 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:46:45.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:46:45.354 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:46:45.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:45.356 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:46:45.356 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:46:45.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:46:45.356 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:45.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:45.356 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:46:45.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:46:45.357 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:46:45.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:45.358 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:46:45.358 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:46:45.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:46:45.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:45.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:45.359 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:46:45.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:46:45.359 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:46:45.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:46:45.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:46:45.361 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:46:45.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:45.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:45.366 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:46:45.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:46:45.882 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:45.883 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:45.884 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:46:45.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:45.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:45.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:45.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:46:45.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:45.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:45.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:45.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:46:45.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:46:45.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:45.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:45.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:45.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:45.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:46.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:46:46.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:46.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:46.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:46.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:46.790 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:46:47.262 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:46:47.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:47.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:47.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:47.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:47.734 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:46:48.208 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:46:48.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:48.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:48.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:48.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:48.681 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:46:49.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:46:49.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:49.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:49.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:49.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:46:50.097 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:46:50.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:50.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:50.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:50.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:50.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:46:51.042 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:46:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:46:51.988 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:46:52.461 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:46:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:46:53.407 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:46:53.880 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:46:53.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:53.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:53.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:53.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:53.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:53.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:53.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:53.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:53.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:53.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:53.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:53.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:53.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:46:53.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:46:53.977 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:46:53.977 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:53.977 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:53.977 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:53.977 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:53.977 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:53.977 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:46:58.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:46:58.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:46:58.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:58.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:58.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:58.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:58.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:46:58.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:46:58.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:58.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:46:58.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:46:58.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:46:58.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:46:58.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:46:58.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:59.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:46:59.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:46:59.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:46:59.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:46:59.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:46:59.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:46:59.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:46:59.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:46:59.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:59.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:46:59.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:46:59.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:46:59.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:46:59.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:46:59.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:46:59.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:46:59.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:46:59.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:46:59.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:46:59.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:46:59.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:46:59.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:46:59.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:46:59.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:46:59.014 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:46:59.014 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:46:59.014 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:46:59.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:46:59.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:46:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:46:59.546 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:46:59.549 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:46:59.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:59.549 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:46:59.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:46:59.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:46:59.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:46:59.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:59.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:59.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:59.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:46:59.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:46:59.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:46:59.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:46:59.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:46:59.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:59.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:46:59.968 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:47:00.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:00.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:00.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:00.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:47:00.911 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:47:01.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:01.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:01.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:01.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:47:01.853 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:47:02.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:02.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:02.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:02.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:02.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:47:02.797 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:47:03.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:03.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:03.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:03.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:03.270 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:47:03.742 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:47:04.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:04.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:04.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:04.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:04.215 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:47:04.688 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:47:05.160 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:47:05.631 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:47:06.105 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:47:06.577 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:47:07.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:47:07.523 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:47:07.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:47:07.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:47:07.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:47:07.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:47:07.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:07.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:07.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:07.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:07.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:07.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:07.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:07.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:07.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:07.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:07.630 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:47:07.630 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:07.630 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:07.630 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:07.630 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:07.630 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:07.630 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:12.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:12.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:12.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:12.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:12.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:12.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:12.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:12.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:12.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:12.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:12.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:47:12.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:47:12.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:47:12.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:12.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:12.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:12.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:47:12.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:12.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:47:12.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:12.648 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:12.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:47:12.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:12.650 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:12.650 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:47:12.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:12.652 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:47:12.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:47:12.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:47:12.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:47:12.653 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:47:12.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:12.658 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:47:13.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:47:13.172 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:47:13.172 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:47:13.174 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:47:13.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:47:13.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:47:13.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:47:13.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:47:13.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:47:13.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:47:13.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:47:13.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:47:13.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:47:13.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:47:13.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:13.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:13.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:13.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:14.078 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:47:14.552 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:47:14.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:14.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:14.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:14.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:15.024 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:47:15.496 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:47:15.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:15.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:15.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:15.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:15.967 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:47:16.441 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:47:16.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:16.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:16.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:16.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:16.913 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:47:17.385 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:47:17.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:17.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:17.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:17.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:17.856 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:47:18.329 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:47:18.802 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:47:19.274 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:47:19.745 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:47:19.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:47:19.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:47:19.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:19.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:19.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:19.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:19.877 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:47:24.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:24.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:24.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:24.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:24.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:24.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:24.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:24.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:24.895 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:24.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:24.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:47:24.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:47:24.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:47:24.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:24.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:24.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:24.902 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:47:24.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:24.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:47:24.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:24.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:47:24.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:47:24.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:24.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:24.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:24.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:47:24.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:24.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:47:24.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:24.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:47:24.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:47:24.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:24.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:24.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:24.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:47:24.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:24.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:47:24.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:47:24.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:47:24.916 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:24.921 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:47:25.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:47:25.447 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:47:25.449 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:47:25.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:47:25.451 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:47:25.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:47:25.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:47:25.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:47:25.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:47:25.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:47:25.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:47:25.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:47:25.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:47:25.872 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:47:25.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:25.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:25.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:25.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:26.343 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:47:26.817 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:47:26.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:26.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:26.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:26.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:27.289 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:47:27.760 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:47:27.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:27.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:27.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:27.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:28.232 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:47:28.705 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:47:28.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:29.177 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:47:29.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:47:29.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:29.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:29.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:29.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:30.120 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:47:30.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:30.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:30.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:30.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:30.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:30.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:30.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:30.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:30.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:30.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.143 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:47:30.599 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:47:31.080 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:47:31.559 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:47:32.039 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:47:32.519 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:47:33.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:47:33.479 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:47:33.958 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:47:34.438 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:47:34.917 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:47:35.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:47:35.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:47:35.147 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:47:35.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:35.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:35.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:35.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:35.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:35.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:35.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:35.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:35.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:35.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:35.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:35.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:35.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:47:35.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:35.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:35.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:47:35.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:35.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:47:35.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:47:35.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:35.159 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:35.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:35.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:47:35.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:35.160 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:47:35.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:47:35.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:47:35.162 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:35.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:35.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:35.163 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:35.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:47:40.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:47:40.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:40.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:40.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:40.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:40.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:40.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:40.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:40.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:47:40.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:47:40.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:47:40.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:47:40.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:40.184 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:40.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:47:40.184 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:47:40.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:47:40.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:47:40.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:40.186 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:47:40.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:47:40.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:40.187 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:40.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:47:40.187 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:47:40.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:47:40.187 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:47:40.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:40.189 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:47:40.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:47:40.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:40.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:47:40.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:47:40.190 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:47:40.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:47:40.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:47:40.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:40.192 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:47:40.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:47:40.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:47:40.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:47:40.192 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:47:40.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:47:40.193 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:47:40.198 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:47:40.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:47:40.719 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:47:40.721 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:47:40.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:47:40.725 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:47:40.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:47:40.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:47:40.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:47:40.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:47:40.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:47:40.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:47:40.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:47:40.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:47:41.148 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:47:41.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:41.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:47:42.093 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:47:42.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:42.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:42.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:42.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:42.565 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:47:43.037 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:47:43.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:43.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:43.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:43.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:43.508 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:47:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:47:44.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:44.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:44.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:44.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:44.454 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:47:44.926 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:47:45.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:45.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:47:45.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:47:45.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:47:45.397 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:47:45.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:47:46.343 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:47:46.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:46.815 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:47:47.286 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:47:47.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:47.757 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:47:48.231 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:47:48.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:48.703 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:47:49.175 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:47:49.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:49.646 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:47:50.119 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:47:50.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:50.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:50.593 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:47:51.065 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:47:51.540 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:47:52.012 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:47:52.488 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:47:52.959 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:47:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:47:53.907 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:47:54.382 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:47:54.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:47:54.854 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:47:55.325 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:47:55.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:55.796 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:47:56.270 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:47:56.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:56.742 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:47:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:47:57.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:57.685 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:47:58.158 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:47:58.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:58.630 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:47:59.102 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:47:59.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:47:59.573 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:48:00.047 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:48:00.519 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:48:00.991 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:48:01.462 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:48:01.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:01.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:01.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:01.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:01.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:01.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:48:01.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:48:01.597 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:48:01.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:01.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:06.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:48:06.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:48:06.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:06.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:06.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:06.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:06.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:06.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:48:06.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:06.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:48:06.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:48:06.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:48:06.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:48:06.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:48:06.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:06.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:06.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:48:06.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:48:06.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:48:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:48:06.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:48:06.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:48:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:48:06.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:48:06.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:48:06.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:48:06.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:48:06.625 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:06.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:06.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:06.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:48:07.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:48:07.149 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:48:07.150 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:48:07.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:07.152 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:48:07.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:07.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:07.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:48:07.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:07.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:07.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:07.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:48:07.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:48:07.201 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:48:07.204 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:48:07.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 01:48:07.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:07.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:07.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:07.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:07.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:48:07.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:07.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:07.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:07.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 01:48:08.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:08.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:08.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:08.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:08.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:08.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:08.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:08.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:08.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:48:08.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:48:08.029 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:48:08.029 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:08.029 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:08.029 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:08.029 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:08.029 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:08.029 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:13.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:48:13.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:48:13.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:13.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:13.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:13.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:13.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:13.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:48:13.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:13.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:48:13.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:48:13.050 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:48:13.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:48:13.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:48:13.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:13.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:13.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:48:13.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:48:13.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:48:13.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:13.055 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:48:13.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:48:13.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:48:13.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:13.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:13.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:48:13.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:48:13.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:48:13.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:13.059 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:48:13.059 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:48:13.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:48:13.060 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:13.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:13.060 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:48:13.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:48:13.060 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:48:13.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:48:13.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:48:13.064 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:48:13.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:13.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:48:13.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:48:13.593 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:48:13.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:13.597 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:48:13.600 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:48:13.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:13.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:13.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:48:13.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:13.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:13.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:13.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:48:13.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:48:13.638 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:48:13.640 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:48:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 01:48:13.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:13.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:13.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:13.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:14.013 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:48:14.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:14.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:14.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:14.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:14.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 01:48:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:14.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:14.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:14.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:14.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:14.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:14.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:14.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:14.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:48:14.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:48:14.458 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:48:14.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:14.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:14.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:14.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:14.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:14.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:14.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:14.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:14.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:48:19.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:48:19.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:48:19.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:19.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:19.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:19.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:19.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:48:19.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:48:19.471 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:19.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:48:19.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:48:19.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:48:19.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:48:19.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:48:19.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:19.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:48:19.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:48:19.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:48:19.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:48:19.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:19.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:48:19.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:48:19.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:48:19.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:19.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:48:19.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:48:19.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:48:19.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:48:19.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:19.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:48:19.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:48:19.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:48:19.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:48:19.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:48:19.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:48:19.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:48:19.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:48:19.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:19.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:48:19.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:48:19.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:48:19.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:48:19.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:48:19.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:48:19.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:48:19.488 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:48:19.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:48:19.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:48:19.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:48:19.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:48:19.971 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:48:20.015 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:48:20.016 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:48:20.017 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:48:20.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:20.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:20.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:20.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:48:20.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:20.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:20.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:20.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:48:20.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:48:20.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:20.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:20.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:20.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:20.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:20.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:48:20.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:20.915 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:48:21.388 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:48:21.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:21.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:21.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:21.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:21.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:48:22.333 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:48:22.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:22.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:22.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:22.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:22.804 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:48:23.277 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:48:23.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:23.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:23.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:23.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:23.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:48:24.222 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:48:24.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:48:24.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:48:24.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:48:24.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:48:24.696 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:48:25.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:48:25.641 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:48:26.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:48:26.587 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:48:27.059 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:48:27.530 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:48:28.003 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:48:28.476 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:48:28.948 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:48:29.419 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:48:29.890 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:48:30.361 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:48:30.834 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:48:31.307 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:48:31.779 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:48:32.252 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:48:32.725 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:48:33.198 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:48:33.671 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:48:34.143 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:48:34.616 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:48:35.087 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:48:35.557 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:48:35.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:35.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:35.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:35.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:35.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:35.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:35.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:48:35.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:35.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:35.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:35.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:48:35.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:48:35.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:35.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:35.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:35.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:35.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:36.028 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:48:36.502 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:48:36.974 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:48:37.447 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:48:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:48:38.393 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:48:38.865 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:48:39.339 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:48:39.811 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:48:40.283 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:48:40.754 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:48:41.225 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:48:41.699 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:48:42.171 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:48:42.644 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:48:43.117 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:48:43.590 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:48:44.062 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:48:44.535 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:48:45.008 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:48:45.480 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:48:45.953 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:48:46.426 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:48:46.899 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:48:47.370 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:48:47.843 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:48:48.315 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:48:48.788 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:48:49.261 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:48:49.734 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:48:50.206 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:48:50.679 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:48:51.152 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:48:51.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:51.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:51.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:51.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:51.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:48:51.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:48:51.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:48:51.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:51.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:51.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:51.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:48:51.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:48:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:48:51.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:48:51.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:48:51.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:51.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:48:51.624 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:48:52.095 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:48:52.569 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:48:53.041 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:48:53.514 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:48:53.987 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 01:48:54.460 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 01:48:54.933 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 01:48:55.403 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 01:48:55.876 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 01:48:56.349 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 01:48:56.821 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 01:48:57.293 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 01:48:57.766 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 01:48:58.238 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 01:48:58.711 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 01:48:59.184 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 01:48:59.657 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 01:49:00.129 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 01:49:00.600 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 01:49:01.073 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 01:49:01.546 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 01:49:02.019 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 01:49:02.492 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 01:49:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 01:49:03.437 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 01:49:03.911 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 01:49:04.383 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 01:49:04.855 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 01:49:05.326 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 01:49:05.797 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 01:49:06.270 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 01:49:06.743 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 01:49:06.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:06.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:06.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:06.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:06.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:06.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:06.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:49:06.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:06.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:49:06.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:49:06.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:49:06.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:49:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:06.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:49:06.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:49:06.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:06.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:07.215 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 01:49:07.689 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 01:49:08.161 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 01:49:08.633 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 01:49:09.104 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 01:49:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 01:49:10.050 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 01:49:10.523 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 01:49:10.996 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 01:49:11.469 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 01:49:11.941 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 01:49:12.415 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 01:49:12.887 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 01:49:13.360 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 01:49:13.833 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 01:49:14.305 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 01:49:14.777 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 01:49:15.249 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 01:49:15.722 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 01:49:16.195 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 01:49:16.667 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 01:49:17.141 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 01:49:17.613 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 01:49:18.085 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 01:49:18.559 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 01:49:19.031 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 01:49:19.503 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 01:49:19.974 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 01:49:20.445 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 01:49:20.916 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 01:49:21.389 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 01:49:21.862 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 01:49:22.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:22.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:22.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:22.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:22.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:22.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:22.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:22.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:22.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:22.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:22.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:22.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:22.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:22.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:22.311 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:49:22.311 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:22.311 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:22.311 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:22.311 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:22.311 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:22.311 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:27.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:27.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:27.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:27.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:27.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:27.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:27.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:27.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:49:27.325 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:27.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:49:27.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:49:27.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:49:27.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:49:27.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:49:27.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:27.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:27.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:49:27.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:49:27.331 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:49:27.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:27.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:49:27.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:49:27.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:49:27.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:27.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:27.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:49:27.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:49:27.336 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:49:27.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:27.339 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:49:27.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:49:27.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:49:27.340 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:27.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:27.340 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:49:27.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:49:27.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:49:27.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:27.345 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:49:27.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:49:27.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:49:27.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:49:27.345 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:49:27.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:49:27.346 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:49:27.346 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:49:27.346 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:27.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:27.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:27.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:27.348 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:27.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:32.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:32.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:32.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:32.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:32.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:32.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:32.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:49:32.364 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:32.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:49:32.364 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:49:32.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:49:32.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:49:32.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:49:32.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:32.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:32.368 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:49:32.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:49:32.368 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:49:32.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:32.369 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:49:32.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:49:32.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:49:32.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:32.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:32.370 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:49:32.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:49:32.370 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:49:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:32.371 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:49:32.371 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:49:32.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:49:32.371 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:32.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:32.372 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:49:32.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:49:32.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:49:32.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:49:32.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:49:32.374 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:49:32.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:32.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:32.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:49:32.857 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:49:32.898 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:49:32.900 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:49:32.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:32.903 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:49:32.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:32.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:32.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:49:32.944 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:49:32.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:32.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:49:32.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:49:32.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:49:32.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:49:32.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:33.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:49:33.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:49:33.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:33.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:33.330 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:49:33.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:33.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:33.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:33.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:33.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:49:34.274 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:49:34.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:34.747 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:49:35.219 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:49:35.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:35.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:35.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:35.692 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:49:36.165 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:49:36.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:36.637 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:49:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:49:37.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:37.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:37.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:37.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:37.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:49:38.054 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:49:38.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:49:38.997 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:49:39.468 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:49:39.942 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:49:40.414 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:49:40.886 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:49:41.360 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:49:41.833 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:49:42.305 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:49:42.776 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:49:43.249 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:49:43.722 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:49:43.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:43.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:43.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:43.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:43.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:43.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:43.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:43.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:43.838 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:49:43.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:43.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:43.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:43.839 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:48.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:48.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:48.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:48.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:48.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:48.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:48.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:48.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:49:48.849 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:48.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:49:48.849 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:49:48.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:49:48.853 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:49:48.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:49:48.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:48.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:48.853 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:49:48.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:49:48.853 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:49:48.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:48.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:49:48.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:49:48.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:49:48.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:48.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:48.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:49:48.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:49:48.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:49:48.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:49:48.859 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:49:48.859 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:49:48.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:49:48.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:49:48.863 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:49:48.864 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:49:48.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:49:49.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:49:49.390 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:49:49.392 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:49:49.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:49.394 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:49:49.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:49.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:49.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:49:49.428 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:49:49.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:49.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:49:49.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:49:49.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:49:49.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:49:49.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:49.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:49:49.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:49:49.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:49.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:49.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:49:49.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:49.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:49.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:50.292 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:49:50.765 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:49:50.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:51.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:49:51.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:49:51.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:51.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:51.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:51.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:52.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:49:52.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:49:52.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:52.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:52.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:52.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:53.125 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:49:53.597 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:49:53.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:53.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:53.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:53.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:54.068 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:49:54.542 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:49:55.014 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:49:55.485 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:49:55.956 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:49:56.429 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:49:56.902 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:49:57.374 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:49:57.848 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:49:58.320 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:49:58.793 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:49:59.263 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:49:59.737 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:49:59.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:49:59.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:49:59.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:49:59.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:49:59.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:49:59.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:49:59.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:49:59.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:49:59.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:49:59.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:49:59.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:49:59.839 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:49:59.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:49:59.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:49:59.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:49:59.840 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:59.840 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:59.840 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:59.840 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:59.840 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:49:59.840 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:04.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:50:04.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:50:04.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:04.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:04.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:04.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:04.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:04.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:50:04.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:04.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:50:04.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:50:04.859 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:50:04.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:50:04.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:50:04.860 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:04.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:04.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:50:04.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:50:04.860 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:50:04.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:04.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:50:04.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:50:04.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:50:04.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:04.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:04.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:50:04.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:50:04.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:50:04.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:04.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:50:04.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:50:04.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:50:04.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:04.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:04.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:50:04.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:50:04.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:50:04.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:04.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:50:04.876 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:50:04.876 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:50:04.876 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:04.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:50:05.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:50:05.396 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:50:05.397 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:05.399 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:50:05.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:05.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:50:05.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:50:05.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:50:05.441 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:05.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:05.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:50:05.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:50:05.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:50:05.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:50:05.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:05.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:50:05.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:50:05.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:05.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:05.831 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:50:05.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:05.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:05.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:05.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:06.303 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:50:06.317 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:06.776 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:50:06.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:06.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:06.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:06.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:07.249 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:50:07.721 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:50:07.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:07.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:07.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:07.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:08.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:50:08.667 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:50:08.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:08.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:08.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:08.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:09.140 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:50:09.613 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:50:09.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:09.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:09.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:09.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:10.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:50:10.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:50:11.029 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:50:11.502 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:50:11.975 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:50:12.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:50:12.921 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:50:13.393 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:50:13.866 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:50:14.339 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:50:14.812 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:50:15.284 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:50:15.755 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:50:16.229 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:50:16.701 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:50:17.183 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:50:17.655 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:50:18.126 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:50:18.597 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:50:19.070 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:50:19.543 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:50:20.015 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:50:20.486 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:50:20.960 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:50:21.432 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:50:21.904 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:50:22.375 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:50:22.849 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:50:23.321 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:50:23.794 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:50:24.267 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:50:24.740 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:50:25.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:25.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:25.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:50:25.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:50:25.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:25.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:25.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:25.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:25.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:25.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:50:25.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:50:25.061 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:50:25.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:25.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:25.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:25.061 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4355 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:25.061 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4355 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:25.061 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4355 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:25.061 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4355 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:25.061 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4355 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:25.061 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4355 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:30.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:50:30.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:50:30.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:30.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:30.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:30.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:30.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:30.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:50:30.076 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:30.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:50:30.076 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:50:30.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:50:30.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:50:30.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:50:30.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:30.082 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:50:30.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:50:30.082 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:50:30.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:50:30.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:50:30.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:50:30.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:30.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:50:30.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:50:30.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:50:30.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:30.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:30.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:50:30.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:50:30.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:50:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:50:30.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:50:30.094 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:50:30.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:30.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:50:30.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:50:30.621 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:50:30.623 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:30.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:30.625 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:50:30.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:50:30.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:50:30.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:50:30.664 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:30.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:30.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:50:30.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:50:30.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:50:30.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:50:30.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:30.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:50:30.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:50:30.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:30.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:31.050 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:50:31.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:31.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:31.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:31.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:50:31.994 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:50:32.015 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:32.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:32.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:32.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:32.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:32.467 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:50:32.939 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:50:32.981 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:33.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:33.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:33.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:50:33.885 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:50:33.947 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:34.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:34.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:34.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:34.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:34.357 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:50:34.828 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:50:34.907 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:35.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:35.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:35.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:35.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:35.302 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:50:35.774 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:50:35.873 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:36.247 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:50:36.717 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:50:36.833 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:37.188 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:50:37.662 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:50:37.793 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:38.134 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:50:38.607 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:50:38.759 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:39.078 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:50:39.551 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:50:39.719 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:40.024 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:50:40.496 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:50:40.686 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:40.969 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:50:41.442 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:50:41.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:41.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:41.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:50:41.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:50:41.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:41.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:41.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:41.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:41.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:41.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:41.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:41.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:41.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:50:41.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:50:41.559 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:50:41.560 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:41.560 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:41.560 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:41.560 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:41.560 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:41.560 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:50:46.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:50:46.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:50:46.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:46.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:46.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:46.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:46.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:50:46.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:50:46.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:46.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:50:46.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:50:46.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:50:46.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:50:46.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:50:46.568 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:50:46.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:50:46.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:50:46.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:50:46.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:50:46.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:50:46.571 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:50:46.571 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:50:46.571 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:50:46.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:50:46.576 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:50:47.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:50:47.096 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:50:47.098 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:47.100 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:50:47.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:47.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:50:47.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:50:47.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:50:47.141 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:50:47.143 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:47.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:50:47.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:50:47.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:50:47.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:50:47.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:50:47.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:50:47.202 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:47.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:50:47.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:47.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:50:47.526 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:50:47.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:47.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:47.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:47.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:47.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:50:48.467 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:50:48.491 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:50:48.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:48.938 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:50:49.412 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:50:49.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:49.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:49.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:49.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:49.884 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:50:50.356 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:50:50.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:50.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:50.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:50.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:50.827 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:50:51.298 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:50:51.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:50:51.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:50:51.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:50:51.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:50:51.771 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:50:52.244 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:50:52.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:50:53.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:50:53.662 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:50:54.135 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:50:54.606 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:50:55.079 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:50:55.552 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:50:56.024 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:50:56.498 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:50:56.970 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:50:57.443 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:50:57.916 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:50:58.123 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:50:58.389 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:50:58.861 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:50:59.335 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:50:59.807 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:51:00.280 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:51:00.753 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:51:01.226 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:51:01.698 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:51:02.172 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:51:02.644 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:51:03.117 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:51:03.590 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:51:03.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:03.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:03.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:03.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:03.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:03.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:03.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:03.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:03.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:03.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:03.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:03.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:03.931 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:51:03.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:03.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:03.932 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3748 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:03.932 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3748 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:03.932 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3748 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:03.932 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3748 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:03.932 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3748 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:03.932 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3748 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:08.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:08.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:08.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:08.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:08.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:08.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:08.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:08.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:08.939 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:08.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:08.939 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:08.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:08.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:51:08.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:08.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:08.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:51:08.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:08.942 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:51:08.942 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:51:08.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:08.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:08.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:08.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:51:08.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:08.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:51:08.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:08.944 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:51:08.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:51:08.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:51:08.945 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:51:08.945 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:51:08.945 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:08.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:08.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:51:09.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:51:09.469 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:51:09.471 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:51:09.473 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:51:09.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:09.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:09.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:09.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:09.513 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:51:09.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:09.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:09.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:09.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:09.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:09.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:09.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:09.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:09.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:09.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:09.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:51:09.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:10.369 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:51:10.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:51:10.864 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:51:10.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:10.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:10.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:10.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:11.314 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:51:11.786 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:51:11.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:11.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:11.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:11.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:12.258 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:51:12.729 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:51:12.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:12.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:12.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:12.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:13.200 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:51:13.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:51:13.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:13.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:13.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:14.146 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:51:14.619 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:51:15.092 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:51:15.565 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:51:16.037 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:51:16.508 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:51:16.981 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:51:17.454 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:51:17.926 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:51:18.397 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:51:18.871 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:51:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:51:19.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:19.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:19.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:19.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:19.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:19.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:19.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:19.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:19.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:19.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:19.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:19.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:19.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:19.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:19.602 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:51:19.602 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:19.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:24.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:24.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:24.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:24.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:24.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:24.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:24.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:24.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:24.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:24.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:24.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:51:24.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:51:24.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:51:24.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:24.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:24.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:24.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:51:24.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:24.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:51:24.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:24.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:51:24.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:51:24.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:24.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:24.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:24.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:51:24.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:24.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:51:24.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:24.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:51:24.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:51:24.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:24.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:24.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:24.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:51:24.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:24.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:51:24.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:51:24.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:51:24.634 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:51:24.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:24.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:51:25.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:51:25.155 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:51:25.157 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:51:25.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:25.158 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:51:25.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:25.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:25.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:25.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:25.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:25.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:25.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:25.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:25.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:25.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:25.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:51:25.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:25.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:25.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:25.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:25.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:25.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:25.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:25.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:25.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:25.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:25.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:25.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:25.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:25.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:25.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:25.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:25.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:25.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:26.060 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:51:26.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:26.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:26.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:26.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:26.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:26.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:26.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:26.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:26.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:26.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:26.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:26.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:26.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:26.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:26.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:26.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:26.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:26.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:26.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:26.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:26.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:26.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:26.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:26.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:26.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:26.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.530 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:51:26.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:26.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:26.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:26.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:26.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:26.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:26.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:26.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:26.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:26.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:26.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:26.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:26.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:26.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:26.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:26.936 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:51:26.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:26.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:26.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:26.936 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:26.936 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:26.936 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:26.936 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:26.936 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:26.936 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:31.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:31.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:31.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:31.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:31.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:31.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:31.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:31.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:31.948 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:31.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:31.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:51:31.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:51:31.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:51:31.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:31.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:31.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:31.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:51:31.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:31.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:51:31.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:31.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:51:31.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:51:31.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:31.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:31.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:31.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:51:31.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:31.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:51:31.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:31.963 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:51:31.963 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:51:31.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:31.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:31.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:31.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:51:31.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:31.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:51:31.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:51:31.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:51:31.969 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:51:31.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:31.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:51:32.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:51:32.496 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:51:32.499 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:51:32.501 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:51:32.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:32.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:32.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:32.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:32.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:32.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:32.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:32.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:32.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:32.544 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:51:32.548 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 01:51:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:32.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:32.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:32.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:32.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:32.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:51:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:32.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:32.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:32.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:32.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:32.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:32.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:32.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:32.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:32.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:32.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:32.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:32.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:32.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:32.948 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:51:32.948 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:32.948 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:32.948 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:32.948 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:32.948 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:32.948 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:37.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:37.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:37.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:37.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:37.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:37.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:37.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:37.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:37.957 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:37.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:37.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:51:37.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:51:37.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:51:37.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:37.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:37.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:37.961 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:51:37.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:37.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:51:37.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:37.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:51:37.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:51:37.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:37.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:37.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:37.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:51:37.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:37.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:51:37.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:37.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:51:37.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:51:37.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:37.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:37.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:37.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:51:37.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:37.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:51:37.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:51:37.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:51:37.968 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:51:37.968 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:51:37.968 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:37.973 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:51:38.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:51:38.498 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:51:38.500 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:51:38.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:38.503 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:51:38.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:38.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:38.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:38.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:38.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:38.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:38.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:38.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:38.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:38.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:38.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:38.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:38.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:38.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:38.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:51:38.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:38.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:38.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:38.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:39.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:51:39.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:51:39.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:39.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:39.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:39.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:40.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:51:40.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:51:40.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:40.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:40.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:40.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:41.289 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:51:41.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:41.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:41.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:41.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:41.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:41.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:41.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:41.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:41.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:41.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:41.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:41.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:41.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:41.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:41.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:41.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:41.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:41.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:51:41.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:41.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:41.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:41.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:41.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:42.232 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:51:42.705 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:51:42.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:42.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:42.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:42.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:43.177 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:51:43.650 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:51:44.121 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:51:44.591 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:51:44.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:44.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:44.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:44.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:44.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:44.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:44.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:44.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:44.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:44.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:44.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:44.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:44.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:44.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:44.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:44.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:44.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:45.062 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:51:45.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:45.533 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:51:46.003 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:51:46.474 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:51:46.947 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:51:47.420 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:51:47.892 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:51:48.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:48.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:48.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:48.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:48.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:48.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:48.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:48.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:48.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:48.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:48.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:48.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:48.363 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:51:48.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:48.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:48.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:48.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:48.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:48.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:48.834 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:51:49.308 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:51:49.780 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:51:50.252 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:51:50.723 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:51:51.196 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:51:51.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:51.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:51.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:51.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:51.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:51.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:51.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:51.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:51.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:51.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:51.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:51.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:51.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:51.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:51.543 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:51.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:51:56.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:51:56.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:51:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:56.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:56.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:51:56.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:56.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:56.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:51:56.551 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:56.552 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:51:56.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:51:56.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:56.555 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:51:56.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:51:56.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:56.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:51:56.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:51:56.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:56.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:51:56.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:51:56.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:51:56.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:51:56.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:51:56.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:51:56.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:51:56.562 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:51:56.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:51:56.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:51:56.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:51:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:51:57.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:51:57.090 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:51:57.091 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:51:57.092 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:51:57.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:51:57.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:51:57.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:51:57.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:51:57.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:51:57.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:51:57.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:51:57.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:51:57.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:51:57.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:51:57.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:57.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:57.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:57.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:57.985 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:51:58.456 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:51:58.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:58.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:58.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:58.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:58.929 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:51:59.402 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:51:59.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:51:59.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:51:59.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:51:59.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:51:59.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:52:00.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:52:00.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:00.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:00.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:00.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:00.818 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:52:01.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:52:01.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:01.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:01.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:01.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:01.762 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:52:02.233 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:52:02.706 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:52:03.179 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:52:03.651 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:52:04.122 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:52:04.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:52:05.067 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:52:05.539 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:52:06.010 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:52:06.484 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:52:06.956 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:52:07.428 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:52:07.899 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:52:08.370 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:52:08.844 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:52:09.316 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:52:09.787 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:52:10.258 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:52:10.732 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:52:11.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:52:11.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:52:11.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:11.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:11.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:11.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:11.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:52:11.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:52:11.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:52:11.029 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:52:11.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:52:11.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:52:11.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:52:11.030 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:11.030 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:11.030 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:11.030 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:11.030 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:11.030 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:16.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:52:16.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:52:16.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:52:16.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:52:16.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:52:16.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:52:16.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:52:16.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:52:16.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:16.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:52:16.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:52:16.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:52:16.046 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:52:16.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:52:16.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:16.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:52:16.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:52:16.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:52:16.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:52:16.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:16.051 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:52:16.051 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:52:16.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:52:16.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:16.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:52:16.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:52:16.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:52:16.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:52:16.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:16.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:52:16.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:52:16.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:52:16.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:16.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:52:16.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:52:16.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:52:16.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:52:16.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:16.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:52:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:52:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:52:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:52:16.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:52:16.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:52:16.063 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:52:16.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:16.068 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:52:16.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:52:16.595 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:52:16.596 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:52:16.597 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:52:16.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:52:16.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:52:16.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:52:16.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:52:16.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:52:16.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:52:16.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:52:16.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:52:16.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:52:16.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:52:16.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:52:16.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:52:16.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:52:16.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:52:17.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:52:17.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:17.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:17.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:17.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:17.491 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:52:17.964 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:52:18.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:18.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:18.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:18.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:18.437 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:52:18.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:52:18.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:52:18.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:52:18.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:52:18.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:52:18.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:52:18.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:52:18.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:52:18.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:52:18.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:52:19.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:19.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:19.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:19.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:19.380 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:52:19.853 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:52:20.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:20.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:20.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:20.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:20.326 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:52:20.798 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:52:21.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:21.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:21.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:21.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:21.269 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:52:21.743 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:52:22.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:52:22.687 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:52:23.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:52:23.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:52:24.104 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:52:24.576 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:52:25.047 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:52:25.519 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:52:25.992 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:52:26.464 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:52:26.935 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:52:27.418 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:52:27.890 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:52:28.361 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:52:28.834 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:52:29.307 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:52:29.779 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:52:30.250 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:52:30.724 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:52:31.196 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:52:31.668 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:52:32.139 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:52:32.612 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:52:33.084 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:52:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:52:33.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:52:33.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:52:33.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:33.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:33.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:33.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:33.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:52:33.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:52:33.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:52:33.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:52:33.389 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:52:33.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:52:33.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:52:33.389 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:33.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3740 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:52:38.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:52:38.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:52:38.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:52:38.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:52:38.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:52:38.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:52:38.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:52:38.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:52:38.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:38.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:52:38.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:52:38.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:52:38.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:52:38.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:52:38.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:38.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:52:38.405 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:52:38.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:52:38.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:52:38.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:52:38.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:52:38.407 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:52:38.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:52:38.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:52:38.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:52:38.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:52:38.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:52:38.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:52:38.412 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:52:38.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:52:38.416 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:52:38.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:52:38.935 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:52:38.937 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:52:38.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:52:38.940 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:52:38.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:52:38.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:52:38.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:52:38.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:52:38.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:52:38.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:52:38.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:52:38.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:52:39.367 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:52:39.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:39.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:52:40.311 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:52:40.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:40.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:40.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:40.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:40.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:52:41.255 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:52:41.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:41.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:41.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:41.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:41.726 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:52:42.200 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:52:42.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:42.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:42.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:42.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:42.672 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:52:43.144 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:52:43.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:52:43.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:52:43.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:52:43.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:52:43.615 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:52:44.087 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:52:44.560 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:52:45.032 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:52:45.503 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:52:45.976 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:52:46.449 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:52:46.922 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:52:47.392 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:52:47.866 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:52:48.338 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:52:48.810 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:52:49.281 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:52:49.755 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:52:50.227 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:52:50.699 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:52:51.170 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:52:51.641 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:52:52.114 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:52:52.586 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:52:53.058 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:52:53.529 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:52:54.002 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:52:54.475 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:52:54.946 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:52:55.418 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:52:55.888 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:52:56.362 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:52:56.834 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:52:57.306 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:52:57.777 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:52:58.250 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:52:58.722 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:52:59.194 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:52:59.665 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:53:00.139 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:53:00.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:53:00.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:53:00.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:00.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:00.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:00.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:00.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:53:00.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:53:00.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:53:00.436 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:53:00.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:53:00.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:53:00.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:00.436 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:05.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:53:05.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:53:05.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:53:05.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:53:05.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:53:05.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:53:05.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:53:05.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:53:05.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:05.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:53:05.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:53:05.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:53:05.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:53:05.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:53:05.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:05.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:53:05.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:53:05.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:53:05.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:53:05.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:53:05.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:53:05.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:53:05.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:05.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:53:05.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:53:05.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:53:05.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:05.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:53:05.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:53:05.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:53:05.456 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:53:05.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:53:05.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:53:05.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:53:05.459 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:53:05.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:05.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:05.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:05.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:53:05.939 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:53:05.980 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:53:05.981 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:53:05.982 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:53:05.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:53:05.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:53:05.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:53:05.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:53:05.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:53:05.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:53:05.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:53:05.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:53:05.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:53:06.411 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:53:06.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:06.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:06.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:06.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:06.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:53:07.356 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:53:07.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:07.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:07.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:07.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:07.828 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:53:08.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:53:08.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:08.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:08.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:08.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:08.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:53:09.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:53:09.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:09.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:09.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:09.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:09.717 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:53:10.189 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:53:10.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:10.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:10.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:10.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:10.662 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:53:11.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:53:11.606 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:53:12.077 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:53:12.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:53:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:53:13.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:53:13.966 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:53:14.440 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:53:14.912 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:53:15.383 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:53:15.855 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:53:16.328 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:53:16.800 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:53:17.272 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:53:17.744 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:53:18.217 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:53:18.689 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:53:19.161 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:53:19.634 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:53:20.107 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:53:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:53:21.049 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:53:21.520 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:53:21.993 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:53:22.466 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:53:22.938 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:53:23.409 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:53:23.882 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:53:24.354 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:53:24.827 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:53:25.297 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:53:25.771 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:53:26.243 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:53:26.716 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:53:27.189 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:53:27.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:53:27.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:53:27.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:27.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:27.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:27.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:27.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:53:27.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:53:27.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:53:27.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:53:27.485 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:53:27.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:53:27.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:53:27.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:27.487 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4759 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:53:32.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:53:32.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:53:32.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:53:32.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:53:32.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:53:32.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:53:32.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:53:32.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:53:32.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:32.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:53:32.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:53:32.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:53:32.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:53:32.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:53:32.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:53:32.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:53:32.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:53:32.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:53:32.504 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:53:32.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:53:32.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:53:32.506 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:53:32.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:53:32.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:53:32.508 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:53:32.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:53:32.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:53:32.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:53:33.027 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:53:33.028 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:53:33.030 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:53:33.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:53:33.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:53:33.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:53:33.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:53:33.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:53:33.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:53:33.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:53:33.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:53:33.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:53:33.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:53:33.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:33.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:33.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:33.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:53:34.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:53:34.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:34.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:34.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:34.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:53:35.351 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:53:35.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:35.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:35.823 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:53:36.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:53:36.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:36.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:36.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:36.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:36.768 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:53:37.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:53:37.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:53:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:53:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:53:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:53:37.711 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:53:38.184 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:53:38.657 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:53:39.129 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:53:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:53:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:53:40.546 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:53:41.017 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:53:41.489 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:53:41.962 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:53:42.434 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:53:42.906 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:53:43.377 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:53:43.851 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:53:44.323 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:53:44.795 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:53:45.266 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:53:45.739 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:53:46.212 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:53:46.684 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:53:47.155 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:53:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:53:48.100 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:53:48.572 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:53:49.043 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:53:49.517 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:53:49.989 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:53:50.461 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:53:50.932 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:53:51.405 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:53:51.878 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:53:52.349 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:53:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:53:53.294 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:53:53.766 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:53:54.239 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:53:54.712 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:53:55.185 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:53:55.656 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:53:56.128 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:53:56.601 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:53:57.073 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:53:57.545 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:53:58.016 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:53:58.487 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:53:58.961 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:53:59.433 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:53:59.905 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:54:00.379 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:54:00.851 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:54:01.323 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:54:01.794 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:54:02.267 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:54:02.739 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:54:03.212 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:54:03.684 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:54:04.157 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:54:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:54:05.100 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:54:05.571 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:54:06.044 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:54:06.516 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:54:06.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:54:06.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:54:06.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:06.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:06.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:06.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:06.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:06.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:06.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:06.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:06.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:06.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:06.537 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:54:06.537 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:54:06.537 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:54:06.537 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:54:06.537 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:54:06.537 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:54:06.537 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:54:11.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:11.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:11.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:11.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:11.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:11.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:11.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:11.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:11.544 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:11.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:11.545 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:54:11.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:54:11.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:54:11.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:11.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:11.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:11.546 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:54:11.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:11.546 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:54:11.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:11.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:11.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:54:11.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:11.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:11.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:54:11.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:54:11.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:54:11.550 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:54:11.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:11.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:11.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:54:12.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:54:12.075 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:54:12.077 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:54:12.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:54:12.079 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:54:12.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:54:12.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:54:12.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:54:12.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:54:12.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:54:12.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:54:12.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:54:12.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:54:12.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:54:12.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:12.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:12.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:12.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:12.976 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:54:13.447 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:54:13.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:13.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:13.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:13.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:13.920 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:54:14.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:54:14.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:14.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:14.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:14.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:14.864 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:54:15.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:54:15.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:15.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:15.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:15.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:15.808 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:54:16.281 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:54:16.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:16.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:16.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:16.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:16.753 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:54:17.224 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:54:17.697 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:54:18.169 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:54:18.642 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:54:19.115 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:54:19.588 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:54:20.060 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:54:20.531 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:54:21.004 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:54:21.476 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:54:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:54:22.419 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:54:22.893 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:54:23.365 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:54:23.837 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:54:24.308 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:54:24.781 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:54:25.254 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:54:25.726 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:54:26.199 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:54:26.672 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:54:27.143 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:54:27.615 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:54:28.088 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:54:28.560 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:54:29.032 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:54:29.503 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:54:29.977 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:54:30.449 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:54:30.921 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:54:31.392 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:54:31.866 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:54:32.338 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:54:32.809 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:54:33.281 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:54:33.754 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:54:34.226 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:54:34.698 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:54:35.169 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:54:35.643 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:54:36.115 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:54:36.587 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:54:37.058 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:54:37.531 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:54:38.004 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:54:38.476 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:54:38.947 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:54:39.421 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:54:39.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:54:39.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:54:39.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:39.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:39.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:39.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:39.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:39.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:39.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:39.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:39.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:39.576 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:54:39.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:44.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:44.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:44.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:44.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:44.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:44.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:44.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:44.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:44.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:44.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:44.591 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:54:44.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:54:44.594 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:54:44.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:44.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:44.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:44.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:54:44.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:44.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:54:44.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:44.597 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:44.597 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:54:44.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:44.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:44.599 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:54:44.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:44.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:54:44.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:54:44.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:54:44.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:54:44.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:54:44.602 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:54:44.602 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:54:44.602 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:44.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:44.607 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:54:45.085 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:54:45.132 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:54:45.134 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:54:45.136 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:54:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:54:45.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:45.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:45.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:45.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:45.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:45.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:45.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:45.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:45.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:45.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:45.152 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:54:50.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:50.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:50.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:50.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:50.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:50.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:50.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:50.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:50.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:50.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:50.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:54:50.161 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:54:50.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:54:50.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:50.162 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:50.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:50.162 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:54:50.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:50.162 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:54:50.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:50.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:50.163 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:54:50.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:50.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:50.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:54:50.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:54:50.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:54:50.166 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:54:50.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:50.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:54:50.649 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:54:50.680 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:54:50.681 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:54:50.682 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:54:50.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:54:50.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:50.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:50.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:50.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:50.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:50.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:50.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:50.740 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:54:55.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:55.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:55.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:55.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:55.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:55.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:55.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:55.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:55.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:55.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:54:55.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:54:55.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:54:55.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:54:55.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:55.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:55.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:55.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:54:55.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:54:55.759 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:54:55.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:55.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:54:55.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:54:55.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:55.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:55.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:55.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:54:55.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:54:55.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:54:55.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:55.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:54:55.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:54:55.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:55.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:54:55.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:54:55.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:54:55.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:54:55.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:54:55.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:55.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:55.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:54:55.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:54:55.774 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:54:55.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:54:55.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:54:55.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:54:55.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:54:56.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:54:56.310 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:54:56.312 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:54:56.313 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:54:56.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:54:56.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:54:56.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:54:56.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:54:56.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:54:56.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:54:56.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:54:56.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:54:56.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:54:56.326 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:54:56.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:54:56.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:01.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:01.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:01.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:01.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:01.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:01.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:01.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:01.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:01.341 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:01.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:01.341 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:55:01.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:55:01.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:55:01.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:01.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:01.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:01.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:55:01.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:01.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:55:01.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:01.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:55:01.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:55:01.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:01.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:01.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:01.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:55:01.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:01.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:55:01.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:01.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:55:01.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:55:01.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:01.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:01.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:01.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:55:01.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:01.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:55:01.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:01.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:55:01.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:55:01.357 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:55:01.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:01.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:55:01.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:55:01.890 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:55:01.891 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:55:01.891 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:55:01.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:55:01.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:01.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:01.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:55:01.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:55:01.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:55:01.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:55:01.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:55:01.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:55:02.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:55:02.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:02.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:02.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:02.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:02.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:55:03.258 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:55:03.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:03.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:03.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:03.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:03.730 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:55:04.202 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:55:04.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:04.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:04.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:04.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:04.673 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:55:05.147 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:55:05.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:05.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:05.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:05.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:05.619 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:55:06.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:55:06.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:06.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:06.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:06.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:06.562 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:55:07.035 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:55:07.508 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:55:07.980 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:55:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:55:08.924 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:55:09.396 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:55:09.868 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:55:09.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:09.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:09.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:09.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:09.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:09.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:09.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:09.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:09.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:09.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:09.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:09.950 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:55:09.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:09.950 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:55:14.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:14.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:14.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:14.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:14.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:14.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:14.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:14.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:14.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:14.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:14.966 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:55:14.971 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:55:14.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:55:14.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:14.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:14.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:14.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:55:14.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:14.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:55:14.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:14.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:55:14.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:55:14.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:14.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:14.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:14.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:55:14.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:14.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:55:14.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:14.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:55:14.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:55:14.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:14.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:14.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:14.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:55:14.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:14.982 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:55:14.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:55:14.987 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:55:14.987 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:55:14.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:14.992 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:55:15.466 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:55:15.512 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:55:15.513 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:55:15.515 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:55:15.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:55:15.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:15.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:15.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:55:15.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:55:15.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:55:15.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:55:15.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:55:15.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:55:15.938 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:55:15.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:15.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:16.409 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:55:16.882 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:55:16.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:16.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:17.355 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:55:17.826 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:55:17.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:17.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:17.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:17.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:18.298 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:55:18.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:55:18.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:18.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:18.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:19.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:55:19.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:55:19.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:19.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:19.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:19.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:20.187 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:55:20.660 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:55:21.132 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:55:21.604 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:55:22.075 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:55:22.549 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:55:23.021 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:55:23.493 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:55:23.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:23.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:23.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:23.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:23.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:23.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:23.569 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:55:28.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:28.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:28.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:28.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:28.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:28.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:28.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:28.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:28.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:28.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:28.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:55:28.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:55:28.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:55:28.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:28.586 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:28.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:28.587 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:55:28.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:28.587 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:55:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:28.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:28.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:55:28.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:28.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:55:28.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:55:28.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:28.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:28.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:28.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:55:28.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:28.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:55:28.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:28.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:55:28.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:55:28.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:55:28.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:55:28.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:55:28.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:55:28.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:55:28.596 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:55:28.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:28.601 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:55:29.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:55:29.125 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:55:29.127 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:55:29.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:55:29.130 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:55:29.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:29.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:29.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:55:29.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:55:29.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:55:29.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:55:29.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:55:29.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:55:29.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:55:29.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:29.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:29.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:29.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:30.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:55:30.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:55:30.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:30.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:30.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:30.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:30.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:55:31.439 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:55:31.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:31.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:31.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:31.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:31.906 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:55:32.377 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:55:32.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:32.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:32.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:32.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:32.851 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:55:33.323 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:55:33.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:33.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:33.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:33.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:33.795 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:55:34.269 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:55:34.741 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:55:35.213 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:55:35.684 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:55:36.158 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:55:36.629 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:55:37.101 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:55:37.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:37.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:37.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:37.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:37.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:37.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:37.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:37.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:37.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:37.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:37.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:37.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:37.186 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:55:42.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:42.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:42.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:42.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:42.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:42.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:42.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:42.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:42.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:42.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:42.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:55:42.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:55:42.208 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:55:42.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:42.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:42.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:42.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:55:42.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:42.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:55:42.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:42.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:42.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:55:42.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:42.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:42.212 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:55:42.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:55:42.214 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:55:42.214 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:55:42.214 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:42.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:42.219 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:55:42.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:55:42.735 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:55:42.736 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:55:42.737 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:55:42.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:55:42.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:42.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:42.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:55:42.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:55:42.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:55:42.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:55:42.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:55:42.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:55:43.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:55:43.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:43.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:43.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:43.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:43.641 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:55:44.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:55:44.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:44.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:44.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:44.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:44.585 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:55:45.058 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:55:45.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:45.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:45.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:45.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:45.530 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:55:46.001 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:55:46.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:46.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:46.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:46.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:46.471 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:55:46.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:55:47.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:47.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:47.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:47.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:47.417 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:55:47.889 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:55:48.360 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:55:48.831 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:55:49.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:55:49.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:55:50.249 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:55:50.722 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:55:50.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:50.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:50.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:50.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:50.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:50.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:50.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:50.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:50.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:50.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:50.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:50.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:50.753 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:55:55.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:55:55.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:55:55.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:55.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:55.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:55.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:55.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:55:55.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:55.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:55.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:55:55.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:55:55.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:55:55.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:55:55.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:55.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:55.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:55:55.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:55:55.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:55:55.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:55:55.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:55.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:55:55.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:55:55.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:55.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:55.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:55:55.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:55:55.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:55:55.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:55:55.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:55.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:55:55.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:55:55.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:55.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:55:55.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:55:55.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:55:55.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:55:55.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:55:55.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:55:55.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:55:55.791 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:55:55.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:55:55.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:55:55.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:55:56.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:55:56.320 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:55:56.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:55:56.324 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:55:56.327 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:55:56.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:55:56.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:55:56.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:55:56.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:55:56.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:55:56.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:55:56.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:55:56.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:55:56.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:55:56.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:56.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:56.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:56.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:57.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:55:57.691 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:55:57.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:57.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:57.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:57.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:58.164 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:55:58.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:55:58.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:58.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:58.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:58.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:55:59.107 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:55:59.580 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:55:59.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:55:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:55:59.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:55:59.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:00.053 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:56:00.525 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:56:00.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:00.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:00.996 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:56:01.469 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:56:01.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:56:02.413 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:56:02.884 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:56:03.358 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:56:03.830 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:56:04.302 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:56:04.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:56:04.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:56:04.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:04.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:04.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:04.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:04.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:04.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:04.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:04.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:04.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:56:04.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:56:04.377 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:56:09.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:56:09.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:56:09.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:09.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:09.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:09.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:09.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:09.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:56:09.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:09.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:56:09.397 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:56:09.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:56:09.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:56:09.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:56:09.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:09.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:56:09.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:09.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:56:09.402 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:56:09.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:09.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:56:09.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:56:09.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:56:09.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:09.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:09.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:56:09.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:56:09.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:56:09.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:09.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:56:09.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:56:09.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:56:09.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:09.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:09.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:56:09.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:56:09.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:56:09.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:09.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:56:09.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:56:09.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:56:09.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:56:09.421 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:56:09.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:09.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:09.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:09.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:56:09.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:56:09.954 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:56:09.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:56:09.957 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:56:09.960 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:56:09.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:56:09.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:56:09.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:56:09.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:56:09.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:56:09.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:56:09.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:56:09.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:56:10.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:56:10.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:10.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:10.848 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:56:11.321 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:56:11.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:11.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:11.794 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:56:12.266 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:56:12.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:12.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:12.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:12.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:12.737 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:56:13.210 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:56:13.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:13.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:13.683 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:56:14.154 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:56:14.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:14.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:14.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:14.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:14.625 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:56:15.096 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:56:15.570 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:56:16.042 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:56:16.514 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:56:16.985 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:56:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:56:17.931 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:56:18.403 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:56:18.874 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:56:19.347 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:56:19.820 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:56:20.291 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:56:20.763 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:56:21.236 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:56:21.709 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:56:22.181 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:56:22.652 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:56:23.125 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:56:23.597 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:56:24.069 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:56:24.541 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:56:25.014 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:56:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:56:25.958 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:56:26.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:56:26.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:56:26.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:26.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:26.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:26.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:26.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:26.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:56:26.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:56:26.003 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:56:26.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:26.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:26.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:26.004 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3582 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:26.004 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3582 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:26.004 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3582 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:26.004 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3582 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:26.004 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3582 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:26.004 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3582 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:31.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:56:31.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:56:31.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:31.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:31.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:31.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:31.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:31.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:56:31.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:31.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:56:31.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:56:31.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:56:31.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:56:31.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:56:31.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:31.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:31.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:56:31.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:56:31.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:56:31.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:31.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:56:31.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:56:31.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:56:31.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:31.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:31.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:56:31.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:56:31.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:56:31.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:31.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:56:31.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:56:31.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:56:31.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:31.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:31.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:56:31.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:56:31.032 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:56:31.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:56:31.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:56:31.038 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:56:31.038 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:56:31.038 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:31.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:31.043 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:56:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:56:31.568 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:56:31.570 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:56:31.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:56:31.574 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:56:31.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:56:31.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:56:31.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:56:31.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:56:31.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:56:31.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:56:31.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:56:31.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:56:31.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:56:32.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:32.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:32.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:56:32.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:56:33.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:33.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:33.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:33.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:33.407 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:56:33.880 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:56:34.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:34.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:34.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:34.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:34.351 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:56:34.822 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:56:35.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:35.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:35.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:35.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:35.293 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:56:35.764 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:56:36.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:36.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:36.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:36.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:36.237 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:56:36.709 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:56:37.181 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:56:37.652 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:56:38.126 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:56:38.598 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:56:39.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:56:39.543 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:56:39.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:56:39.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:56:39.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:39.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:39.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:39.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:39.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:39.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:39.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:39.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:39.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:56:39.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:56:39.638 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:56:39.638 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:39.638 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:39.638 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:39.638 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:39.638 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:56:44.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:56:44.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:56:44.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:44.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:44.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:44.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:44.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:56:44.645 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:56:44.645 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:44.645 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:56:44.645 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:56:44.647 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:56:44.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:56:44.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:56:44.648 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:44.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:56:44.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:56:44.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:56:44.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:56:44.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:44.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:56:44.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:56:44.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:56:44.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:44.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:56:44.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:56:44.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:56:44.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:56:44.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:44.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:56:44.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:56:44.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:56:44.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:56:44.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:56:44.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:56:44.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:56:44.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:56:44.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:44.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:56:44.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:56:44.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:56:44.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:56:44.660 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:56:44.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:56:44.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:56:44.661 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:56:44.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:56:44.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:56:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:56:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:56:45.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:56:45.193 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:56:45.196 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:56:45.198 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:56:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:56:45.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:56:45.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:56:45.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:56:45.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:56:45.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:56:45.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:56:45.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:56:45.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:56:45.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:56:45.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:45.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:45.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:45.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:46.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:56:46.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:56:46.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:46.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:46.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:46.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:47.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:56:47.506 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:56:47.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:47.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:47.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:47.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:47.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:56:48.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:56:48.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:48.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:48.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:48.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:48.923 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:56:49.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:56:49.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:56:49.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:56:49.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:56:49.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:56:49.866 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:56:50.337 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:56:50.810 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:56:51.282 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:56:51.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:56:52.225 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:56:52.699 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:56:53.171 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:56:53.642 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:56:54.114 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:56:54.585 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:56:55.058 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:56:55.530 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:56:56.002 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:56:56.473 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:56:56.944 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:56:57.418 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:56:57.890 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:56:58.362 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:56:58.833 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:56:59.307 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:56:59.779 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:57:00.251 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:57:00.722 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:57:01.195 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:57:01.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:01.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:01.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:01.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:01.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:01.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:01.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:01.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:01.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:01.268 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:01.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:01.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:01.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:01.268 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3588 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:01.268 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3588 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:01.268 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3588 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:01.268 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3588 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:01.268 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3588 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:01.268 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3588 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:06.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:06.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:06.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:06.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:06.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:06.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:06.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:06.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:06.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:06.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:06.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:06.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:06.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:06.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:06.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:06.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:06.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:06.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:06.289 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:06.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:06.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:06.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:06.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:06.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:06.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:06.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:06.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:06.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:06.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:06.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:06.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:06.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:06.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:06.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:06.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:06.298 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:06.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:06.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:06.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:06.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:06.827 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:06.829 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:06.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:06.833 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:06.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:06.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:06.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:06.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:06.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:06.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:06.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:06.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:06.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:06.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:06.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:06.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:06.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:06.872 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:06.873 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:06.873 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:06.873 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:06.873 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:06.873 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:06.873 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:11.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:11.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:11.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:11.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:11.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:11.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:11.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:11.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:11.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:11.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:11.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:11.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:11.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:11.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:11.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:11.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:11.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:11.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:11.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:11.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:11.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:11.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:11.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:11.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:11.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:11.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:11.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:11.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:11.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:11.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:11.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:11.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:11.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:11.894 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:11.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:11.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:11.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:11.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:12.429 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:12.431 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:12.433 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:12.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:12.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:12.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:12.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:12.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:12.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:12.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:12.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:12.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:12.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:12.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:12.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:12.470 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:12.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:12.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:12.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:17.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:17.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:17.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:17.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:17.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:17.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:17.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:17.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:17.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:17.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:17.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:17.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:17.490 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:17.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:17.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:17.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:17.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:17.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:17.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:17.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:17.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:17.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:17.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:17.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:17.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:17.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:17.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:17.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:17.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:17.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:17.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:17.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:17.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:17.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:17.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:17.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:17.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:17.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:17.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:17.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:17.507 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:17.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:17.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:17.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:17.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:17.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:18.037 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:18.038 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:18.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:18.040 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:18.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:18.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:18.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:18.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:18.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:18.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:18.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:18.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:18.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:18.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:18.080 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:18.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:18.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:18.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:18.080 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:18.080 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:18.080 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:18.080 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:18.080 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:18.080 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:57:23.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:23.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:23.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:23.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:23.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:23.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:23.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:23.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:23.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:23.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:23.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:23.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:23.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:23.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:23.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:23.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:23.101 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:23.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:23.101 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:23.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:23.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:23.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:23.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:23.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:23.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:23.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:23.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:23.106 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:23.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:23.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:23.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:23.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:23.625 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:23.626 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:23.628 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:23.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:23.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:23.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:23.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:23.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:23.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:23.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:23.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:23.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:23.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:23.699 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:28.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:28.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:28.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:28.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:28.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:28.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:28.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:28.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:28.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:28.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:28.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:28.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:28.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:28.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:28.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:28.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:28.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:28.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:28.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:28.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:28.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:28.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:28.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:28.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:28.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:28.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:28.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:28.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:28.729 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:28.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:28.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:28.729 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:28.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:28.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:28.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:28.730 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:28.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:28.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:28.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:28.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:28.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:28.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:28.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:28.735 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:28.736 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:28.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:29.218 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:29.269 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:29.271 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:29.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:29.274 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:29.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:29.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:29.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:29.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:29.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:29.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:29.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:29.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:29.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:29.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:29.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:29.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:29.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:29.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:29.319 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:29.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:29.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:34.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:34.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:34.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:34.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:34.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:34.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:34.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:34.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:34.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:34.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:34.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:34.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:34.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:34.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:34.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:34.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:34.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:34.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:34.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:34.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:34.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:34.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:34.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:34.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:34.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:34.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:34.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:34.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:34.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:34.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:34.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:34.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:34.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:34.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:34.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:34.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:34.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:34.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:34.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:34.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:34.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:34.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:34.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:34.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:34.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:34.358 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:34.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:34.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:34.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:34.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:34.842 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:34.879 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:34.881 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:34.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:34.882 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:34.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:34.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:34.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:34.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:34.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:34.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:34.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:34.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:34.936 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:57:39.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:57:39.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:57:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:39.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:39.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:57:39.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:39.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:39.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:57:39.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:57:39.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:57:39.957 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:57:39.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:39.957 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:39.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:57:39.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:57:39.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:57:39.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:57:39.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:39.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:57:39.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:57:39.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:39.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:39.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:57:39.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:57:39.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:57:39.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:57:39.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:39.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:57:39.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:57:39.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:39.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:57:39.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:57:39.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:57:39.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:57:39.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:57:39.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:57:39.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:57:39.965 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:57:39.965 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:57:39.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:57:39.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:57:40.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:57:40.483 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:57:40.484 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:57:40.485 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:57:40.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:57:40.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:57:40.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:57:40.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:57:40.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:57:40.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:57:40.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:57:40.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:57:40.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:57:40.922 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:57:40.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:40.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:40.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:40.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:41.393 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:57:41.866 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:57:41.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:41.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:41.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:41.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:42.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:57:42.810 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:57:42.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:42.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:42.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:42.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:43.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:57:43.756 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:57:43.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:43.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:43.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:43.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:44.228 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:57:44.699 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:57:44.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:57:44.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:57:44.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:57:44.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:57:45.172 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:57:45.645 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:57:46.117 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:57:46.588 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:57:47.061 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:57:47.534 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:57:48.006 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:57:48.477 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:57:48.950 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 01:57:49.423 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 01:57:49.895 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 01:57:50.366 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 01:57:50.839 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 01:57:51.312 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 01:57:51.784 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 01:57:52.255 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 01:57:52.725 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 01:57:53.196 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 01:57:53.667 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 01:57:54.140 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 01:57:54.613 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 01:57:55.085 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 01:57:55.559 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 01:57:56.031 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 01:57:56.503 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 01:57:56.974 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 01:57:57.445 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 01:57:57.918 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 01:57:58.391 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 01:57:58.862 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 01:57:59.334 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 01:57:59.807 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 01:58:00.279 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 01:58:00.752 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 01:58:01.225 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 01:58:01.697 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 01:58:02.169 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 01:58:02.640 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 01:58:03.111 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 01:58:03.582 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 01:58:04.055 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 01:58:04.528 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 01:58:05.000 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 01:58:05.471 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 01:58:05.945 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 01:58:06.417 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 01:58:06.889 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 01:58:07.360 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 01:58:07.833 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 01:58:08.306 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 01:58:08.778 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 01:58:09.249 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 01:58:09.722 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 01:58:10.194 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 01:58:10.666 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 01:58:11.140 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 01:58:11.612 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 01:58:12.084 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 01:58:12.555 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 01:58:13.028 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 01:58:13.500 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 01:58:13.971 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 01:58:13.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:58:13.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:58:13.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:13.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:13.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:13.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:13.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:13.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:13.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:13.996 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:58:13.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:13.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:13.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:13.997 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:13.997 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:13.997 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:13.997 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:13.997 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:13.998 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:13.998 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:18.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:18.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:18.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:18.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:18.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:18.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:19.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:19.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:19.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:19.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:19.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:58:19.016 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:58:19.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:58:19.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:19.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:19.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:19.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:58:19.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:19.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:58:19.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:19.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:58:19.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:58:19.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:19.021 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:19.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:19.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:58:19.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:19.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:58:19.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:19.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:58:19.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:58:19.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:19.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:19.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:19.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:58:19.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:19.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:58:19.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.029 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:58:19.029 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:58:19.029 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:58:19.030 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:19.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:19.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:19.034 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:58:19.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:58:19.554 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:58:19.556 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:58:19.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:58:19.558 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:58:19.983 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:58:20.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:20.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:20.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:20.455 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:58:20.927 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:58:21.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:21.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:21.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:21.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:21.401 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:58:21.873 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:58:22.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:22.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:22.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:22.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:22.345 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:58:22.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:58:22.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:22.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:22.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:22.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:22.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:22.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:22.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:22.580 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:58:27.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:27.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:27.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:27.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:27.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:27.600 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:27.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:27.600 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:58:27.604 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:58:27.604 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:58:27.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:27.605 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:27.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:27.605 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:58:27.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:27.605 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:58:27.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:27.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:58:27.609 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:58:27.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:27.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:27.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:27.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:58:27.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:27.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:58:27.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:27.613 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:58:27.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:58:27.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:27.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:27.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:27.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:58:27.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:27.614 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:58:27.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:27.619 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:58:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:58:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:58:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:58:27.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:58:27.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:58:27.620 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:58:27.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:27.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:58:28.104 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:58:28.151 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:58:28.154 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:58:28.156 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:58:28.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:58:28.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:58:28.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:28.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:28.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:28.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:29.050 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:58:29.522 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:58:29.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:29.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:29.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:29.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:29.994 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:58:30.468 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:58:30.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:30.940 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:58:31.412 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:58:31.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:31.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:31.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:31.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:31.886 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:58:32.358 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:58:32.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:32.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:32.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:32.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:32.830 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:58:33.304 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:58:33.776 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:58:34.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:34.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:34.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:34.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:34.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:34.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:34.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:34.172 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:58:34.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:34.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:34.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:34.173 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:34.173 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:34.173 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:34.173 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:34.173 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:34.173 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:58:39.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:39.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:39.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:39.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:39.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:39.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:39.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:39.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:39.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:39.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:39.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:58:39.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:58:39.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:58:39.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:39.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:39.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:39.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:58:39.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:39.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:58:39.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:39.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:58:39.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:58:39.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:39.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:39.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:39.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:58:39.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:39.193 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:58:39.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:39.195 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:58:39.195 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:58:39.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:39.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:39.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:39.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:58:39.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:39.196 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:58:39.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:39.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:58:39.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:58:39.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:58:39.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:58:39.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:58:39.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:58:39.202 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:58:39.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:39.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:58:39.685 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:58:39.732 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:58:39.734 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:58:39.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:58:39.736 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:58:40.157 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:58:40.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:40.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:40.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:40.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:40.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:58:41.104 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:58:41.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:41.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:41.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:41.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:41.580 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:58:42.052 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:58:42.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:42.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:42.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:42.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:42.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:58:42.998 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:58:43.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:43.470 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:58:43.944 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:58:44.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:44.416 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:58:44.888 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:58:45.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:58:45.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:45.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:45.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:45.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:45.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:45.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:45.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:45.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:45.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:45.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:45.750 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:58:50.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:50.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:50.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:50.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:50.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:50.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:50.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:50.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:50.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:50.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:58:50.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:58:50.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:58:50.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:58:50.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:50.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:50.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:50.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:58:50.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:58:50.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:58:50.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:50.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:58:50.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:58:50.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:50.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:50.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:50.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:58:50.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:58:50.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:58:50.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:50.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:58:50.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:58:50.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:50.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:58:50.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:50.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:58:50.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:58:50.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:58:50.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:50.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:58:50.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:58:50.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:58:50.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:58:50.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:58:50.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:58:50.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:58:50.784 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:58:50.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:58:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:58:50.789 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:58:51.267 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:58:51.313 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:58:51.313 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:58:51.313 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:58:51.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:58:51.738 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:58:51.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:51.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:51.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:51.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:52.212 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:58:52.685 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:58:52.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:52.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:52.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:52.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:53.157 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:58:53.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:58:53.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:53.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:53.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:53.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:58:54.575 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:58:54.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:54.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:54.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:54.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:55.050 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:58:55.522 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:58:55.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:55.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:55.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:55.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:55.997 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:58:56.469 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:58:56.944 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:58:57.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:58:57.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:58:57.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:58:57.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:58:57.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:58:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:58:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:58:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:58:57.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:58:57.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:58:57.325 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:02.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:02.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:02.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:02.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:02.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:02.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:02.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:02.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:02.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:02.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:02.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:02.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:02.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:02.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:02.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:02.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:02.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:02.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:02.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:02.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:02.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:02.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:02.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:02.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:02.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:02.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:02.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:02.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:02.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:02.351 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:02.351 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:02.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:02.351 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:02.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:02.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:02.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:02.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:02.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:02.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:02.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:02.358 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:02.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:02.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:02.889 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:02.891 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:02.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:02.893 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:03.314 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:59:03.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:03.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:03.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:03.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:03.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:59:04.261 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:59:04.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:04.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:04.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:04.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:04.737 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:59:05.209 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:59:05.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:05.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:05.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:05.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:05.683 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:59:06.155 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:59:06.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:06.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:06.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:06.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:06.627 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:59:06.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:07.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 01:59:07.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:07.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:07.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:07.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:07.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 01:59:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 01:59:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 01:59:08.997 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 01:59:09.469 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 01:59:09.944 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 01:59:10.416 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 01:59:10.890 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:10.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:10.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:10.917 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:10.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:10.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:15.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:15.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:15.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:15.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:15.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:15.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:15.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:15.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:15.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:15.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:15.931 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:15.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:15.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:15.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:15.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:15.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:15.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:15.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:15.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:15.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:15.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:15.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:15.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:15.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:15.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:15.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:15.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:15.938 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:15.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:15.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:16.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:16.459 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:16.460 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:16.462 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:16.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:16.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:59:16.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:17.364 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:59:17.836 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:59:17.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:17.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:17.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:17.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:18.310 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:59:18.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:59:18.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:18.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:18.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:18.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:19.255 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:59:19.727 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:59:19.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:19.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:19.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:19.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:20.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:59:20.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:20.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:20.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:20.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:20.475 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:25.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:25.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:25.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:25.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:25.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:25.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:25.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:25.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:25.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:25.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:25.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:25.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:25.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:25.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:25.500 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:25.500 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:25.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:25.500 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:25.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:25.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:25.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:25.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:25.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:25.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:25.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:25.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:25.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:25.506 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:25.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:25.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:25.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:26.031 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:26.032 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:26.034 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:26.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:26.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:26.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:26.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:26.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:26.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:26.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:26.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:26.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:26.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:26.049 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:26.049 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:26.049 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:31.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:31.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:31.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:31.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:31.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:31.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:31.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:31.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:31.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:31.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:31.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:31.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:31.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:31.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:31.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:31.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:31.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:31.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:31.066 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:31.067 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:31.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:31.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:31.068 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:31.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:31.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:31.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:31.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:31.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:31.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:31.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:31.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:31.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:31.073 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:31.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:31.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:31.077 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:31.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:31.592 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:31.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:31.594 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:31.595 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:31.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:31.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:31.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:31.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:31.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:31.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:31.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:31.610 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:31.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:31.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:31.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:31.610 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:31.610 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:31.610 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:31.610 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:31.610 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:31.610 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 01:59:36.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:36.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:36.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:36.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:36.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:36.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:36.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:36.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:36.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:36.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:36.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:36.629 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:36.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:36.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:36.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:36.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:36.630 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:36.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:36.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:36.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:36.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:36.632 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:36.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:36.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:36.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:36.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:36.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:36.636 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:36.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:36.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:37.119 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:37.158 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:37.160 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:37.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:37.162 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:37.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:37.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:37.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:37.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:37.217 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:42.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:42.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:42.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:42.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:42.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:42.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:42.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:42.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:42.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:42.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:42.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:42.240 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:42.241 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:42.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:42.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:42.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:42.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:42.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:42.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:42.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:42.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:42.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:42.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:42.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:42.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:42.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:42.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:42.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:42.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:42.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:42.250 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:42.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:42.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:42.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:42.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:42.255 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:42.255 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:42.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:42.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:42.782 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:42.785 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:42.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:42.788 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:42.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:59:42.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:59:42.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:59:42.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:59:42.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:59:42.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:59:42.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:59:42.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:59:43.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:59:43.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:43.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:43.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:43.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:43.682 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:59:44.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:59:44.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:44.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:44.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:44.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:44.628 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:59:45.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:59:45.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:45.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:45.571 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:59:45.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:59:45.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:59:45.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:59:45.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:59:45.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:59:45.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:59:45.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:45.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:45.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:45.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:45.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:45.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:45.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:45.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:45.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:45.908 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 01:59:45.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:45.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:50.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:50.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:50.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:50.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:50.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:50.922 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:50.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 01:59:50.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 01:59:50.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 01:59:50.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 01:59:50.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:50.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:50.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:50.927 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 01:59:50.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 01:59:50.927 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 01:59:50.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:50.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 01:59:50.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 01:59:50.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:50.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:50.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:50.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 01:59:50.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 01:59:50.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 01:59:50.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:50.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 01:59:50.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 01:59:50.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:50.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 01:59:50.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:50.931 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 01:59:50.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 01:59:50.931 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 01:59:50.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 01:59:50.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 01:59:50.933 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 01:59:50.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 01:59:50.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 01:59:50.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 01:59:51.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 01:59:51.462 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 01:59:51.465 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 01:59:51.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:51.467 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 01:59:51.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:59:51.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:59:51.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 01:59:51.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:59:51.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:59:51.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:59:51.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 01:59:51.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 01:59:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 01:59:51.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:51.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:51.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:51.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 01:59:52.831 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 01:59:52.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:52.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:52.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:52.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:53.304 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 01:59:53.776 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 01:59:53.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:53.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:53.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:53.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:54.248 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 01:59:54.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 01:59:54.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 01:59:54.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:59:54.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 01:59:54.719 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 01:59:54.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:54.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:54.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:54.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:55.193 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 01:59:55.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 01:59:55.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 01:59:55.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 01:59:55.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 01:59:55.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 01:59:55.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 01:59:55.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 01:59:55.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 01:59:55.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 01:59:55.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 01:59:55.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 01:59:55.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 01:59:55.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 01:59:55.209 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:00:00.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:00.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:00.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:00.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:00.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:00.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:00.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:00.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:00.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:00.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:00.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:00:00.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:00:00.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:00:00.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:00.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:00.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:00.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:00:00.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:00.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:00:00.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:00.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:00:00.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:00:00.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:00.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:00.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:00.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:00:00.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:00.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:00:00.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:00.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:00.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:00:00.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:00.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:00:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:00:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:00:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:00:00.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:00:00.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:00:00.246 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:00:00.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:00.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:00.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:00:00.729 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:00:00.783 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:00:00.786 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:00:00.788 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:00:00.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:00.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:00.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:00.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:00:00.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:00.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:00.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:00.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:00:00.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:00:01.201 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:00:01.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:01.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:01.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:01.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:01.673 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:00:02.146 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:00:02.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:02.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:02.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:02.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:02.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:00:03.091 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:00:03.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:03.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:03.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:03.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:00:03.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:03.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:03.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:03.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:04.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:00:04.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:04.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:04.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:04.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:04.507 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:00:04.979 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:00:05.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:05.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:05.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:05.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:05.450 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:00:05.924 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:00:06.396 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:00:06.868 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:00:07.339 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:00:07.813 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:00:08.285 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:00:08.757 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:00:08.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:08.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:08.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:08.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:08.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:08.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:08.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:08.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:08.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:08.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:08.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:08.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:08.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:08.868 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:00:08.869 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:08.869 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:08.869 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:08.869 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:08.869 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:08.869 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:13.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:13.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:13.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:13.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:13.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:13.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:13.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:13.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:13.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:13.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:13.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:00:13.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:00:13.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:00:13.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:13.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:13.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:13.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:00:13.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:13.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:00:13.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:13.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:00:13.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:00:13.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:13.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:13.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:13.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:00:13.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:13.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:00:13.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:13.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:00:13.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:00:13.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:13.895 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:13.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:13.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:00:13.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:13.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:00:13.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:00:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:00:13.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:00:13.901 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:00:13.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:13.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:13.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:13.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:00:14.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:00:14.435 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:00:14.437 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:00:14.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:14.439 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:00:14.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:14.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:14.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:00:14.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:14.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:14.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:14.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:00:14.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:00:14.856 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:00:14.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:14.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:14.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:14.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:15.330 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:00:15.802 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:00:15.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:15.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:15.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:15.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:16.274 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:00:16.745 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:00:16.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:16.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:16.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:16.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:17.218 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:00:17.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:17.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:17.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:17.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:17.691 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:00:17.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:17.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:17.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:17.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:18.163 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:00:18.634 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:00:18.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:18.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:18.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:18.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:19.107 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:00:19.580 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:00:20.052 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:00:20.523 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:00:20.996 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:00:21.469 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:00:21.940 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:00:22.412 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:00:22.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:22.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:22.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:22.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:22.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:22.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:22.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:22.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:22.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:22.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:22.523 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:00:22.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:22.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:22.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:22.523 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:22.523 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:22.523 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:22.523 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:22.523 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:22.523 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:27.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:27.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:27.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:27.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:27.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:27.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:27.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:27.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:27.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:27.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:27.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:00:27.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:00:27.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:00:27.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:27.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:27.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:27.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:00:27.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:27.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:00:27.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:27.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:00:27.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:00:27.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:27.551 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:27.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:27.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:00:27.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:27.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:00:27.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:27.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:00:27.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:00:27.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:27.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:27.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:27.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:00:27.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:27.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:00:27.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.559 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:00:27.559 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:00:27.559 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:00:27.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:27.564 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:00:28.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:00:28.091 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:00:28.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:28.094 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:00:28.097 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:00:28.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:28.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:28.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:00:28.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:28.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:28.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:28.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:00:28.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:00:28.515 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:00:28.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:28.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:28.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:28.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:28.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:00:29.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:00:29.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:29.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:29.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:29.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:29.930 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:00:30.403 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:00:30.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:30.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:30.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:30.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:30.875 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:00:31.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:31.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:31.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:31.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:31.346 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:00:31.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:31.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:31.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:31.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:31.820 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:00:32.292 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:00:32.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:32.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:32.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:32.764 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:00:33.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:00:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:00:34.182 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:00:34.653 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:00:35.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:00:35.599 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:00:36.071 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:00:36.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:36.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:36.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:36.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:36.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:36.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:36.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:36.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:36.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:36.183 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:00:36.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:36.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:36.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:36.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:36.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:36.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:36.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:36.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:36.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:00:41.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:41.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:41.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:41.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:41.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:41.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:41.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:41.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:41.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:41.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:41.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:00:41.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:00:41.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:00:41.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:41.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:41.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:41.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:00:41.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:41.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:00:41.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:41.210 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:00:41.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:00:41.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:41.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:41.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:41.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:00:41.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:41.211 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:00:41.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:41.214 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:41.214 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:00:41.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:00:41.218 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:00:41.219 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:00:41.219 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:00:41.219 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:41.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:00:41.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:00:41.744 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:00:41.745 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:00:41.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:41.747 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:00:41.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:41.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:41.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:00:41.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:41.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:41.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:41.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:00:41.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:00:41.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:41.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:41.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:41.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:42.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:00:42.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:42.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:42.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:42.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:42.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:00:43.117 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:00:43.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:43.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:43.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:43.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:43.589 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:00:44.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:00:44.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:44.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:44.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:44.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:44.532 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:00:45.005 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:00:45.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:45.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:45.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:45.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:45.478 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:00:45.950 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:00:46.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:46.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:46.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:46.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:46.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:00:46.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:46.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:46.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:46.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:46.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:46.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:46.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:46.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:46.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:46.805 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:00:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:51.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:51.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:51.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:51.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:51.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:51.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:51.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:51.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:51.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:51.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:00:51.820 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:00:51.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:00:51.824 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:00:51.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:51.824 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:51.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:51.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:00:51.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:00:51.825 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:00:51.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:51.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:00:51.827 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:00:51.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:51.827 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:51.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:51.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:00:51.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:00:51.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:00:51.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:51.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:00:51.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:00:51.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:51.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:00:51.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:00:51.830 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:00:51.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:00:51.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:00:51.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:00:51.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:00:51.833 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:00:51.833 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:00:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:00:51.837 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:00:52.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:00:52.358 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:00:52.359 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:00:52.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:52.361 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:00:52.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:52.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:52.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:00:52.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:52.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:52.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:52.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:00:52.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:00:52.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:00:52.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:52.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:53.258 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:00:53.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:00:53.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:53.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:53.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:53.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:54.204 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:00:54.676 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:00:54.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:54.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:54.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:55.147 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:00:55.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:00:55.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:00:55.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:55.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:00:55.621 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:00:55.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:56.093 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:00:56.565 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:00:56.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:56.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:56.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:56.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:57.036 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:00:57.509 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:00:57.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:00:58.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:00:58.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:00:58.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:00:58.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:00:58.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:00:58.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:00:58.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:00:58.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:00:58.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:00:58.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:00:58.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:00:58.041 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:00:58.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:00:58.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:03.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:03.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:03.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:03.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:03.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:03.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:03.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:03.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:03.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:03.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:03.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:01:03.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:01:03.060 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:01:03.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:03.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:03.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:03.061 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:01:03.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:03.061 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:01:03.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:03.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:01:03.065 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:01:03.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:03.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:03.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:03.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:01:03.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:03.066 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:01:03.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:03.069 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:01:03.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:01:03.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:03.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:03.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:03.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:01:03.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:03.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:01:03.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:03.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:01:03.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:01:03.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:01:03.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:01:03.075 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.076 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:01:03.076 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:01:03.076 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:01:03.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:03.081 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:01:03.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:01:03.607 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:01:03.610 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:01:03.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:03.613 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:01:03.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:03.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:03.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:01:03.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:01:03.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:01:03.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:01:03.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:01:03.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:01:04.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:01:04.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:04.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:04.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:04.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:04.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:01:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:01:05.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:05.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:05.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:05.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:05.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:01:05.920 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:01:06.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:06.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:06.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:06.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:06.391 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:01:06.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:06.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:06.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:06.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:06.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:06.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:06.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:06.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:06.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:06.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:06.713 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:01:06.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:06.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:06.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:06.713 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:06.713 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:06.713 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:06.713 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:06.713 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:06.713 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:11.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:11.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:11.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:11.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:11.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:11.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:11.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:11.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:11.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:11.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:11.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:01:11.730 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:01:11.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:01:11.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:11.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:11.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:11.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:01:11.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:11.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:01:11.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:11.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:01:11.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:01:11.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:11.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:11.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:11.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:01:11.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:11.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:01:11.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:11.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:01:11.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:01:11.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:11.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:11.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:11.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:01:11.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:11.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:01:11.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:01:11.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:01:11.738 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:01:11.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:11.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:01:12.219 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:01:12.259 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:01:12.259 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:01:12.260 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:01:12.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:12.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:12.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:12.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:01:12.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:01:12.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:01:12.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:01:12.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:01:12.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:01:12.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:01:12.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:12.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:12.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:12.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:13.162 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:01:13.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:01:13.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:13.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:13.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:13.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:14.107 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:01:14.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:01:14.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:14.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:14.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:14.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:15.052 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:01:15.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:15.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:15.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:15.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:15.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:15.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:15.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:15.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:15.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:15.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:15.376 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:01:15.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:15.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:15.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:15.376 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:15.376 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:15.376 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:15.376 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:15.376 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:15.376 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:01:20.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:20.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:20.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:20.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:20.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:20.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:20.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:20.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:20.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:20.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:20.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:01:20.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:01:20.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:01:20.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:20.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:20.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:20.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:01:20.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:20.394 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:01:20.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:20.395 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:01:20.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:01:20.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:20.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:20.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:20.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:01:20.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:20.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:01:20.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:20.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:01:20.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:01:20.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:20.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:20.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:20.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:01:20.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:20.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:01:20.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:01:20.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:01:20.403 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:01:20.403 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:01:20.403 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:20.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:20.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:01:20.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:01:20.923 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:01:20.924 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:01:20.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:20.926 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:01:20.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:20.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:20.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:01:20.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:01:20.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:01:20.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:01:20.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:01:20.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:01:21.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:21.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:21.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:21.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:21.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:21.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:21.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:21.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:21.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:21.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:21.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:21.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:21.207 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:01:26.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:26.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:26.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:26.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:26.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:26.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:26.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:26.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:01:26.227 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:01:26.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:01:26.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:26.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:26.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:26.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:01:26.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:26.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:01:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:26.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:01:26.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:01:26.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:26.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:26.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:26.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:01:26.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:26.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:01:26.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:26.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:01:26.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:01:26.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:26.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:26.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:26.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:01:26.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:26.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:01:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:01:26.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:01:26.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:01:26.242 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:01:26.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:01:26.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:01:26.771 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:01:26.773 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:01:26.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:26.776 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:01:26.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:26.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:26.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:01:26.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:01:26.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:01:26.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:01:26.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:01:26.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:01:26.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:26.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:27.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:27.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:27.000 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:01:27.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:27.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:32.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:32.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:32.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:32.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:32.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:32.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:32.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:32.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:32.018 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:32.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:32.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:01:32.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:01:32.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:01:32.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:32.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:32.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:01:32.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:32.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:32.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:01:32.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:32.027 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:01:32.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:01:32.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:32.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:32.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:32.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:01:32.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:32.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:01:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:32.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:01:32.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:01:32.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:32.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:32.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:32.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:01:32.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:32.032 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:01:32.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:32.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:01:32.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:01:32.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:01:32.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:01:32.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:01:32.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:01:32.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:01:32.037 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:01:32.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:32.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:01:32.521 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:01:32.570 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:01:32.572 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:01:32.573 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:01:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:32.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:32.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:32.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:01:32.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:01:32.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:01:32.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:01:32.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:01:32.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:01:32.993 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:01:33.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:33.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:33.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:33.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:33.464 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:01:33.935 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:01:34.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:34.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:34.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:34.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:01:34.881 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:01:35.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:35.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:35.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:35.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:35.353 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:01:35.824 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:01:36.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:36.297 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:01:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:01:37.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:37.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:37.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:37.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:37.242 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:01:37.715 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:01:38.188 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:01:38.660 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:01:39.133 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:01:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:01:40.077 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:01:40.548 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:01:41.021 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:01:41.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:41.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:41.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:41.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:41.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:41.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:41.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:41.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:41.388 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:01:41.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:41.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:46.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:46.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:46.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:46.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:46.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:46.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:46.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:46.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:46.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:46.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:01:46.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:01:46.399 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:01:46.399 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:01:46.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:46.400 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:46.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:46.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:01:46.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:01:46.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:01:46.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:46.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:01:46.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:01:46.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:46.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:01:46.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:01:46.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:01:46.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:01:46.404 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:01:46.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:01:46.409 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:01:46.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:01:46.928 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:01:46.930 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:01:46.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:01:46.932 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:01:46.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:46.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:46.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:01:46.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:01:46.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:01:46.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:01:46.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:01:46.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:01:47.359 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:01:47.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:47.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:47.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:47.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:47.830 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:01:48.301 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:01:48.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:48.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:48.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:48.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:48.775 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:01:49.247 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:01:49.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:49.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:49.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:49.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:49.719 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:01:50.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:01:50.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:50.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:50.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:50.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:50.663 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:01:51.135 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:01:51.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:01:52.078 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:01:52.551 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:01:53.024 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:01:53.496 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:01:53.967 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:01:54.441 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:01:54.913 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:01:55.385 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:01:55.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:01:55.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:01:55.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:01:55.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:01:55.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:01:55.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:01:55.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:01:55.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:01:55.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:01:55.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:01:55.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:01:55.737 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:01:55.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:00.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:00.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:00.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:00.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:00.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:00.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:00.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:00.754 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:00.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:00.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:00.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:00.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:00.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:00.760 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:00.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:00.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:00.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:00.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:00.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:00.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:00.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:00.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:00.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:00.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:00.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:00.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:00.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:00.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:00.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:00.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:00.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:00.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:00.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:00.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:00.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:00.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:00.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:00.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:00.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:00.774 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:00.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:00.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:00.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:01.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:01.301 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:01.303 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:01.304 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:01.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:01.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:02:01.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:02:01.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:02:01.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:01.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:02:01.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:02:01.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:02:01.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:02:01.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:02:01.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:01.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:01.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:01.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:02.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:02:02.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:02:02.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:02.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:02.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:02.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:03.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:02:03.591 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:02:03.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:03.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:03.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:03.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:04.055 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:02:04.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:02:04.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:02:04.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:04.354 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:04.401 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.442 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.484 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.518 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:02:04.519 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.553 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.595 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.632 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.673 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.715 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.752 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:04.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:04.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:04.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:04.793 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.834 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:04.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:02:04.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:02:04.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:04.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:04.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:04.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:04.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:04.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:04.875 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:04.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:04.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:09.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:09.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:09.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:09.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:09.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:09.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:09.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:09.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:09.887 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:09.888 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:09.888 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:09.889 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:09.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:09.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:09.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:09.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:09.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:09.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:09.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:09.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:09.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:09.893 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:09.893 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:09.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:10.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:10.423 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:10.427 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:10.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:10.429 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:10.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:10.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:10.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:10.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:10.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:10.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:10.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:10.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:10.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:10.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:10.663 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:10.664 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=166 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:10.664 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=166 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:10.664 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=166 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:10.664 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=166 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:10.664 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=166 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:10.664 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=166 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:15.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:15.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:15.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:15.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:15.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:15.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:15.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:15.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:15.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:15.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:15.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:15.668 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:15.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:15.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:15.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:15.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:15.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:15.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:15.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:15.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:15.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:15.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:15.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:15.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:15.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:15.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:15.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:15.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:15.675 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:15.675 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:15.679 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:16.146 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:16.192 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:16.193 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:16.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:16.193 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:16.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:02:16.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:16.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:16.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:16.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:17.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:02:17.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:02:17.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:17.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:17.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:17.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:18.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:02:18.474 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:02:18.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:18.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:18.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:18.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:18.941 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:02:19.407 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:02:19.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:19.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:19.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:19.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:19.873 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:02:20.337 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:02:20.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:20.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:20.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:20.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:20.804 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:02:21.271 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:02:21.738 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:02:22.205 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:02:22.672 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:02:23.139 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:02:23.606 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:02:24.073 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:02:24.539 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:02:25.001 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:02:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:25.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:25.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:25.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:25.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:25.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:25.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:25.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:25.201 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:30.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:30.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:30.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:30.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:30.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:30.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:30.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:30.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:30.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:30.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:30.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:30.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:30.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:30.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:30.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:30.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:30.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:30.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:30.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:30.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:30.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:30.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:30.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:30.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:30.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:30.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:30.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:30.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:30.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:30.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:30.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:30.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:30.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:30.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:30.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:30.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:30.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:30.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:30.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:30.220 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:30.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:30.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:30.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:30.740 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:30.740 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:30.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:30.741 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:31.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:02:31.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:31.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:31.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:31.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:31.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:02:32.088 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:02:32.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:32.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:32.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:32.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:32.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:02:33.014 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:02:33.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:33.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:33.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:33.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:33.478 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:02:33.941 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:02:34.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:34.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:34.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:34.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:34.407 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:02:34.874 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:02:35.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:35.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:35.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:35.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:35.340 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:02:35.805 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:02:36.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:02:36.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:02:37.198 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:02:37.668 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:02:38.144 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:02:38.615 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:02:39.085 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:02:39.549 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:02:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:39.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:39.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:39.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:39.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:39.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:39.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:39.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:39.769 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:39.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:39.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:39.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:39.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2090 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:39.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2090 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:39.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2090 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:39.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2090 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:39.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2090 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:39.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2090 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:44.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:44.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:44.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:44.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:44.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:44.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:44.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:44.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:44.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:44.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:44.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:44.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:44.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:44.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:44.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:44.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:44.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:44.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:44.785 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:44.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:44.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:44.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:44.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:44.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:44.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:44.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:44.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:44.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:44.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:44.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:44.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:44.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:44.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:44.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:44.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:44.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:44.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:44.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:44.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:44.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:44.792 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:44.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:44.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:45.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:45.318 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:45.320 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:45.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:45.324 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:45.747 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:02:45.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:45.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:45.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:45.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:46.222 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:02:46.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:02:46.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:46.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:46.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:46.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:47.169 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:02:47.641 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:02:47.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:47.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:47.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:47.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:48.115 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:02:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:48.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:48.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:48.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:48.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:48.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:48.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:48.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:48.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:48.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:48.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:48.347 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:48.347 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=767 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:48.347 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=767 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:48.347 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=767 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:48.347 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=767 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:53.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:53.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:53.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:53.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:53.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:53.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:53.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:53.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:53.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:53.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:53.369 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:53.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:53.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:53.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:53.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:53.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:53.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:53.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:53.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:53.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:53.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:53.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:53.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:53.376 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:53.376 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:53.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:53.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:53.379 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:53.379 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:53.379 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:53.383 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:53.898 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:53.899 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:53.901 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:53.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:53.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:02:53.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:02:53.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:02:53.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:53.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:02:53.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:02:53.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:02:53.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:02:53.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:53.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:02:53.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:02:53.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:53.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:54.334 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:02:54.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:54.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:02:54.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:02:54.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:02:54.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:54.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:54.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:54.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:54.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:54.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:54.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:54.358 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:54.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:54.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:54.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:54.358 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.358 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:54.359 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:02:59.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:59.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:59.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:59.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:59.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:59.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:59.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:59.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:59.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:59.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:02:59.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:02:59.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:02:59.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:02:59.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:59.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:59.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:59.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:02:59.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:02:59.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:02:59.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:59.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:02:59.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:02:59.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:59.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:02:59.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:02:59.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:59.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:02:59.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:02:59.382 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:02:59.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:02:59.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:02:59.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:02:59.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:02:59.385 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:02:59.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:02:59.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:02:59.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:02:59.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:02:59.906 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:02:59.907 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:02:59.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:02:59.908 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:02:59.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:02:59.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:02:59.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:02:59.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:02:59.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:02:59.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:02:59.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:02:59.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:02:59.917 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:02:59.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:02:59.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:04.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:04.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:04.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:04.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:04.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:04.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:04.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:04.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:04.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:04.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:04.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:04.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:04.935 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:04.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:04.936 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:04.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:04.936 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:04.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:04.937 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:04.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:04.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:04.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:04.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:04.938 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:04.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:04.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:04.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:04.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:04.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:04.941 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:04.941 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:04.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:04.941 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:04.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:04.941 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:04.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:04.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:04.944 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:04.944 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:04.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:04.945 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:04.945 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:04.945 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:04.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:04.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:04.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:05.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:05.474 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:05.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:05.477 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:05.479 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:05.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:05.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:05.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:05.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:05.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:06.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:06.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:06.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:07.318 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:07.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:07.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:07.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:07.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:07.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:07.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:07.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:07.500 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:07.500 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:12.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:12.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:12.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:12.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:12.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:12.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:12.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:12.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:12.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:12.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:12.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:12.518 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:12.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:12.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:12.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:12.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:12.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:12.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:12.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:12.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:12.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:12.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:12.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:12.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:12.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:12.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:12.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:12.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:12.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:12.528 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:12.528 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:12.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:12.528 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:12.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:12.528 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:12.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:12.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:12.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:12.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:12.535 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:12.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:12.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:12.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:12.540 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:13.062 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:13.064 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:13.065 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:13.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:13.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:13.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:03:13.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:03:13.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:03:13.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:03:13.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:03:13.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:03:13.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:13.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:13.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:13.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:13.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:13.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:14.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:14.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:14.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:14.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:14.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:14.906 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:15.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:03:15.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:15.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:15.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:15.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:15.850 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:03:15.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:15.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:15.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:15.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:15.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:15.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:15.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:15.875 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:20.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:20.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:20.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:20.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:20.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:20.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:20.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:20.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:20.891 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:20.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:20.892 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:20.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:20.896 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:20.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:20.896 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:20.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:20.897 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:20.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:20.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:20.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:20.901 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:20.901 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:20.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:20.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:20.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:20.902 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:20.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:20.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:20.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:20.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:20.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:20.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:20.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:20.907 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:20.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:20.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:20.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:20.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:20.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:20.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:20.913 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:20.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:20.918 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:21.395 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:21.443 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:21.445 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:21.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:21.448 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:21.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:21.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:21.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:03:21.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:03:21.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:03:21.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:03:21.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:03:21.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:03:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:21.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:21.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:21.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:21.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:22.338 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:22.811 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:22.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:22.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:22.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:22.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:23.284 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:23.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:23.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:23.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:23.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:23.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:23.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:23.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:23.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:23.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:23.546 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:28.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:28.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:28.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:28.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:28.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:28.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:28.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:28.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:28.554 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:28.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:28.554 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:28.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:28.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:28.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:28.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:28.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:28.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:28.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:28.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:28.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:28.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:28.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:28.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:28.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:28.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:28.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.560 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:28.560 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:28.560 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:28.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:28.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:29.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:29.086 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:29.088 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:29.092 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:29.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:29.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:29.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:03:29.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:03:29.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:03:29.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:03:29.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:03:29.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:03:29.515 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:29.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:29.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:29.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:29.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:30.460 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:30.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:30.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:30.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:30.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:30.932 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:31.404 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:03:31.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:31.875 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:03:31.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:31.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:31.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:31.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:31.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:31.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:31.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:31.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:31.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:31.903 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:31.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:31.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:31.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:31.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:31.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:31.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:31.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:31.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:31.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:36.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:36.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:36.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:36.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:36.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:36.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:36.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:36.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:36.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:36.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:36.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:36.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:36.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:36.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:36.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:36.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:36.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:36.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:36.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:36.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:36.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:36.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:36.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:36.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:36.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:36.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:36.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:36.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:36.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:36.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:36.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:36.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:36.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:36.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:36.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:36.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:36.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:36.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:36.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:36.933 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:36.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:36.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:37.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:37.463 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:37.466 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:37.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:37.468 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:37.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:37.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:37.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:03:37.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:03:37.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:03:37.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:03:37.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:03:37.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:03:37.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:37.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:37.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:37.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:37.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:38.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:38.848 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:38.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:38.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:38.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:38.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:39.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:39.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:39.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:39.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:39.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:39.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:39.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:39.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:39.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:39.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:39.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:39.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:39.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:39.582 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:39.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:39.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:39.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:39.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:39.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:39.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:44.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:44.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:44.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:44.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:44.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:44.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:44.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:44.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:44.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:44.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:44.592 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:44.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:44.594 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:44.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:44.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:44.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:44.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:44.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:44.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:44.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:44.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:44.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:44.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:44.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:44.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:44.599 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:44.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:44.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:44.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:44.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:44.601 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:44.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:44.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:44.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:44.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:44.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:44.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:44.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:44.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:44.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:44.608 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:44.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:44.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:45.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:45.143 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:45.146 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:45.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:45.148 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:45.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:45.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:45.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:03:45.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:03:45.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:03:45.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:03:45.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:03:45.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:03:45.565 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:45.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:45.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:45.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:45.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:46.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:46.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:46.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:46.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:46.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:46.982 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:47.453 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:03:47.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:47.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:47.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:47.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:47.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:03:48.399 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:03:48.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:48.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:48.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:48.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:48.871 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:03:48.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:48.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:48.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:48.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:48.896 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:48.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:48.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:53.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:53.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:53.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:53.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:53.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:53.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:53.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:03:53.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:03:53.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:03:53.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:03:53.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:53.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:53.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:53.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:03:53.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:03:53.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:03:53.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:53.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:03:53.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:03:53.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:53.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:53.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:53.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:03:53.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:03:53.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:03:53.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:53.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:03:53.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:03:53.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:53.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:03:53.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:53.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:03:53.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:03:53.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:03:53.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:03:53.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:03:53.922 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:03:53.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:03:53.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:03:54.404 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:03:54.444 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:03:54.445 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:03:54.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:03:54.447 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:03:54.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:54.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:54.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:03:54.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:03:54.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:03:54.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:03:54.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:03:54.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:03:54.877 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:03:54.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:54.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:54.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:54.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:55.348 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:03:55.821 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:03:55.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:55.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:55.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:55.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:56.293 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:03:56.765 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:03:56.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:56.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:56.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:56.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:57.236 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:03:57.709 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:03:57.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:57.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:57.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:57.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:58.182 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:03:58.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:03:58.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:03:58.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:03:58.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:03:58.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:03:58.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:03:58.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:03:58.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:03:58.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:03:58.441 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:03:58.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:03:58.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:03:58.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:03:58.441 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=976 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:58.441 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=976 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:58.441 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=976 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:58.441 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=976 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:58.441 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=976 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:03:58.441 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=976 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:03.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:03.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:03.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:03.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:03.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:03.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:03.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:03.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:03.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:03.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:03.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:03.459 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:03.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:03.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:03.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:03.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:03.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:03.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:03.461 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:03.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:03.462 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:03.462 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:03.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:03.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:03.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:03.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:03.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:03.467 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:03.467 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:03.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:03.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:03.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:03.986 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:03.987 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:03.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:03.989 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:04:04.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:04.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:04.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:04.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:04.895 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:04:05.367 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:04:05.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:05.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:05.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:05.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:05.839 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:04:06.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:06.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:06.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:06.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:06.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:06.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:06.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:06.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:06.003 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:06.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:06.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:11.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:11.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:11.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:11.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:11.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:11.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:11.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:11.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:11.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:11.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:11.019 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:11.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:11.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:11.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:11.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:11.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:11.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:11.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:11.024 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:11.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:11.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:11.025 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:11.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:11.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:11.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:11.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:11.030 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:11.030 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:11.030 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.035 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:11.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:11.557 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:11.559 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:11.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:11.562 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:11.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:04:11.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:04:11.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:04:11.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:11.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:11.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:04:12.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:12.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:12.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:12.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:12.460 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:04:12.932 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:04:13.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:13.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:13.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:13.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:13.404 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:04:13.879 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:04:14.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:14.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:14.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:14.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:14.351 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:04:14.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:14.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:14.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:14.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:14.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:14.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:14.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:14.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:14.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:14.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:14.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:14.632 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:14.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:14.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:14.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:14.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:14.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:14.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:19.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:19.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:19.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:19.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:19.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:19.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:19.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:19.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:19.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:19.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:19.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:19.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:19.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:19.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:19.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:19.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:19.648 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:19.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:19.648 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:19.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:19.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:19.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:19.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:19.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:19.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:19.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:19.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:19.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:19.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:19.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:19.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:19.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:19.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:19.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:19.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:19.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:19.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:19.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:19.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:19.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:19.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:19.662 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:19.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:19.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:19.667 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:20.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:20.195 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:20.197 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:20.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:20.200 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:20.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:04:20.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:04:20.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:04:20.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:20.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:20.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:20.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:20.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:20.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:20.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:20.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:20.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:20.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:20.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:20.242 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:20.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:20.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:20.242 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:25.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:25.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:25.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:25.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:25.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:25.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:25.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:25.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:25.255 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:25.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:25.256 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:25.258 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:25.258 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:25.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:25.259 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:25.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:25.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:25.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:25.260 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:25.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:25.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:25.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:25.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:25.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:25.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:25.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:25.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:25.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:25.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:25.264 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:25.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:25.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:25.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:25.268 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:25.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:25.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:25.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.272 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:25.750 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:25.797 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:25.799 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:25.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:25.800 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:25.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:04:25.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:04:25.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:04:25.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:25.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:26.222 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:04:26.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:26.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:26.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:26.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:26.697 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:04:27.169 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:04:27.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:27.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:27.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:27.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:27.645 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:04:28.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:04:28.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:28.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:28.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:28.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:28.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:04:28.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:28.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:28.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:28.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:28.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:28.846 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:28.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:28.846 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=771 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:28.846 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=771 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:28.846 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=771 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:28.847 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=771 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:28.847 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:28.847 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:33.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:33.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:33.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:33.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:33.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:33.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:33.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:33.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:33.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:33.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:33.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:33.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:33.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:33.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:33.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:33.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:33.863 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:33.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:33.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:33.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:33.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:33.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:33.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:33.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:33.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:33.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:33.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:33.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:33.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:33.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:33.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:33.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:33.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:33.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:33.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:33.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:33.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:33.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:33.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:33.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:33.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:33.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:33.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:33.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:33.876 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:33.876 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:33.876 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:33.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:33.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:33.881 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:34.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:34.411 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:34.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:34.414 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:34.417 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:34.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:04:34.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:04:34.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:04:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:34.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:34.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:34.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:34.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:34.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:34.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:34.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:34.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:34.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:34.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:34.462 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:34.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:34.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:34.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:34.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:34.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:34.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:34.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:34.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:34.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:39.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:39.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:39.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:39.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:39.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:39.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:39.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:39.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:39.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:39.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:39.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:39.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:39.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:39.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:39.486 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:39.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:39.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:39.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:39.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:39.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:39.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:39.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:39.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:39.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:39.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:39.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:39.493 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:39.493 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:39.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:39.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:39.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:39.498 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:39.975 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:40.015 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:40.015 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:40.016 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:40.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:40.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:40.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:40.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:40.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:40.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:40.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:40.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:40.027 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:40.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:40.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:40.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:40.027 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:40.027 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:40.027 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:40.027 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:40.027 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:40.027 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:45.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:45.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:45.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:45.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:45.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:45.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:45.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:45.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:45.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:45.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:45.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:45.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:45.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:45.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:45.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:45.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:45.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:45.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:45.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:45.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:45.051 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:45.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:45.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:45.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:45.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:45.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:45.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:45.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:45.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:45.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:45.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:45.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:45.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:45.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:45.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:45.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:45.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:45.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:45.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:45.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:45.064 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:45.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:45.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:45.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:45.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:45.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:45.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:45.601 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:45.604 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:45.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:45.607 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:45.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:45.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:45.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:45.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:45.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:45.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:45.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:45.619 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:45.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:45.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:45.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:45.619 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:45.619 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:45.619 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:45.620 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:45.620 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:45.620 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:50.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:50.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:50.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:50.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:50.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:50.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:50.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:50.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:50.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:50.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:50.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:50.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:50.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:50.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:50.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:50.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:50.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:50.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:50.638 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:50.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:50.641 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:50.641 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:50.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:50.642 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:50.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:50.642 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:50.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:50.642 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:50.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:50.646 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:50.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:50.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:50.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:50.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:50.646 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:50.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:50.647 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:50.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:50.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:50.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:50.653 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:50.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:50.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:50.658 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:51.136 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:51.187 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:51.189 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:51.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:51.192 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:51.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:51.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:51.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:51.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:51.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:51.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:51.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:51.212 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:04:51.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:51.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:51.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:51.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:51.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:04:56.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:56.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:56.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:56.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:56.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:56.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:56.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:56.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:56.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:56.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:04:56.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:04:56.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:04:56.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:04:56.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:56.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:56.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:56.229 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:04:56.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:04:56.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:04:56.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:56.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:04:56.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:04:56.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:56.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:56.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:56.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:04:56.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:04:56.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:04:56.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:56.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:04:56.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:04:56.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:56.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:04:56.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:56.238 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:04:56.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:04:56.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:04:56.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:56.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:56.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:04:56.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:04:56.245 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:04:56.245 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:04:56.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:04:56.250 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:04:56.728 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:04:56.779 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:04:56.782 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:04:56.782 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:04:56.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:04:56.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:04:56.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:04:56.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:04:56.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:04:56.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:04:56.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:04:56.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:04:56.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:04:56.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:04:56.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:04:56.793 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:01.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:01.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:01.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:01.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:01.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:01.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:01.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:01.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:01.806 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:01.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:01.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:01.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:01.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:01.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:01.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:01.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:01.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:01.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:01.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:01.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:01.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:01.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:01.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:01.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:01.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:01.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:01.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:01.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:01.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:01.814 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:01.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:01.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:01.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:01.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:01.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:01.817 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:01.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:01.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:01.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:02.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:02.339 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:02.340 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:02.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:02.342 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:02.771 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:05:02.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:02.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:02.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:02.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:03.246 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:05:03.719 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:05:03.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:03.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:03.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:03.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:04.194 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:05:04.665 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:05:04.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:04.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:04.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:04.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:05.139 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:05:05.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:05.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:05.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:05.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:05:05.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:05:05.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:05:05.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:05:05.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:05:05.612 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:05:05.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:05.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:05.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:05.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:06.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:05:06.558 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:05:06.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:06.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:06.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:06.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:07.030 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:05:07.502 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:05:07.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:07.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:07.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:07.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:07.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:07.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:07.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:07.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:07.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:07.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:07.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:07.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:07.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:07.632 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:07.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:12.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:12.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:12.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:12.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:12.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:12.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:12.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:12.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:12.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:12.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:12.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:12.654 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:12.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:12.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:12.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:12.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:12.655 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:12.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:12.655 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:12.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:12.657 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:12.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:12.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:12.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:12.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:12.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:12.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:12.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:12.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:12.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:12.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:12.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:12.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:12.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:12.661 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:12.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:12.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:13.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:13.185 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:13.187 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:13.189 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:13.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:13.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:13.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:13.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:13.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:13.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:13.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:13.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:13.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:13.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:13.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:13.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:13.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:13.249 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:18.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:18.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:18.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:18.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:18.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:18.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:18.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:18.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:18.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:18.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:18.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:18.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:18.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:18.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:18.267 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:18.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:18.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:18.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:18.268 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:18.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:18.270 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:18.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:18.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:18.270 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:18.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:18.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:18.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:18.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:18.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:18.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:18.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:18.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:18.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:18.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:18.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:18.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:18.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:18.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:18.277 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:18.277 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:18.277 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:18.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.282 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:18.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:18.799 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:18.800 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:18.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:18.802 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:18.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:18.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:18.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:18.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:18.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:18.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:18.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:18.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:18.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:18.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:18.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:18.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:18.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:18.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:18.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:18.842 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:23.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:23.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:23.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:23.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:23.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:23.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:23.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:23.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:23.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:23.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:23.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:23.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:23.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:23.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:23.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:23.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:23.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:23.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:23.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:23.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:23.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:23.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:23.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:23.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:23.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:23.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:23.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:23.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:23.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:23.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:23.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:23.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:23.875 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:23.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:23.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:23.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:24.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:24.405 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:24.406 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:24.407 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:24.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:24.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:24.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:24.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:24.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:24.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:24.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:24.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:24.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:24.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:24.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:24.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:24.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:24.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:24.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:24.446 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:24.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:24.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:29.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:29.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:29.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:29.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:29.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:29.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:29.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:29.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:29.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:29.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:29.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:29.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:29.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:29.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:29.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:29.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:29.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:29.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:29.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:29.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:29.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:29.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:29.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:29.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:29.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:29.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:29.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:29.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:29.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:29.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:29.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:29.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:29.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:29.477 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:29.477 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:29.482 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:29.960 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:30.000 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:30.001 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:30.003 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:30.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:30.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:30.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:30.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:30.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:30.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:30.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:30.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:30.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:30.082 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:30.082 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:30.082 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:30.083 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:30.083 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:30.083 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:30.083 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:30.083 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:35.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:35.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:35.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:35.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:35.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:35.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:35.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:35.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:35.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:35.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:35.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:35.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:35.101 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:35.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:35.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:35.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:35.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:35.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:35.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:35.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:35.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:35.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:35.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:35.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:35.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:35.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:35.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:35.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:35.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:35.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:35.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:35.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:35.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:35.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:35.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:35.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:35.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:35.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:35.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:35.116 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:35.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:35.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:35.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:35.643 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:35.645 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:35.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:35.648 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:35.650 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 02:05:35.650 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 200
2026-03-02 02:05:35.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 02:05:35.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:36.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:05:36.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:36.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:36.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:36.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:36.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:36.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:36.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:05:37.022 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:05:37.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:37.294 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 02:05:37.294 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 0
2026-03-02 02:05:37.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 02:05:37.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:37.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:37.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:37.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:37.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:37.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:37.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:37.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:37.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:37.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:37.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:37.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:37.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:37.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:37.303 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:42.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:42.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:42.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:42.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:42.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:42.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:42.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:42.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:42.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:42.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:42.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:42.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:42.315 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:42.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:42.315 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:42.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:42.316 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:42.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:42.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:42.316 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:42.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:42.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:42.318 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:42.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:42.320 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:42.320 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:42.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:42.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:42.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:42.325 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:42.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:42.849 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:42.852 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:42.853 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:42.855 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 02:05:42.855 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 200
2026-03-02 02:05:42.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 02:05:43.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:43.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:05:43.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:43.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:43.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:43.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:43.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:43.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:43.748 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:05:43.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.224 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:05:44.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.490 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 02:05:44.490 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 0
2026-03-02 02:05:44.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 02:05:44.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:44.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:44.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:44.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:44.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:44.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:44.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:44.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:44.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:44.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:44.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:44.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:44.497 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:44.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:44.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:44.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:44.497 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:44.497 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:44.497 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:44.497 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:44.497 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:44.497 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:49.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:49.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:49.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:49.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:49.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:49.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:49.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:49.517 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:49.517 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:49.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:49.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:49.520 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:49.520 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:49.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:49.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:49.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:49.521 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:49.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:49.521 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:49.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:49.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:49.522 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:49.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:49.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:49.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:49.523 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:49.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:49.523 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:49.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:49.525 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:49.525 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:49.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:49.525 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:49.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:49.525 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:49.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:49.525 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:49.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:49.529 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:49.529 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:49.529 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:49.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:49.534 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:50.011 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:50.052 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:50.053 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:50.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:50.055 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:50.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:50.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:50.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:50.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:50.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:50.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:50.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:50.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:50.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:50.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:50.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:50.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:50.095 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:50.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:50.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:50.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:50.095 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:50.096 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:50.096 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:50.096 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:50.096 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:50.096 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:55.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:55.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:55.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:55.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:55.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:55.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:55.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:55.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:55.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:55.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:05:55.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:05:55.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:05:55.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:05:55.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:55.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:55.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:55.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:05:55.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:05:55.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:05:55.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:55.118 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:05:55.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:05:55.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:55.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:55.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:55.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:05:55.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:05:55.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:05:55.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:55.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:05:55.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:05:55.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:55.123 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:05:55.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:55.123 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:05:55.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:05:55.123 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:05:55.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:55.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:05:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:05:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:05:55.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:05:55.129 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:05:55.130 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:05:55.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:05:55.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:05:55.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:05:55.663 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:05:55.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:55.667 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:05:55.669 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:05:55.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:05:55.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:05:55.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:05:55.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:55.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:05:55.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:05:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:05:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:05:55.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:05:55.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:05:55.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:05:55.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:05:55.710 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:05:55.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:05:55.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:05:55.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:05:55.710 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:55.710 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:55.710 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:55.710 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:55.710 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:05:55.710 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:00.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:06:00.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:06:00.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:00.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:00.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:00.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:00.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:00.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:06:00.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:00.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:06:00.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:06:00.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:06:00.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:06:00.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:06:00.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:00.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:00.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:06:00.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:06:00.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:06:00.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:00.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:06:00.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:06:00.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:06:00.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:00.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:00.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:06:00.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:06:00.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:06:00.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:00.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:06:00.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:06:00.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:06:00.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:00.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:00.737 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:06:00.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:06:00.737 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:06:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:00.743 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:06:00.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:06:00.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:06:00.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:06:00.743 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:06:00.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:06:00.744 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:06:00.744 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:06:00.744 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:06:00.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:00.749 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:06:01.227 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:06:01.275 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:06:01.278 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:06:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:01.280 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:06:01.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:01.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:01.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:01.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:01.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:01.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:01.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:01.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:01.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:01.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:01.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:01.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:01.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:01.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:01.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:01.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:01.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:01.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:01.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:01.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:01.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:01.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:01.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:01.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:01.695 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:06:01.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:01.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:01.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:01.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:02.169 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:06:02.641 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:06:02.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:02.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:02.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:02.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:03.114 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:06:03.585 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:06:03.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:03.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:03.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:03.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:04.058 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:06:04.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:04.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:04.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:04.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:04.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:04.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:04.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:04.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:04.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:04.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:04.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:04.530 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:06:04.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:04.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:04.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:04.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:04.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:04.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:04.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:04.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:04.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:04.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:04.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:04.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:04.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:04.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:04.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:04.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:04.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:04.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:04.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:04.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:05.003 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:06:05.486 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:06:05.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:05.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:05.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:05.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:05.959 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:06:06.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:06:06.904 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:06:07.377 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:06:07.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:07.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:07.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:07.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:07.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:07.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:07.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:07.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:07.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:07.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:07.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:07.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:07.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:07.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:07.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:07.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:07.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:07.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:06:08.321 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:06:08.794 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:06:09.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:06:09.740 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:06:10.212 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:06:10.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:10.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:10.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:10.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:10.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:10.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:10.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:10.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:10.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:10.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:10.684 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:06:10.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:10.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:10.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:10.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:10.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:10.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:10.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:10.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:10.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:10.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:10.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:10.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:10.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:10.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:10.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:10.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:10.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:10.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.155 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:06:11.626 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:06:11.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:11.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:11.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:11.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:11.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:11.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:11.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:11.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:11.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:11.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:11.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:11.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:11.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:11.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:11.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:11.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:11.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:11.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:11.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:11.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:11.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:11.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:11.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:12.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:12.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:12.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:12.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:12.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:12.096 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:06:12.568 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:06:13.041 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:06:13.513 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:06:13.986 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:06:14.456 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:06:14.930 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:06:15.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:15.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:15.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:15.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:15.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:15.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:15.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:15.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:15.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:15.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:15.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:15.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:15.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:15.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:15.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:15.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:15.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:15.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:15.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:15.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:15.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:15.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:15.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:15.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:15.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:15.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:15.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:15.402 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:06:15.874 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:06:16.345 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:06:16.819 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:06:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:06:17.763 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:06:18.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:18.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:18.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:18.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:18.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:18.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:18.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:18.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:18.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:18.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:18.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:18.234 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:06:18.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:18.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:18.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:18.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:18.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:18.705 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:06:19.176 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:06:19.647 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:06:20.117 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:06:20.591 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:06:21.063 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:06:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:21.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:21.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:21.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:21.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:21.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:21.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:21.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:21.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:21.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:21.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:21.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:21.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:21.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:21.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:21.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:21.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:21.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:21.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:21.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:21.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:21.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:21.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:21.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:21.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:21.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:21.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:21.533 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:06:22.006 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:06:22.479 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:06:22.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:22.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:22.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:22.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:22.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:22.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:22.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:22.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:22.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:22.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:22.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:22.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:22.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:22.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:22.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:22.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:22.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:22.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:22.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:22.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:22.951 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:06:22.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:22.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:22.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:22.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:22.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:22.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:22.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:22.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:22.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:23.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:23.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:23.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:23.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:23.424 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:06:23.896 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:06:24.367 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:06:24.840 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:06:25.313 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:06:25.785 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:06:26.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:26.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:26.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:26.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:26.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:26.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:26.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:26.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:26.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:26.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:26.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:26.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:26.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:26.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:26.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:26.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:26.258 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:06:26.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:26.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:26.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:26.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:26.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:26.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:26.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:26.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:26.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:26.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:26.730 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:06:27.202 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:06:27.673 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:06:28.147 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:06:28.619 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:06:29.091 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:06:29.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:29.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:29.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:29.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:29.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:29.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:29.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:29.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:29.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:29.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:29.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:29.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:29.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:29.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:29.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:29.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:29.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:29.564 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:06:30.037 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:06:30.509 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:06:30.980 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:06:31.454 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:06:31.926 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:06:32.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:32.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:32.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:32.398 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:06:32.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:32.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:32.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:32.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:32.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:32.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:32.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:32.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:32.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:32.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:32.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:32.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:32.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:32.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:32.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:32.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:32.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:32.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:32.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:32.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:32.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:32.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:32.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:32.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:06:33.340 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:06:33.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:33.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:33.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:33.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:33.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:33.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:33.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:33.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:33.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:33.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:33.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:33.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:33.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:33.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:33.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:33.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:33.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:33.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:33.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:33.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:33.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:33.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:33.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:33.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:33.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:33.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:06:34.282 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:06:34.755 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:06:35.227 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:06:35.699 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:06:36.170 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:06:36.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:36.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:36.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:36.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:36.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:36.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:36.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:36.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:36.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:36.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:36.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:36.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:36.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:36.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.643 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:06:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:36.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:36.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:36.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:36.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:36.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:36.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:36.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:36.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:36.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:36.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:36.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:36.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:36.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:36.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:37.116 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:06:37.588 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:06:38.059 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:06:38.532 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:06:39.005 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:06:39.477 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:06:39.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:39.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:39.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:39.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:39.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:39.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:39.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:39.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:39.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:39.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:39.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:39.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:39.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:39.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:39.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:39.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:39.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:39.948 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:06:40.419 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:06:40.892 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:06:41.364 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:06:41.835 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:06:42.307 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:06:42.778 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:06:42.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:42.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:42.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:42.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:42.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:42.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:42.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:42.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:42.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:42.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:42.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:42.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:42.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:42.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:42.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:42.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:42.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:43.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:43.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:43.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:43.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:43.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:43.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:43.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:43.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:43.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:43.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:43.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:43.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:43.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:43.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:43.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:43.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:06:43.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:43.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:43.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:43.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:43.720 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:06:43.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:43.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:43.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:43.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:43.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:43.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:43.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:43.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:43.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:06:43.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:06:43.730 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:06:48.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:06:48.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:06:48.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:48.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:48.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:48.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:48.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:48.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:06:48.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:48.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:06:48.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:06:48.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:06:48.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:06:48.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:06:48.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:48.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:48.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:06:48.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:06:48.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:06:48.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:48.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:06:48.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:06:48.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:06:48.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:48.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:48.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:06:48.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:06:48.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:06:48.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:48.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:06:48.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:06:48.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:06:48.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:48.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:48.757 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:06:48.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:06:48.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:06:48.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:06:48.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:06:48.762 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:06:48.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:48.766 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:06:49.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:06:49.290 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:06:49.292 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:06:49.295 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:06:49.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:49.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:49.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:49.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:49.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:49.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:49.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:49.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:49.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:49.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:06:49.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:49.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:49.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:49.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:49.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:49.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:49.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:49.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:49.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:49.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:49.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:49.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:49.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:49.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:50.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:50.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:50.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:50.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:50.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:50.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:50.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:50.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:50.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:50.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:50.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:50.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:50.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:06:50.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:06:50.055 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:06:50.056 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:50.056 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:50.056 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:50.056 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:50.056 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:50.056 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:06:55.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:06:55.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:06:55.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:55.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:55.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:55.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:55.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:55.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:06:55.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:55.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:06:55.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:06:55.071 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:06:55.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:06:55.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:06:55.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:55.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:55.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:06:55.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:06:55.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:06:55.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:55.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:06:55.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:06:55.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:06:55.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:55.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:55.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:06:55.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:06:55.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:06:55.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:55.080 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:06:55.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:06:55.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:06:55.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:06:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:55.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:06:55.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:06:55.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:06:55.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:55.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:06:55.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:06:55.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:06:55.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:06:55.086 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:06:55.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:06:55.087 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:06:55.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:06:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:06:55.092 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:06:55.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:06:55.622 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:06:55.624 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:06:55.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:55.627 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:06:55.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:55.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:55.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:55.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:55.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:55.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:55.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:55.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:55.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:55.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:55.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:55.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:55.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:06:56.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:56.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:56.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:56.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:56.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:56.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:56.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:56.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:56.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:56.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:56.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:56.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:56.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:56.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:56.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:56.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:06:56.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:56.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:56.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:56.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:56.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:56.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:56.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:56.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:56.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:56.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:56.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:56.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:56.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:56.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:56.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:56.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:56.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:56.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:56.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:06:56.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:56.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:56.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:06:56.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:06:56.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:56.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:06:56.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:06:56.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:56.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:06:57.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:57.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:57.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:57.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:57.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:06:57.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:06:57.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:06:57.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:06:57.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:06:57.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:06:57.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:06:57.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:06:57.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:06:57.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:06:57.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:06:57.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:06:57.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:06:57.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:06:57.392 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:07:02.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:02.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:02.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:02.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:02.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:02.403 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:02.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:02.404 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:07:02.406 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:07:02.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:07:02.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:02.407 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:02.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:02.408 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:07:02.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:02.408 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:07:02.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:02.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:07:02.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:07:02.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:02.411 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:02.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:02.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:07:02.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:02.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:07:02.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:02.414 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:07:02.414 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:07:02.414 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:02.414 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:02.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:02.414 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:07:02.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:02.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:07:02.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.419 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:07:02.419 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:07:02.419 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:07:02.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:02.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:07:02.901 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:07:02.946 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:07:02.948 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:07:02.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:02.951 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:07:02.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:02.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:02.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:02.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:02.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:02.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:02.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:02.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:02.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:03.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:03.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:03.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:03.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:03.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:03.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:03.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:07:03.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:03.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:03.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:03.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:03.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:03.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:03.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:03.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:03.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:03.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:03.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:07:03.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:03.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:03.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:03.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:03.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:03.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:03.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:03.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:03.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:04.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:04.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:04.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:04.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:04.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:04.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:04.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:04.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:04.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:04.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:04.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:04.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:04.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:04.250 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.251 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.252 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.252 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.252 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.252 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:04.252 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:09.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:09.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:09.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:09.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:09.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:09.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:09.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:09.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:09.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:09.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:09.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:07:09.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:07:09.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:07:09.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:09.267 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:09.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:09.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:07:09.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:09.268 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:07:09.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:09.270 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:07:09.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:07:09.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:09.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:09.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:09.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:07:09.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:09.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:07:09.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:09.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:07:09.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:07:09.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:09.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:09.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:09.274 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:07:09.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:09.274 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:07:09.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:07:09.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:07:09.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:07:09.278 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:07:09.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:09.282 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:07:09.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:07:09.798 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:07:09.799 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:07:09.799 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:07:09.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:09.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:09.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:09.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:09.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:09.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:09.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:09.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:09.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:09.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:09.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:09.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:09.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:09.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:10.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:10.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:10.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:10.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:10.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:10.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:10.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:10.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:10.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:10.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:10.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:10.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:10.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:07:10.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:10.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:10.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:10.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:10.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:10.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:10.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:10.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:10.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:10.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:10.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:10.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:10.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:10.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:10.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:10.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:10.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:10.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:10.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:10.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:10.704 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:07:10.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:10.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:10.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:10.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:10.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:10.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:10.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:10.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:10.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:10.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:10.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:10.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:11.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:11.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:11.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:11.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:11.097 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=393 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:11.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:11.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:11.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:11.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:11.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:11.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:11.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:11.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:11.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:11.110 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:07:11.110 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.110 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.110 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.110 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:11.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:16.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:16.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:16.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:16.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:16.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:16.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:16.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:16.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:16.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:16.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:16.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:07:16.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:07:16.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:07:16.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:16.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:16.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:16.132 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:07:16.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:16.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:07:16.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:16.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:07:16.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:07:16.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:16.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:16.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:16.136 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:07:16.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:16.137 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:07:16.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:16.138 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:07:16.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:07:16.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:16.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:16.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:16.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:07:16.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:16.139 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:07:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:16.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:07:16.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:07:16.144 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:07:16.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:16.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:07:16.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:07:16.670 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:07:16.672 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:07:16.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:16.673 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:07:16.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:16.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:16.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:16.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:16.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:16.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:16.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:16.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:16.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:16.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:16.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:16.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:16.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:17.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:07:17.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:17.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:17.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:17.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:17.571 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:07:18.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:07:18.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:18.513 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:07:18.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:18.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:18.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:18.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:18.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:18.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:18.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:18.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:18.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:18.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:18.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:18.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:18.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:18.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:18.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:18.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:18.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:18.985 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:07:19.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:19.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:19.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:19.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:19.458 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:07:19.930 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:07:20.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:20.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:20.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:20.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:20.401 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:07:20.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:20.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:20.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:20.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:20.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:20.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:20.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:20.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:20.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:20.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:20.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:20.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:20.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:20.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:20.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:20.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:20.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:20.872 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:07:21.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:21.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:21.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:21.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:21.343 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:07:21.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:07:22.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:07:22.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:22.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:22.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:22.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:22.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:22.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:22.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:22.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:22.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:22.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:22.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:22.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:22.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:22.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:22.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:22.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:22.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:22.757 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:07:23.230 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:07:23.702 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:07:24.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:24.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:24.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:24.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:24.173 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:07:24.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:24.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:24.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:24.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:24.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:24.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:24.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:24.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:24.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:24.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:24.183 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:07:24.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.183 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.184 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.184 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.184 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.184 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.184 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:24.184 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:29.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:29.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:29.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:29.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:29.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:29.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:29.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:29.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:29.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:29.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:29.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:07:29.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:07:29.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:07:29.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:29.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:29.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:29.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:07:29.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:29.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:07:29.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:29.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:07:29.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:07:29.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:29.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:29.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:29.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:07:29.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:29.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:07:29.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:29.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:07:29.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:07:29.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:29.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:29.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:29.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:07:29.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:29.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:07:29.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:07:29.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:07:29.203 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:07:29.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:07:29.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:29.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:07:29.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:07:29.726 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:07:29.728 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:07:29.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:29.730 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:07:29.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:29.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:29.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:29.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:29.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:29.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:29.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:29.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:29.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:29.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:29.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:29.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:29.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:30.158 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:07:30.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:30.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:30.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:30.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:30.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:07:31.101 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:07:31.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:31.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:31.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:31.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:31.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:07:31.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:31.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:31.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:31.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:31.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:31.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:31.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:31.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:31.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:31.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:31.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:31.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:31.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:31.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:31.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:31.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:31.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:32.043 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:07:32.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:32.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:32.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:32.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:32.515 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:07:32.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:07:33.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:33.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:33.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:33.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:33.460 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:07:33.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:33.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:33.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:33.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:33.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:33.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:33.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:33.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:33.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:33.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:33.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:33.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:33.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:33.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:33.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:33.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:33.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:33.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:07:34.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:34.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:34.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:34.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:34.404 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:07:34.877 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:07:35.349 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:07:35.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:35.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:35.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:35.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:35.391 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=1337 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:07:35.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:35.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:35.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:35.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:35.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:35.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:35.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:35.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:35.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:35.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:35.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:35.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:35.820 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:07:36.293 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:07:36.765 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:07:37.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:37.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:37.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:37.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:07:37.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:37.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:37.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:37.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:37.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:37.249 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:07:37.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:37.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:42.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:07:42.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:07:42.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:42.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:42.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:42.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:42.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:07:42.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:42.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:42.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:07:42.259 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:07:42.261 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:07:42.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:07:42.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:42.262 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:42.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:07:42.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:07:42.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:07:42.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:07:42.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:42.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:07:42.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:07:42.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:42.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:07:42.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:07:42.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:07:42.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:07:42.269 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:07:42.269 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:07:42.269 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:07:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:07:42.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:07:42.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:07:42.795 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:07:42.797 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:07:42.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:42.799 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:07:42.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:42.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:42.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:42.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:42.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:42.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:42.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:42.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:42.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:42.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:42.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:42.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:42.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:43.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:43.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:43.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:43.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:43.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:43.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:43.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:43.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:43.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:43.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:43.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:43.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:43.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:43.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:43.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:43.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:43.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:43.223 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:07:43.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:43.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:43.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:43.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:43.697 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:07:44.169 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:07:44.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:44.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:44.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:44.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:07:45.112 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:07:45.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:45.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:45.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:45.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:45.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:45.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:45.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:45.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:45.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:45.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:45.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:45.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:45.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:45.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:45.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:45.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:45.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:45.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:45.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:45.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:45.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:45.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:45.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:45.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:45.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:45.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:45.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:45.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:45.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:45.583 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:07:46.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:07:46.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:46.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:46.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:46.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:46.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:07:46.999 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:07:47.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:07:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:07:47.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:07:47.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:07:47.472 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:07:47.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:47.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:47.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:47.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:47.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:47.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:47.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:47.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:47.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:47.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:47.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:47.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:47.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:47.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:47.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:47.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:47.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:47.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:47.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:47.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:47.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:47.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:47.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:47.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:07:47.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:47.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:47.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:47.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:48.418 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:07:48.890 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:07:49.361 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:07:49.834 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:07:50.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:50.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:50.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:50.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:50.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:50.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:50.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:50.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:50.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:50.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:50.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:50.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:50.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:50.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.306 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:07:50.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:50.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:50.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:50.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:50.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:50.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:50.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:50.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:50.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:50.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:50.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:50.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:50.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:50.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:50.778 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:07:51.249 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:07:51.721 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:07:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:07:52.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:52.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:52.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:52.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:52.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:52.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:52.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:52.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:52.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:52.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:52.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:52.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:52.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:52.666 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:07:52.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:52.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:52.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:52.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:53.138 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:07:53.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:53.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:53.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:53.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:53.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:53.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:53.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:53.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:53.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:53.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:53.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:53.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:53.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:53.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:53.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:53.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:53.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:53.610 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:07:54.083 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:07:54.555 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:07:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:54.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:54.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:54.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:55.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:55.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:55.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:55.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:55.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:55.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:55.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:55.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:55.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:55.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:55.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.026 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:07:55.497 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:07:55.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:55.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:55.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:55.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:55.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:55.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:55.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:55.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:55.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:55.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:55.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:55.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:55.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:55.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:55.970 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:07:56.443 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:07:56.914 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:07:57.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:57.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:57.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:57.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:57.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:57.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:57.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:57.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:57.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:57.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:57.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:57.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:57.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:57.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:57.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:57.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:57.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:57.385 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:07:57.856 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:07:57.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:57.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:57.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:57.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:57.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:57.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:57.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:57.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:57.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:57.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:57.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:57.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:57.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:58.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:58.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:58.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:58.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:58.330 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:07:58.807 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:07:59.279 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:07:59.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:59.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:59.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:59.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:59.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:07:59.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:07:59.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:07:59.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:59.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:59.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:59.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:07:59.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:07:59.750 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:07:59.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:07:59.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:07:59.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:07:59.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:07:59.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:00.223 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:08:00.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:00.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:00.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:00.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:00.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:00.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:00.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:00.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:00.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:00.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:00.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:00.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:00.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:00.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:00.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:00.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:00.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:00.695 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:08:01.167 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:08:01.638 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:08:02.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:02.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:02.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:02.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:02.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:02.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:02.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:02.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:02.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:02.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:02.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:02.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:02.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:02.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:02.046 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:02.046 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:02.046 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:02.046 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:02.046 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:02.046 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:02.046 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:07.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:07.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:07.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:07.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:07.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:07.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:07.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:07.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:07.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:07.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:07.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:07.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:07.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:07.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:07.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:07.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:07.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:07.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:07.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:07.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:07.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:07.063 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:07.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:07.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:07.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:07.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:07.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:07.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:07.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:07.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:07.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:07.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:07.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:07.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:07.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:07.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:07.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:07.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:07.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:07.069 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:07.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:07.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:07.074 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:07.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:07.598 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:07.601 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.603 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:07.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:07.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:07.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:07.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:07.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:07.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:07.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:07.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:07.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:07.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:07.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:07.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:07.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:07.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:07.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:07.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:07.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:07.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:07.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.024 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:08.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:08.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:08.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:08.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:08.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:08.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:08.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:08.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:08.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:08.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:08.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:08.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:08.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:08.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:08.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:08.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:08.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:08.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:08.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:08.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:08.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:08.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:08.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:08.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:08.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:08.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:08.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:08.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:08.827 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:08.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:08.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:13.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:13.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:13.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:13.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:13.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:13.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:13.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:13.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:13.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:13.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:13.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:13.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:13.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:13.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:13.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:13.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:13.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:13.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:13.849 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:13.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:13.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:13.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:13.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:13.852 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:13.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:13.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:13.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:13.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:13.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:13.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:13.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:13.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:13.854 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:13.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:13.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:13.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:13.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:13.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:13.857 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:13.858 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:13.858 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:13.858 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:13.863 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:14.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:14.386 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:14.388 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:14.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:14.390 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:14.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:14.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:14.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:14.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:14.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:14.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:14.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:14.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:14.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:14.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:14.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:14.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:14.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:14.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:14.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:14.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:14.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:14.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:15.287 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:15.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:15.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:15.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:15.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:15.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:15.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:15.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:15.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:15.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:15.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:15.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:15.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:15.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:15.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.760 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:08:15.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:15.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:15.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:15.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:15.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:15.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:15.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:15.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:15.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:15.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:15.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:15.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:15.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:15.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:15.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:15.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:15.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:15.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:15.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:16.232 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:08:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:16.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:16.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:16.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:16.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:16.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:16.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:16.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:16.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:16.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:16.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:16.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:16.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:16.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:16.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:16.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:16.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:16.703 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:08:16.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:16.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:16.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:16.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:16.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:16.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:16.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:16.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:17.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:17.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:17.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:17.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:17.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:17.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:17.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:17.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:17.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:17.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:17.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:17.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:17.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:17.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:17.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:17.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:17.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:17.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:17.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:17.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:17.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:17.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:17.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:17.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.176 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:08:17.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:17.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:17.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:17.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:17.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:17.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:17.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:17.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:17.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:17.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:17.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:17.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:17.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:17.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:17.648 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:08:17.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:17.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:17.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:17.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:18.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:18.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:18.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:18.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:18.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:18.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:18.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:18.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:18.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:18.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:18.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:18.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:18.119 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:08:18.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:18.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:18.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:18.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:18.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:18.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:18.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:18.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:18.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:18.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:18.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:18.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:18.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:18.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:18.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:18.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:18.527 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:18.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:18.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:18.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:18.527 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:18.527 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:18.527 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:18.527 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:18.527 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:18.527 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:23.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:23.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:23.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:23.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:23.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:23.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:23.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:23.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:23.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:23.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:23.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:23.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:23.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:23.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:23.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:23.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:23.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:23.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:23.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:23.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:23.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:23.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:23.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:23.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:23.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:23.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:23.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:23.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:23.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:23.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:23.549 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:23.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:23.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:23.554 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:23.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:23.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:23.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:24.037 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:24.083 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:24.086 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:24.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.089 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:24.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:24.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:24.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:24.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:24.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.509 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:24.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:24.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:24.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:24.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:24.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:24.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:24.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:24.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.980 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:24.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:24.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:24.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:24.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:24.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:24.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:24.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:24.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:25.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:25.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:25.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:25.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:25.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:25.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:25.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:25.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:25.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:25.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:25.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:25.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:25.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:25.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:25.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:25.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:25.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:25.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:25.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:25.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:25.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:25.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:25.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:25.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:25.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:25.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:25.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:25.382 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:30.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:30.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:30.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:30.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:30.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:30.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:30.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:30.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:30.395 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:30.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:30.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:30.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:30.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:30.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:30.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:30.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:30.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:30.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:30.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:30.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:30.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:30.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:30.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:30.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:30.402 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:30.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:30.402 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:30.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:30.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:30.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:30.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:30.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:30.411 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:30.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:30.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:30.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:30.945 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:30.947 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:30.948 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:30.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:30.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:30.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:30.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:30.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:30.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:30.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:30.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:30.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:30.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:30.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:30.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:30.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:30.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:31.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:31.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:31.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:31.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:31.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:31.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:31.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:31.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:31.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:31.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:31.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:31.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:31.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:31.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:31.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:31.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:31.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:31.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:31.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:31.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:31.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:31.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:31.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:32.309 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:08:32.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:32.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:32.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:32.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:32.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:08:32.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:32.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:32.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:32.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:32.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:32.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:32.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:32.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:32.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:32.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:32.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:32.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:32.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:32.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:32.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:32.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:32.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:33.255 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:08:33.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:33.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:33.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:33.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:33.727 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:08:34.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:34.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:34.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:34.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:34.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:34.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:34.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:34.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:34.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:34.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:34.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:34.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:34.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:34.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:34.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:34.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:34.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:34.197 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:08:34.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:34.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:34.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:34.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:34.669 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:08:34.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:34.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:34.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:34.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:35.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:35.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:35.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:35.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:35.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:35.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:35.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:35.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:35.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:35.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:35.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:35.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:35.141 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:08:35.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:35.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:35.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:35.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:35.614 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:08:35.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:35.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:35.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:35.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:35.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:35.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:35.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:35.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:35.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:35.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:35.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:35.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:35.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:35.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:35.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:36.086 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:08:36.558 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:08:36.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:36.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:36.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:36.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:36.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:36.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:36.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:36.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:36.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:36.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:36.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:36.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:36.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:36.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:36.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:36.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:36.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:37.028 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:08:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:37.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:37.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:37.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:37.501 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:08:37.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:37.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:37.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:37.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:37.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:37.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:37.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:37.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:37.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:37.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:37.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:37.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:37.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:37.974 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:08:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:38.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:38.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:38.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:38.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:08:38.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:38.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:38.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:38.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:38.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:38.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:38.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:38.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:38.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:38.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:38.452 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:43.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:43.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:43.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:43.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:43.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:43.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:43.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:43.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:43.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:43.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:43.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:43.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:43.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:43.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:43.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:43.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:43.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:43.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:43.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:43.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:43.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:43.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:43.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:43.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:43.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:43.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:43.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:43.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:43.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:43.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:43.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:43.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:43.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:43.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:43.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:43.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:43.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:43.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:43.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:43.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:43.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:43.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:43.488 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:43.489 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:43.489 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:43.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:43.494 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:43.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:44.016 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:44.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.018 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:44.019 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:44.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:44.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:44.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:44.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:44.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:44.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:44.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:44.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:44.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:44.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:44.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:44.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:44.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:44.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:44.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:44.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:44.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:44.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:44.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:44.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:44.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:44.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:44.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:44.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:45.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:45.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:45.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:45.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:45.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:45.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:45.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:45.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:45.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:45.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:45.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:45.080 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:45.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:45.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:45.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:45.081 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:45.081 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:45.081 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:45.081 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:45.081 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:45.081 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:50.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:50.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:50.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:50.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:50.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:50.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:50.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:50.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:50.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:50.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:50.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:50.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:50.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:50.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:50.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:50.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:50.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:50.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:50.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:50.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:50.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:50.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:50.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:50.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:50.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:50.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:50.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:50.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:50.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:50.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:50.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:50.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:50.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:50.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:50.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:50.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:50.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:50.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:50.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:50.106 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:50.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:50.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:50.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:50.627 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:50.628 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:50.629 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:50.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:50.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:50.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:50.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:50.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:50.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:50.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:50.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:50.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:50.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:50.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:50.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:50.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:50.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:50.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:50.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:50.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:50.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:50.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:50.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:50.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:50.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:50.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:50.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:50.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:50.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:50.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:50.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:50.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:50.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:51.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:51.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:51.060 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:51.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:51.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:51.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:51.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:51.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:51.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:51.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:51.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:51.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:51.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:51.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:51.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:51.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:51.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:51.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:51.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:51.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:51.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:51.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:51.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:51.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:51.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:51.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:51.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:51.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:51.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:51.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:51.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:51.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:51.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:51.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:51.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:51.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:51.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:51.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:51.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:51.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:51.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:51.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:51.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:51.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:51.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:51.701 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:56.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:56.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:56.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:56.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:56.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:56.714 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:56.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:08:56.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:08:56.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:08:56.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:08:56.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:56.721 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:56.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:56.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:08:56.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:08:56.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:08:56.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:56.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:08:56.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:08:56.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:56.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:56.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:56.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:08:56.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:08:56.726 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:08:56.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:56.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:08:56.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:08:56.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:56.729 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:08:56.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:56.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:08:56.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:08:56.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:08:56.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:08:56.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:08:56.733 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:08:56.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:08:56.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:08:56.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:08:56.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:08:56.738 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:08:57.216 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:08:57.259 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:08:57.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.262 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:08:57.264 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:08:57.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:57.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:57.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:57.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:57.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:57.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:57.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:57.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:57.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:57.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:08:57.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:57.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:57.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:57.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:57.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:57.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:57.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:08:57.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:08:57.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:08:57.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:57.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:08:57.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:08:57.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:57.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:58.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:08:58.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:08:58.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:08:58.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:08:58.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:08:58.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:08:58.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:08:58.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:08:58.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:08:58.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:08:58.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:08:58.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:08:58.327 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:08:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:08:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:08:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:08:58.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:03.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:03.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:03.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:03.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:03.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:03.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:03.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:03.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:03.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:03.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:03.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:03.349 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:03.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:03.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:03.350 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:03.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:03.350 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:03.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:03.351 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:03.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:03.355 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:03.355 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:03.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:03.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:03.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:03.355 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:03.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:03.356 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:03.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:03.359 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:03.359 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:03.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:03.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:03.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:03.360 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:03.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:03.360 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:03.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:03.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:03.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:03.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:03.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:03.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:03.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:03.366 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:03.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:03.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:03.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:03.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:03.895 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:03.897 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:03.900 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:03.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:03.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:03.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:03.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:03.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:03.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:03.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:03.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:03.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:03.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:03.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:03.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:04.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:04.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:04.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:04.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:04.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:04.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:04.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:09:04.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:04.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:04.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:04.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:04.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:04.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:04.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:04.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:04.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:04.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:04.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:04.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:04.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:04.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:04.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:04.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:04.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:04.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:04.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:09:04.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:04.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:04.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:04.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:04.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:04.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:04.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:04.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:04.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:04.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:04.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:04.965 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:04.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:04.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:04.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:04.966 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:09.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:09.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:09.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:09.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:09.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:09.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:09.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:09.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:09.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:09.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:09.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:09.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:09.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:09.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:09.984 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:09.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:09.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:09.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:09.985 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:09.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:09.986 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:09.986 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:09.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:09.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:09.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:09.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:09.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:09.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:09.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:09.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:09.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:09.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:09.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:09.991 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:09.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:09.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:09.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:10.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:10.511 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:10.513 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:10.514 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:10.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:10.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:10.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:10.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:10.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:10.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:10.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:10.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:10.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:10.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:10.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:10.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:10.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:10.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:10.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:10.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:10.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:10.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:10.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:10.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:10.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:10.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:10.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:10.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:10.945 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:09:10.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:10.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:10.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:10.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:11.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:09:11.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:11.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:11.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:11.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:11.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:11.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:11.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:11.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:11.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:11.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:11.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:11.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:11.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:11.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:11.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:11.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:11.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:11.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:09:11.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:11.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:11.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:11.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:12.362 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:09:12.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:12.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:12.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:12.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:12.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:12.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:12.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:12.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:12.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:12.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:12.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:12.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:12.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:12.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:12.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:12.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:12.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:12.834 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:09:12.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:12.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:12.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:12.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:13.305 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:09:13.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:13.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:13.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:13.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:13.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:13.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:13.635 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:18.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:18.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:18.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:18.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:18.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:18.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:18.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:18.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:18.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:18.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:18.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:18.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:18.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:18.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:18.650 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:18.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:18.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:18.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:18.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:18.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:18.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:18.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:18.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:18.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:18.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:18.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:18.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:18.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:18.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:18.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:18.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:18.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:18.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:18.658 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:18.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:18.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:19.141 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:19.182 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:19.185 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:19.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:19.187 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:19.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:19.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:19.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:19.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:19.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:19.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:19.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:19.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:19.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:19.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:19.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:19.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:19.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:19.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:19.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:19.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:19.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:19.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:19.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:19.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:19.613 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:09:19.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:19.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:19.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:19.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:19.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:19.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:19.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:19.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:09:20.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:20.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:20.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:20.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:20.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:20.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:20.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:20.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:20.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:20.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:20.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:20.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:20.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:20.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:20.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:20.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:20.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:20.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:09:20.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:20.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:20.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:20.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:21.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:09:21.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:21.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:21.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:21.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:21.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:21.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:21.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:21.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:21.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:21.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:21.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:21.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:21.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:21.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:21.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:21.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:21.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:21.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:09:21.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:21.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:21.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:21.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:21.973 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:09:22.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:22.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:22.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:22.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:22.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:22.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:22.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:22.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:22.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:22.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:22.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:22.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:22.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:22.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:22.307 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:27.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:27.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:27.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:27.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:27.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:27.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:27.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:27.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:27.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:27.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:27.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:27.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:27.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:27.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:27.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:27.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:27.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:27.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:27.326 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:27.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:27.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:27.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:27.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:27.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:27.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:27.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:27.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:27.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:27.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:27.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:27.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:27.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:27.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:27.333 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:27.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:27.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:27.816 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:27.854 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:27.854 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:27.856 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:27.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:27.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:27.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:27.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:27.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:27.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:27.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:27.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:27.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:27.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:27.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:27.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:27.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:27.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:28.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:28.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:28.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:28.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:28.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:28.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:28.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:28.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:28.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:28.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:09:28.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:28.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:28.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:28.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:28.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:28.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:28.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:28.759 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:09:28.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:28.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:28.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:28.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:28.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:28.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:28.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:28.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:28.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:28.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:28.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:28.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:28.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:28.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:28.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:29.231 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:09:29.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:29.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:29.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:29.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:29.702 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:09:29.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:29.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:29.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:29.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:29.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:29.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:29.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:29.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:29.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:29.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:29.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:29.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:29.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:29.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:29.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:29.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:29.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:30.172 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:09:30.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:30.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:30.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:30.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:30.643 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:09:30.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:30.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:30.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:30.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:30.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:30.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:30.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:30.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:30.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:30.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:30.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:30.981 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:30.981 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:30.981 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:30.981 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:30.981 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:30.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:30.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:35.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:35.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:35.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:35.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:35.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:35.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:35.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:35.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:35.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:35.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:35.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:35.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:35.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:35.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:35.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:35.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:35.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:35.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:35.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:35.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:35.988 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:35.988 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:35.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:35.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:35.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:35.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:35.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:35.991 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:35.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:35.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:36.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:36.516 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:36.517 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:36.519 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:36.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:36.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:36.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:36.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:36.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:36.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:36.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:36.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:36.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:36.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:36.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:36.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:36.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:36.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:36.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:36.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:36.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:36.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:36.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:36.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:36.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:09:36.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:36.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:36.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:36.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:36.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:36.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:36.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:36.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:37.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:09:37.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:37.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:37.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:37.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:37.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:37.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:37.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:37.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:37.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:37.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:37.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:37.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:37.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:37.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:37.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:37.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:37.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:37.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:09:37.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:37.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:37.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:37.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:38.361 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:09:38.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:38.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:38.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:38.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:38.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:38.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:38.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:38.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:38.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:38.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:38.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:09:38.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:09:38.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:38.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:09:38.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:09:38.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:38.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:38.833 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:09:38.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:38.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:38.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:38.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:39.305 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:09:39.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:39.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:09:39.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:39.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:39.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:39.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:39.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:39.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:39.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:39.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:39.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:39.639 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:39.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:39.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:39.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:39.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:44.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:44.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:44.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:44.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:44.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:44.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:44.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:44.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:44.655 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:44.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:44.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:44.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:44.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:44.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:44.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:44.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:44.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:44.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:44.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:44.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:44.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:44.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:44.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:44.667 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:44.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:44.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:44.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:44.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:44.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:44.671 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:44.671 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:44.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:44.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:44.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:44.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:44.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:44.675 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:44.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:44.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:44.676 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:44.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:44.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:45.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:45.207 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:45.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:45.208 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:45.210 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:45.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:45.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:45.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:45.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:45.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:45.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:45.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:45.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:45.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:45.254 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:45.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:45.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:45.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:45.254 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:45.254 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:45.254 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:45.254 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:45.254 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:45.254 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:50.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:50.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:50.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:50.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:50.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:50.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:50.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:50.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:50.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:50.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:50.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:50.270 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:50.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:50.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:50.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:50.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:50.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:50.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:50.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:50.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:50.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:50.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:50.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:50.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:50.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:50.273 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:50.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:50.273 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:50.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:50.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:50.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:50.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:50.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:50.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:50.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:50.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:50.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:50.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:50.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:50.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:50.279 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:50.279 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:50.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:50.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:50.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:50.762 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:50.804 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:50.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:50.807 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:50.810 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:50.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:50.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:50.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:50.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:50.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:50.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:50.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:50.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:50.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:50.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:50.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:50.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:50.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:50.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:50.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:50.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:50.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:50.866 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:55.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:55.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:55.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:55.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:55.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:55.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:55.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:55.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:55.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:55.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:09:55.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:09:55.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:09:55.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:09:55.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:55.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:55.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:55.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:09:55.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:09:55.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:09:55.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:55.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:09:55.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:09:55.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:55.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:55.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:55.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:09:55.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:09:55.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:09:55.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:55.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:09:55.889 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:09:55.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:55.889 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:09:55.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:55.889 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:09:55.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:09:55.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:09:55.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:09:55.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:09:55.893 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:09:55.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:09:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:09:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:09:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:09:56.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:09:56.421 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:09:56.423 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:09:56.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:09:56.424 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:09:56.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:09:56.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:09:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:09:56.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:09:56.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:09:56.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:09:56.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:09:56.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:09:56.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:09:56.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:09:56.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:09:56.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:09:56.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:09:56.468 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.469 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.469 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.469 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:09:56.469 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:01.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:01.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:01.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:01.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:01.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:01.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:01.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:01.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:01.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:01.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:01.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:10:01.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:10:01.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:10:01.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:01.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:01.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:10:01.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:01.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:01.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:01.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:10:01.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:01.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:10:01.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:01.476 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:01.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:10:01.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:10:01.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:10:01.478 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:10:01.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:01.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:01.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:01.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:01.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:01.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:01.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:01.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:01.480 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:10:06.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:06.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:06.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:06.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:06.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:06.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:06.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:06.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:06.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:06.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:06.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:10:06.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:10:06.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:10:06.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:06.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:06.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:06.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:10:06.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:06.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:10:06.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:06.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:10:06.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:10:06.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:06.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:06.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:06.507 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:10:06.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:06.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:10:06.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:06.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:10:06.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:10:06.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:06.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:06.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:06.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:10:06.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:06.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:10:06.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:06.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:10:06.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:10:06.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:10:06.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:10:06.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:10:06.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:10:06.517 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:10:06.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:06.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:06.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:06.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:10:07.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:10:07.051 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:10:07.053 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:10:07.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:07.056 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:10:07.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:07.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:07.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:07.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:07.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:07.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:07.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:07.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:07.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:07.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:07.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:07.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:07.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:07.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:10:07.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:07.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:07.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:07.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:07.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:10:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:08.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:08.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:08.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:08.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:08.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:08.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:08.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:08.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:08.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:08.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:08.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:08.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:08.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:08.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:08.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:10:08.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:08.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:08.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:08.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:10:09.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:09.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:09.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:09.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:09.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:09.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:09.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:09.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:09.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:09.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:09.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:09.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:09.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:09.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:09.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:09.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:09.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:09.362 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:10:09.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:09.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:09.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:09.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:09.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:10:09.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:09.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:09.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:09.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:10.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:10.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:10.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:10.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:10.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:10.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:10.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:10.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:10.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:10.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:10.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:10.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:10.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:10.304 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:10:10.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:10.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:10.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:10.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:10.777 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:10:10.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:10.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:10.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:10.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:10.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:10.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:10.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:10.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:10.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:10.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:10.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:10.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:11.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:11.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:11.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:11.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:11.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:11.250 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:10:11.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:11.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:11.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:11.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:11.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:11.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:11.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:11.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:11.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:11.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:11.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:11.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:11.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:11.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:11.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:11.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:11.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:11.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:11.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:11.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:11.722 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:10:12.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:12.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:12.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:12.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:12.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:12.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:12.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:12.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:12.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:12.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:12.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:10:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:12.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:12.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:12.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:10:12.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:12.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:12.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:12.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:12.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:12.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:12.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:12.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:12.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:12.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:12.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:12.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:12.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:12.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:12.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:12.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:13.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:10:13.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:13.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:13.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:13.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:13.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:13.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:13.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:13.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:13.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:13.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:13.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:13.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:13.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:13.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:13.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:13.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:13.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:13.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:10:14.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:10:14.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:14.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:14.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:14.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:14.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:14.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:14.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:14.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:14.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:14.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:14.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:14.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:14.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:14.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:14.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.553 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:10:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:14.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:14.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:14.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:14.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:14.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:14.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:14.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:14.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:14.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:14.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:14.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:14.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:14.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:14.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.026 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:10:15.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:15.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:15.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:15.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:15.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:15.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:15.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:15.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:15.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:15.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:15.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:15.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:15.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:15.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.499 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:10:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:15.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:15.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:15.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:15.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:15.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:15.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:15.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:15.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:15.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:15.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:15.970 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:10:16.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:16.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:16.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:16.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:16.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:16.442 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:10:16.915 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:10:16.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:16.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:16.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:16.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:16.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:16.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:16.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:16.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:16.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:16.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:16.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:16.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:16.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:16.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:16.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:16.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:17.387 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:10:17.859 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:10:17.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:17.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:17.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:17.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:17.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:17.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:17.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:17.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:17.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:17.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:17.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:17.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:17.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:17.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:17.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:17.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:17.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:18.330 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:10:18.801 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:10:18.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:18.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:18.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:18.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:18.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:18.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:18.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:18.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:18.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:18.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:18.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:18.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:18.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:18.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:18.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:18.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:18.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:19.271 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:10:19.745 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:10:19.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:19.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:19.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:19.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:19.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:19.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:19.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:19.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:19.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:19.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:19.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:19.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:19.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:19.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:19.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:19.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:20.217 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:10:20.689 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:10:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:20.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:20.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:20.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:20.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:20.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:20.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:20.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:20.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:20.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:20.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:20.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:20.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:20.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:20.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:20.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:20.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:21.160 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:10:21.631 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:10:21.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:21.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:21.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:21.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:21.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:21.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:21.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:21.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:21.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:21.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:21.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:21.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:21.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:21.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:21.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:21.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:21.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:22.103 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:10:22.577 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:10:22.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:22.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:22.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:22.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:22.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:22.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:22.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:22.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:22.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:22.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:22.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:22.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:22.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:22.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:22.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:22.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:22.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:23.048 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:10:23.520 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:10:23.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:23.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:23.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:23.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:23.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:23.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:23.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:23.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:23.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:23.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:23.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:23.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:23.686 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:10:23.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:23.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:28.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:28.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:28.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:28.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:28.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:28.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:28.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:28.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:28.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:28.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:28.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:10:28.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:10:28.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:10:28.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:28.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:28.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:28.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:10:28.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:28.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:10:28.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:28.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:10:28.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:10:28.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:28.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:28.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:28.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:10:28.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:28.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:10:28.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:28.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:10:28.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:10:28.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:28.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:28.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:28.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:10:28.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:28.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:10:28.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:28.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:10:28.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:10:28.723 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:10:28.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:28.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:28.728 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:10:29.207 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:10:29.253 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:10:29.255 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:10:29.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:29.257 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:10:29.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:29.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:29.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:29.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:29.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:29.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:29.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:29.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:29.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:29.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:29.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:29.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:29.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:29.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:29.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:29.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:29.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:29.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:29.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:29.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:29.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:29.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:29.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.678 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:10:29.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:29.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:29.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:29.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:29.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:29.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:29.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:29.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:29.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:29.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:29.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:29.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:29.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:29.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:29.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:29.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:29.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:29.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:29.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:30.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:30.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:30.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:30.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:30.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:30.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:10:30.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:30.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:30.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:30.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:10:30.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:10:30.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:30.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:10:30.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:10:30.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:30.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:10:30.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:10:30.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:10:30.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:10:30.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:30.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:30.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:30.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:30.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:30.335 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:10:35.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:35.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:35.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:35.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:35.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:35.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:35.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:35.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:35.350 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:35.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:10:35.351 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:10:35.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:10:35.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:10:35.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:35.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:35.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:35.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:10:35.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:10:35.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:10:35.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:10:35.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:10:35.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:10:35.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:35.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:35.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:10:35.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:10:35.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:10:35.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:10:35.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:10:35.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:10:35.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:35.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:10:35.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:35.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:10:35.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:10:35.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:10:35.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:10:35.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:10:35.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:10:35.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:10:35.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:10:35.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:10:35.368 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:10:35.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:10:35.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:10:35.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:10:35.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:10:36.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:10:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:10:37.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:10:37.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:10:38.217 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:10:38.689 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:10:39.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:10:39.636 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:10:40.111 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:10:40.583 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:10:41.059 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:10:41.533 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:10:42.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:10:42.478 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:10:42.952 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:10:43.424 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:10:43.896 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:10:44.368 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:10:44.842 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:10:45.314 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:10:45.788 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:10:46.260 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:10:46.732 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:10:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:10:47.679 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:10:48.155 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:10:48.627 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:10:49.102 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:10:49.574 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:10:50.049 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:10:50.525 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:10:50.997 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:10:51.468 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:10:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:10:52.412 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:10:52.886 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:10:53.357 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:10:53.833 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:10:54.305 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:10:54.778 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:10:55.251 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:10:55.723 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:10:56.197 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:10:56.669 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:10:57.140 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:10:57.611 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:10:58.082 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:10:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:10:59.029 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:10:59.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:10:59.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:10:59.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:10:59.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:10:59.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:10:59.390 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:10:59.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:10:59.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:59.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:59.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:59.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:59.390 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:59.391 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:10:59.391 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5180 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:11:04.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:11:04.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:11:04.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:11:04.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:11:04.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:11:04.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:11:04.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:11:04.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:11:04.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:04.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:11:04.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:11:04.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:11:04.415 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:11:04.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:11:04.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:04.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:11:04.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:11:04.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:11:04.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:11:04.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:04.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:11:04.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:11:04.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:11:04.421 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:04.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:11:04.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:11:04.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:11:04.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:11:04.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:04.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:11:04.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:11:04.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:11:04.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:04.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:11:04.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:11:04.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:11:04.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:11:04.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:04.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:11:04.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:11:04.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:11:04.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:11:04.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:11:04.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:11:04.430 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:11:04.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:04.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:04.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:11:04.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:11:05.385 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:11:05.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:11:06.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:11:06.808 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:11:07.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:11:07.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:11:08.227 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:11:08.703 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:11:09.174 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:11:09.645 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:11:10.119 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:11:10.592 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:11:11.066 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:11:11.539 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:11:12.011 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:11:12.486 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:11:12.958 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:11:13.433 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:11:13.905 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:11:14.379 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:11:14.851 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:11:15.323 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:11:15.798 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:11:16.270 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:11:16.746 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:11:17.218 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:11:17.693 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:11:18.165 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:11:18.640 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:11:19.112 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:11:19.587 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:11:20.059 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:11:20.533 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:11:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:11:21.477 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:11:21.952 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:11:22.424 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:11:22.900 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:11:23.372 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:11:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:11:24.318 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:11:24.790 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:11:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:11:25.737 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:11:26.212 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:11:26.685 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:11:27.160 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:11:27.632 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:11:28.107 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:11:28.579 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:11:29.054 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:11:29.526 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:11:29.999 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:11:30.472 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:11:30.944 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:11:31.419 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:11:31.891 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:11:32.362 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:11:32.837 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:11:33.309 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:11:33.784 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:11:34.256 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:11:34.730 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:11:35.202 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:11:35.674 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:11:36.150 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:11:36.621 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:11:37.097 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:11:37.569 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:11:38.044 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:11:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:11:38.992 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:11:39.463 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:11:39.939 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:11:40.411 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:11:40.875 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:11:41.344 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:11:41.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:41.808 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:11:42.280 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:11:42.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:42.749 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:11:43.212 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:11:43.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:43.685 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:11:44.149 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:11:44.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:44.615 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:11:45.090 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:11:45.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:45.553 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:11:46.017 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:11:46.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:46.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:11:46.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:11:46.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:11:46.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:11:46.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:11:46.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:11:46.462 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:11:51.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:11:51.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:11:51.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:11:51.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:11:51.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:11:51.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:11:51.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:11:51.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:11:51.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:51.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:11:51.478 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:11:51.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:11:51.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:11:51.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:11:51.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:51.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:11:51.486 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:11:51.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:11:51.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:11:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:51.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:11:51.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:11:51.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:11:51.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:51.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:11:51.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:11:51.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:11:51.490 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:11:51.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:11:51.492 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:11:51.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:11:51.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.497 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:11:51.497 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:11:51.498 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:11:51.498 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:11:51.502 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:11:51.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:11:52.027 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:11:52.029 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:11:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:11:52.030 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:11:52.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:11:52.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:11:52.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:11:52.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:52.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:11:52.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:11:52.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:11:52.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:11:52.069 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:11:52.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:11:52.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:11:52.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:11:52.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:52.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:52.448 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:11:52.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:52.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:52.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:52.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:52.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:11:52.934 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:11:53.390 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:11:53.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:53.861 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:11:54.335 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:11:54.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:54.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:54.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:54.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:54.807 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:11:55.280 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:11:55.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:55.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:55.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:55.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:55.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:11:55.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:11:55.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:55.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:11:55.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:11:55.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:11:55.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:11:55.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:11:55.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:55.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:11:55.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:11:55.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:11:55.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:11:55.887 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:11:55.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:11:55.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:11:55.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:11:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:56.221 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:11:56.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:11:56.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:11:56.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:11:56.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:11:56.692 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:11:57.021 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:11:57.163 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:11:57.633 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:11:58.104 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:11:58.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:11:59.049 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:11:59.521 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:11:59.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:11:59.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:59.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:11:59.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:11:59.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:11:59.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:11:59.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:11:59.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:59.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:11:59.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:11:59.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:11:59.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:11:59.937 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:11:59.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:11:59.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:11:59.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:11:59.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:59.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:11:59.992 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:12:00.428 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:00.464 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:12:00.937 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:12:01.409 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:12:01.881 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:12:02.352 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:12:02.826 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:12:03.298 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:12:03.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:03.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:03.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:03.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:03.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:03.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:03.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:03.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:03.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:03.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:03.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:03.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:03.765 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:03.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:03.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:03.769 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:12:03.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:03.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:03.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:04.241 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:12:04.630 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:04.712 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:12:05.101 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:12:05.658 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:12:06.048 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:06.130 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:12:06.601 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:12:07.071 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:12:07.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:07.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:07.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:07.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:07.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:07.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:07.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:07.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:07.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:12:07.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:12:07.478 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:12:07.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:07.478 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:07.479 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:07.479 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:07.479 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:12.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:12:12.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:12:12.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:12.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:12.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:12.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:12.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:12.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:12:12.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:12.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:12:12.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:12:12.496 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:12:12.496 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:12:12.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:12:12.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:12.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:12.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:12:12.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:12:12.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:12:12.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:12.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:12:12.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:12:12.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:12:12.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:12.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:12.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:12:12.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:12:12.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:12:12.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:12.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:12:12.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:12:12.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:12:12.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:12.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:12.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:12:12.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:12:12.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:12:12.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:12.503 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:12:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:12:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:12:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:12:12.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:12:12.504 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:12:12.504 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:12:12.504 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:12.509 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:12:12.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:12:13.028 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:12:13.029 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:13.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:13.031 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:12:13.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:13.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:13.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:13.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:13.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:13.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:13.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:13.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:13.079 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:13.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:13.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:13.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:13.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:13.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:13.456 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:12:13.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:13.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:13.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:13.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:13.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:12:13.946 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:13.949 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:14.402 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:12:14.426 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:14.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:14.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:14.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:14.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:14.876 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:12:14.906 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:15.348 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:12:15.392 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:15.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:15.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:12:15.872 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:16.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:12:16.352 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:16.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:16.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:16.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:16.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:16.766 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:12:16.838 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:17.239 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:12:17.318 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:17.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:17.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:17.710 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:12:17.798 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:12:18.278 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:18.656 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:12:18.764 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:19.128 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:12:19.244 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:19.601 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:12:19.724 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:20.074 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:12:20.210 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:20.546 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:12:20.690 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:21.020 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:12:21.170 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:21.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:21.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:21.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:21.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:21.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:21.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:21.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:21.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:21.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:21.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:21.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:21.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:21.198 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:21.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:21.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:21.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:21.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:21.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:21.491 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:12:21.896 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:21.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:12:22.375 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:22.378 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:22.434 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:12:22.855 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:22.905 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:12:23.335 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:23.376 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:12:23.815 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:23.847 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:12:24.295 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:24.318 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:12:24.775 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:24.791 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:12:25.255 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:25.263 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:12:25.735 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:12:25.741 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:26.207 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:12:26.221 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:26.680 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:12:26.701 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:27.153 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:12:27.187 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:27.625 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:12:27.667 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:28.096 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:12:28.147 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:28.569 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:12:28.627 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:29.041 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:12:29.113 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:29.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:29.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:29.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:29.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:29.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:29.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:29.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:29.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:29.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:29.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:29.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:29.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:29.130 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:29.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:29.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:29.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:29.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:29.477 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:29.513 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:12:29.948 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:29.950 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:29.984 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:12:30.419 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:30.458 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:12:30.889 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:30.930 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:12:31.366 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:31.402 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:12:31.837 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:31.873 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:12:32.307 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:32.346 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:12:32.778 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:32.819 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:12:33.255 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:33.291 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:12:33.726 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:33.763 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:12:34.197 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:34.233 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:12:34.667 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:34.704 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:12:35.138 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:35.177 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:12:35.609 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:35.650 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:12:36.085 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:36.122 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:12:36.556 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:36.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:36.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:36.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:36.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:36.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:36.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:36.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:36.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:36.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:36.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:36.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:36.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:36.588 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:36.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:36.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:36.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:36.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:36.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:36.592 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:12:36.982 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:37.063 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:12:37.452 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:37.455 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:37.536 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:12:37.923 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:37.926 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:38.009 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:12:38.400 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:38.481 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:12:38.870 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:38.873 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:12:38.954 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:12:39.341 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:39.427 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:12:39.817 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:39.899 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:12:40.288 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:40.370 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:12:40.759 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:40.843 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:12:41.230 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:41.315 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:12:41.706 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:41.787 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:12:42.176 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:42.258 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:12:42.647 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:42.729 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:12:43.118 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:43.203 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:12:43.589 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:43.675 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:12:44.065 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:44.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:44.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:44.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:44.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:44.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:44.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:44.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:44.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:44.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:44.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:44.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:12:44.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:12:44.089 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:12:44.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:44.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:44.090 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:44.090 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:44.090 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:44.090 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:44.090 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:44.091 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:12:49.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:12:49.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:12:49.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:49.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:49.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:49.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:49.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:49.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:12:49.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:49.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:12:49.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:12:49.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:12:49.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:12:49.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:12:49.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:49.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:49.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:12:49.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:12:49.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:12:49.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:49.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:12:49.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:12:49.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:12:49.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:49.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:49.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:12:49.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:12:49.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:12:49.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:49.105 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:12:49.105 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:12:49.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:12:49.106 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:12:49.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:49.106 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:12:49.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:12:49.106 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:12:49.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:12:49.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:12:49.110 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:12:49.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:12:49.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:12:49.592 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:12:49.642 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:12:49.644 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:12:49.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:49.646 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:12:49.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:49.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:49.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:49.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:49.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:49.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:49.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:49.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:49.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:49.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:49.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:49.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:49.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:50.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:12:50.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:50.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:50.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:50.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:50.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:12:51.008 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:12:51.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:51.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:51.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:51.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:51.481 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:12:51.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:51.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:51.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:51.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:51.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:51.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:51.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:51.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:51.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:51.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:51.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:51.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:51.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:51.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:51.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:51.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:51.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:51.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:12:52.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:52.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:52.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:52.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:52.424 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:12:52.898 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:12:53.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:53.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:53.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:53.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:53.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:12:53.842 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:12:53.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:53.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:53.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:53.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:53.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:53.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:53.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:12:53.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:53.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:53.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:53.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:12:53.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:12:54.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:54.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:12:54.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:12:54.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:54.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:54.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:54.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:54.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:54.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:54.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:12:54.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:12:55.260 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:12:55.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:12:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:12:56.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:12:56.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:12:56.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:12:56.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:12:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:12:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:12:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:12:56.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:12:56.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:12:56.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:12:56.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:12:56.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:12:56.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:12:56.145 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:01.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:01.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:01.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:01.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:01.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:01.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:01.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:01.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:01.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:01.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:01.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:01.155 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:01.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:01.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:01.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:01.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:01.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:01.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:01.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:01.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:01.156 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:01.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:01.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:01.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:01.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:01.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:01.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:01.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:01.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:01.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:01.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:01.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:01.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:01.160 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:01.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:01.165 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:01.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:01.685 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:01.687 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:01.689 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:01.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:01.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:01.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:01.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:01.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:01.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:01.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:01.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:01.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:01.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:01.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:01.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:01.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:02.115 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:02.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:02.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:02.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:02.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:02.587 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:03.058 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:13:03.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:03.529 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:13:03.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:03.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:03.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:03.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:03.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:03.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:03.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:03.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:03.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:03.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:03.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:03.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:03.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:03.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:03.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:03.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:03.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:03.999 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:13:04.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:04.472 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:13:04.945 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:13:05.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:05.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:13:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:13:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:06.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:06.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:06.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:06.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:06.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:06.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:06.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:06.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:06.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:06.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:06.022 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:06.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:06.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:06.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:06.023 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:06.023 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:06.023 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:06.023 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:06.023 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:06.023 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:11.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:11.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:11.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:11.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:11.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:11.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:11.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:11.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:11.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:11.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:11.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:11.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:11.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:11.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:11.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:11.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:11.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:11.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:11.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:11.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:11.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:11.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:11.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:11.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:11.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:11.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:11.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:11.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:11.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:11.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:11.050 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:11.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:11.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:11.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:11.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:11.571 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:11.572 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:11.573 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:11.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:11.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:11.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:11.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:11.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:11.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:11.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:11.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:11.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:11.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:11.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:11.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:11.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:11.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:12.005 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:12.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:12.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:12.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:12.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:12.478 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:12.950 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:13:13.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:13.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:13.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:13.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:13.421 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:13:13.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:13.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:13.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:13.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:13.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:13.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:13.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:13.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:13.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:13.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:13.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:13.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:13.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:13.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:13.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:13.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:13.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:13.893 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:13:14.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:14.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:14.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:14.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:14.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:13:14.839 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:13:15.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:15.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:15.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:15.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:13:15.783 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:13:15.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:15.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:15.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:15.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:15.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:15.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:15.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:15.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:15.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:15.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:15.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:15.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:15.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:15.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:15.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:15.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:16.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:16.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:16.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:16.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:16.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:13:16.728 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:13:17.199 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:13:17.672 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:13:17.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:17.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:17.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:17.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:18.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:18.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:18.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:18.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:18.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:18.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:18.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:18.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:18.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:18.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:18.013 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:18.014 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1504 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:18.014 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1504 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:18.014 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1504 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:18.014 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1504 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:18.014 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1504 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:18.014 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1504 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:23.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:23.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:23.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:23.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:23.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:23.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:23.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:23.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:23.025 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:23.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:23.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:23.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:23.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:23.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:23.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:23.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:23.029 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:23.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:23.030 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:23.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:23.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:23.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:23.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:23.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:23.033 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:23.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:23.033 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:23.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:23.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:23.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:23.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:23.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:23.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:23.037 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:23.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:23.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:23.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:23.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:23.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:23.560 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:23.562 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:23.565 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:23.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:23.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:23.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:23.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:23.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:23.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:23.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:23.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:23.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:23.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:23.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:23.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:23.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:23.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:23.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:24.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:24.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:24.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:24.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:24.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:24.933 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:13:25.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:25.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:25.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:25.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:25.407 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:13:25.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:25.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:25.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:25.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:25.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:25.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:25.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:25.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:25.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:25.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:25.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:25.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:25.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:25.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:25.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:25.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:25.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:25.879 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:13:26.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:26.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:26.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:26.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:26.351 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:13:26.822 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:13:27.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:27.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:27.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:27.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:27.296 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:13:27.768 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:13:27.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:27.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:27.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:27.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:27.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:27.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:27.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:27.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:27.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:27.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:27.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:27.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:27.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:27.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:27.920 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:27.920 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1055 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:32.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:32.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:32.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:32.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:32.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:32.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:32.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:32.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:32.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:32.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:32.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:32.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:32.935 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:32.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:32.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:32.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:32.936 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:32.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:32.936 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:32.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:32.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:32.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:32.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:32.938 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:32.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:32.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:32.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:32.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:32.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:32.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:32.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:32.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:32.941 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:32.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:32.941 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:32.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:32.941 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:32.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:32.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:32.944 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:32.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:32.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:33.427 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:33.472 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:33.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:33.476 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:33.479 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:33.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:33.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:33.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:33.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:33.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:33.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:33.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:33.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:33.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:33.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:33.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:33.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:33.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:33.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:33.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:33.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:33.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:33.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:34.841 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:13:34.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:34.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:34.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:34.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:35.315 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:13:35.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:35.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:35.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:35.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:35.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:35.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:35.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:35.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:35.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:35.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:35.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:35.722 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:35.723 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:35.723 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:35.723 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:35.723 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:35.723 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:35.723 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:40.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:40.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:40.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:40.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:40.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:40.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:40.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:40.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:40.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:40.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:40.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:40.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:40.744 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:40.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:40.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:40.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:40.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:40.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:40.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:40.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:40.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:40.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:40.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:40.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:40.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:40.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:40.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:40.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:40.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:40.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:40.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:40.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:40.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:40.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:40.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:40.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:40.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:40.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:40.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:40.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:40.758 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:40.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:40.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:40.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:41.292 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:41.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:41.295 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:41.298 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:41.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:41.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:41.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:41.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:41.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:41.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:41.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:41.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:41.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:41.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:41.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:41.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:41.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:41.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:41.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:41.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:41.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:41.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:42.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:13:42.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:42.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:42.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:42.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:43.127 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:13:43.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:43.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:43.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:43.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:43.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:43.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:43.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:43.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:43.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:43.554 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:43.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:43.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:48.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:48.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:48.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:48.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:48.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:48.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:48.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:48.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:48.568 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:48.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:48.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:48.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:48.573 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:48.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:48.574 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:48.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:48.574 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:48.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:48.575 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:48.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:48.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:48.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:48.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:48.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:48.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:48.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:48.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:48.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:48.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:48.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:48.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:48.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:48.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:48.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:48.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:48.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:48.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:48.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:48.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:48.583 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:48.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:48.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:49.066 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:49.106 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:49.107 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:49.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:49.108 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:49.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:49.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:49.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:49.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:49.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:49.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:49.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:49.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:49.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:49.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:49.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:49.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:49.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:49.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:49.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:49.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:49.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:49.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:49.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:49.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:49.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:49.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:49.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:49.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:49.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:49.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:49.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:49.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:49.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:49.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:49.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:49.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:49.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:49.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:50.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:50.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:50.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:50.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:50.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:50.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:50.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:50.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:50.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:50.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:50.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:50.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:50.022 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:50.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:50.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:50.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:50.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:50.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:50.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:55.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:55.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:55.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:55.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:55.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:55.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:55.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:55.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:55.037 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:55.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:13:55.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:13:55.042 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:13:55.042 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:13:55.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:55.042 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:55.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:55.043 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:13:55.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:13:55.043 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:13:55.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:55.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:13:55.047 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:13:55.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:55.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:55.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:55.047 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:13:55.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:13:55.047 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:13:55.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:55.051 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:13:55.051 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:13:55.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:55.051 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:13:55.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:55.051 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:13:55.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:13:55.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:13:55.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:55.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:13:55.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:13:55.058 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:13:55.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:13:55.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:13:55.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:13:55.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:13:55.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:13:55.587 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:13:55.588 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:13:55.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:55.588 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:13:55.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:55.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:55.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:55.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:55.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:55.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:55.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:55.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:55.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:55.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:55.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:55.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:55.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:56.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:13:56.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:56.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:56.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:56.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:56.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:56.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:56.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:56.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:56.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:56.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:56.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:13:56.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:56.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:56.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:56.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:13:56.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:13:56.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:56.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:13:56.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:13:56.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:56.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:56.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:13:56.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:13:56.480 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:13:56.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:13:56.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:13:56.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:13:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:13:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:13:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:13:56.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:13:56.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:13:56.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:13:56.493 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:13:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:13:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:13:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:13:56.493 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:56.493 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:56.493 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:56.493 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:56.493 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:13:56.493 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:01.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:01.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:01.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:01.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:01.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:01.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:01.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:01.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:01.507 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:01.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:01.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:01.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:01.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:01.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:01.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:01.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:01.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:01.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:01.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:01.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:01.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:01.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:01.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:01.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:01.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:01.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:01.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:01.516 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:01.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:01.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:01.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:01.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:01.521 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:01.521 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:01.521 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:01.526 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:02.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:02.047 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:02.049 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:02.051 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:02.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:02.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:02.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:02.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:02.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:02.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:02.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:02.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:02.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:02.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:02.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:02.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.470 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:02.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:02.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:02.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:02.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:02.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:02.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:02.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:02.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:02.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:02.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:02.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:02.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:02.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:02.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:02.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:02.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:02.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:14:02.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:02.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:02.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:02.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:02.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:02.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:02.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:02.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:02.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:02.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:02.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:02.993 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:02.993 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:02.993 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:02.993 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:02.993 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:02.993 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:02.993 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:07.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:07.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:07.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:07.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:07.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:07.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:08.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:08.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:08.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:08.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:08.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:08.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:08.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:08.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:08.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:08.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:08.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:08.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:08.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:08.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:08.014 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:08.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:08.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:08.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:08.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:08.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:08.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:08.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:08.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:08.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:08.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:08.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:08.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:08.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:08.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:08.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:08.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:08.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:08.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:08.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:08.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:08.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:08.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:08.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:08.021 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:08.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:08.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:08.550 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:08.552 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:08.555 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:08.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:08.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:08.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:08.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:08.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:08.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:08.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:08.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:08.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:08.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:08.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:08.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:08.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:08.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:09.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:09.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:09.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:09.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:09.447 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:14:09.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:14:10.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:10.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:10.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:10.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:10.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:14:10.861 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:14:11.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:11.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:11.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:11.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:11.332 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:14:11.803 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:14:12.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:12.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:12.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:12.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:12.276 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:14:12.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:12.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:12.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:12.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:12.661 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:17.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:17.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:17.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:17.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:17.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:17.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:17.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:17.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:17.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:17.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:17.672 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:17.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:17.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:17.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:17.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:17.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:17.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:17.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:17.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:17.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:17.676 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:17.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:17.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:17.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:17.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:17.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:17.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:17.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:17.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:17.678 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:17.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:17.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:18.202 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:18.205 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:18.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:18.207 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:18.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:18.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:18.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:18.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:18.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:18.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:18.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:18.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:18.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:18.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:18.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:18.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:18.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:18.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:18.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:18.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:18.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:18.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:18.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:18.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:18.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:18.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:18.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:18.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:18.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:18.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:18.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:18.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:18.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:18.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:18.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:18.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:18.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:18.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:18.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:18.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:18.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:18.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:18.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:18.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:18.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:18.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:18.814 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:23.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:23.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:23.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:23.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:23.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:23.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:23.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:23.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:23.834 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:23.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:23.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:23.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:23.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:23.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:23.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:23.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:23.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:23.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:23.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:23.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:23.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:23.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:23.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:23.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:23.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:23.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:23.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:23.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:23.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:23.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:23.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:23.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:23.843 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:23.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:23.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:24.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:24.367 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:24.369 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:24.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:24.371 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:24.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:24.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:24.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:24.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:24.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:24.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:24.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:24.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:24.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:24.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:24.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:24.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:24.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:24.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:24.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:24.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:24.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:24.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:25.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:14:25.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:14:25.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:25.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:25.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:25.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:26.214 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:14:26.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:14:26.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:26.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:26.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:26.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:27.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:14:27.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:14:27.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:27.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:27.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:27.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:28.105 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:14:28.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:28.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:28.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:28.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:28.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:28.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:28.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:28.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:28.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:28.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:28.483 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:28.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:28.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:33.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:33.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:33.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:33.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:33.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:33.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:33.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:33.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:33.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:33.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:33.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:33.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:33.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:33.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:33.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:33.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:33.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:33.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:33.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:33.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:33.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:33.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:33.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:33.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:33.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:33.507 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:33.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:33.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:33.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:33.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:33.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:33.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:33.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:33.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:33.512 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:33.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:33.512 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:33.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:33.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:33.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:33.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:33.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:33.519 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:33.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:33.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:33.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:33.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:33.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:34.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:34.052 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:34.056 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:34.059 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:34.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:34.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:34.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:34.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:34.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:34.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:34.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:34.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:34.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:34.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:34.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:34.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:34.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:34.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:34.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:34.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:34.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:34.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:34.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:34.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:34.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:34.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:34.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:34.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:34.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:34.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:34.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:34.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:34.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:34.882 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:34.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:34.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:34.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:34.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:34.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:34.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:34.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:34.884 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:34.884 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:34.884 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:39.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:39.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:39.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:39.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:39.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:39.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:39.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:39.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:39.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:39.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:39.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:39.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:39.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:39.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:39.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:39.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:39.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:39.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:39.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:39.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:39.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:39.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:39.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:39.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:39.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:39.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:39.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:39.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:39.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:39.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:39.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:39.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:39.907 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:39.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:39.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:39.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:39.908 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:39.908 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:39.908 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:39.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:39.913 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:40.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:40.432 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:40.434 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:40.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:40.436 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:40.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:40.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:40.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:40.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:40.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:40.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:40.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:40.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:40.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:40.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:40.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:40.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:40.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:40.864 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:40.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:40.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:40.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:40.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:41.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:41.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:41.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:41.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:41.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:41.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:41.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:41.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:41.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:41.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:41.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:41.270 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:41.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:41.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:41.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:41.270 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:41.270 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:41.270 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:41.270 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:41.270 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:41.270 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:46.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:46.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:46.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:46.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:46.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:46.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:46.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:46.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:46.285 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:46.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:46.285 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:46.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:46.290 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:46.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:46.290 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:46.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:46.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:46.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:46.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:46.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:46.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:46.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:46.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:46.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:46.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:46.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:46.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:46.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:46.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:46.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:46.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:46.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:46.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:46.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:46.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:46.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:46.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:46.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:46.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:46.304 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:46.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:46.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:46.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:46.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:46.831 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:46.834 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:46.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:46.837 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:46.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:46.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:46.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:46.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:46.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:46.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:46.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:46.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:46.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:46.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:46.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:46.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:46.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:47.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:47.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:47.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:47.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:47.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:47.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:47.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:47.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:47.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:47.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:47.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:47.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:47.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:47.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:47.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:47.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:47.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:47.668 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:47.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:47.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:52.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:52.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:52.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:52.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:52.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:52.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:52.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:52.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:52.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:52.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:52.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:52.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:52.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:52.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:52.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:52.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:52.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:52.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:52.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:52.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:52.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:52.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:52.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:52.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:52.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:52.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:52.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:52.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:52.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:52.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:52.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:52.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:52.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:52.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:52.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.705 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:52.705 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:52.705 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:52.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:52.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:53.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:53.232 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:53.234 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:53.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:53.236 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:53.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:53.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:53.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:53.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:53.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:53.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:53.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:53.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:53.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:53.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:53.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:53.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:53.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:53.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:14:53.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:53.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:53.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:53.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:54.131 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:14:54.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:54.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:54.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:54.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:54.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:54.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:54.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:54.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:54.205 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:14:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:54.205 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:14:59.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:14:59.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:14:59.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:59.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:59.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:59.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:59.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:14:59.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:59.216 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:59.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:14:59.216 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:14:59.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:14:59.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:14:59.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:59.219 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:59.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:14:59.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:14:59.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:14:59.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:14:59.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:14:59.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:14:59.224 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:14:59.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:59.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:59.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:14:59.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:14:59.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:14:59.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:14:59.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:14:59.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:14:59.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:14:59.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:59.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:14:59.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:14:59.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:14:59.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:14:59.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:14:59.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:14:59.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:14:59.234 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:14:59.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:14:59.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:14:59.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:14:59.759 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:14:59.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:59.762 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:14:59.764 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:14:59.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:14:59.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:14:59.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:14:59.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:59.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:59.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:59.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:14:59.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:14:59.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:14:59.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:14:59.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:14:59.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:14:59.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:00.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:15:00.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:00.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:00.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:00.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:00.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:00.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:00.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:00.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:00.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:00.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:00.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:00.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:00.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:00.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:00.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:00.591 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:15:00.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:00.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:00.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:00.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:00.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:00.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:00.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:00.592 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:00.592 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:05.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:05.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:05.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:05.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:05.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:05.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:05.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:05.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:05.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:05.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:05.604 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:15:05.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:15:05.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:15:05.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:05.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:05.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:05.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:15:05.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:05.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:15:05.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:05.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:15:05.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:15:05.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:05.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:05.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:05.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:15:05.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:05.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:15:05.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:05.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:15:05.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:15:05.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:05.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:05.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:05.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:15:05.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:05.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:15:05.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:05.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:15:05.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:15:05.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:15:05.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:15:05.620 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:15:05.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:15:05.621 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:15:05.622 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:05.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:15:06.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:15:06.153 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:15:06.155 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:15:06.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:06.157 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:15:06.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:06.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:06.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:15:06.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:06.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:06.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:06.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:15:06.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:15:06.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:06.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:06.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:06.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:06.572 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:15:06.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:06.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:06.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:06.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:07.044 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:15:07.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:07.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:07.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:07.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:07.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:07.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:07.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:07.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:07.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:07.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:07.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:07.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:07.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:07.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:07.113 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:15:07.114 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:07.114 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:07.114 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:07.114 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:07.114 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:07.114 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:12.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:12.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:12.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:12.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:12.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:12.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:12.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:12.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:12.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:12.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:12.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:15:12.121 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:15:12.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:15:12.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:12.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:12.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:15:12.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:12.122 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:15:12.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:12.123 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:12.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:15:12.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:12.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:12.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:15:12.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:15:12.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:15:12.126 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:15:12.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:12.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:12.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:15:12.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:15:12.654 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:15:12.656 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:15:12.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:12.657 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:15:12.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:12.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:12.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:15:12.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:12.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:12.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:12.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:15:12.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:15:13.081 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:15:13.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:13.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:13.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:13.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:13.552 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:15:13.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:13.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:13.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:13.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:13.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:13.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:15:13.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:13.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:13.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:13.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:15:13.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:15:14.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:15:14.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:14.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:15:14.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:15:14.970 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:15:15.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:15:15.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:15.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:15.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:15.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:15.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:15.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:15.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:15.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:15.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:15.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:15.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:15.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:15.021 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:15:15.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:15.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:15.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:15.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:15.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:15.021 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:20.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:20.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:20.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:20.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:20.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:20.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:20.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:20.037 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:15:20.041 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:15:20.042 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:15:20.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:20.042 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:20.042 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:15:20.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:20.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:20.042 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:15:20.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:20.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:15:20.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:15:20.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:20.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:20.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:20.051 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:15:20.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:20.051 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:15:20.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:20.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:15:20.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:15:20.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:20.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:20.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:20.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:15:20.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:20.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:15:20.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:15:20.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:15:20.061 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:15:20.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:20.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:15:20.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:15:20.588 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:15:20.590 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:15:20.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:20.592 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:15:20.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:20.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:20.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:15:20.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:20.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:20.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:20.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:15:20.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:15:21.016 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:15:21.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:21.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:21.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:21.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:15:21.958 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:15:22.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:22.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:22.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:22.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:22.431 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:15:22.903 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:15:23.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:23.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:23.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:23.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:23.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:15:23.846 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:15:24.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:24.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:24.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:24.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:24.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:15:24.788 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:15:25.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:25.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:25.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:25.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:25.261 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:15:25.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:15:25.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:25.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:25.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:25.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:25.734 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:15:26.206 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:15:26.679 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:15:27.152 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:15:27.624 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:15:28.097 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:15:28.570 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:15:29.042 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:15:29.535 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:15:30.007 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:15:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:15:30.954 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:15:31.426 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:15:31.899 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:15:32.372 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:15:32.844 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:15:33.317 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:15:33.790 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:15:34.262 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:15:34.735 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:15:35.208 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:15:35.680 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:15:36.153 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:15:36.626 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:15:37.098 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:15:37.572 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:15:38.045 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:15:38.517 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:15:38.991 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:15:39.463 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:15:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:15:39.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:39.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:39.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:39.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:39.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:39.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:39.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:39.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:39.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:39.789 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:15:39.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:44.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:44.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:44.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:44.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:44.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:44.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:44.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:44.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:44.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:44.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:15:44.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:15:44.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:15:44.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:15:44.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:44.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:44.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:44.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:15:44.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:15:44.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:15:44.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:44.813 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:15:44.814 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:15:44.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:44.814 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:44.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:44.814 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:15:44.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:15:44.814 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:15:44.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:44.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:15:44.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:15:44.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:44.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:15:44.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:44.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:15:44.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:15:44.818 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:15:44.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:44.821 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:15:44.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:15:44.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:15:44.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:15:44.822 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:15:44.822 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:15:44.822 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:15:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:15:44.827 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:15:45.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:15:45.358 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:15:45.361 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:15:45.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:15:45.363 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:15:45.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:45.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:45.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:15:45.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:45.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:45.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:45.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:15:45.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:15:45.777 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:15:45.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:45.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:45.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:45.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:46.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:15:46.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:15:46.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:46.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:46.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:46.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:47.194 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:15:47.666 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:15:47.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:47.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:47.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:47.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:48.137 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:15:48.610 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:15:48.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:49.083 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:15:49.555 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:15:49.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:49.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:49.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:49.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:50.026 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:15:50.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:15:50.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:15:50.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:15:50.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:50.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:50.499 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:15:50.973 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:15:51.445 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:15:51.919 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:15:52.391 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:15:52.865 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:15:53.337 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:15:53.810 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:15:54.283 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:15:54.756 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:15:55.220 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:15:55.687 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:15:56.156 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:15:56.625 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:15:57.092 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:15:57.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:15:57.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:15:57.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:15:57.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:15:57.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:15:57.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:15:57.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:15:57.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:15:57.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:15:57.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:15:57.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:15:57.277 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:15:57.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:15:57.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:15:57.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:15:57.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2694 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:57.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2694 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:57.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2694 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:57.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2694 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:57.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2694 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:15:57.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2694 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:02.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:02.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:02.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:02.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:02.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:02.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:02.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:02.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:02.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:02.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:02.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:16:02.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:16:02.295 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:16:02.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:02.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:02.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:02.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:16:02.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:02.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:16:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:02.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:16:02.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:16:02.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:02.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:02.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:02.300 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:16:02.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:02.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:16:02.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:02.304 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:16:02.304 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:16:02.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:02.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:02.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:02.305 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:16:02.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:02.305 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:16:02.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:02.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:16:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:16:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:16:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:16:02.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:16:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:16:02.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:16:02.311 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:16:02.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:16:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:02.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:16:02.794 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:16:02.841 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:16:02.844 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:16:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:16:02.846 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:16:02.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:16:02.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:16:02.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:16:02.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:02.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:16:02.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:16:02.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:16:02.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:16:03.267 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:16:03.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:03.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:03.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:03.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:03.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:16:04.211 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:16:04.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:04.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:04.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:04.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:04.684 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:16:05.156 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:16:05.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:05.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:05.626 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:16:06.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:16:06.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:06.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:06.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:06.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:06.571 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:16:07.043 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:16:07.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:07.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:07.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:07.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:07.515 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:16:07.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:16:07.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:16:07.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:16:07.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:07.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:07.987 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:16:08.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:16:08.933 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:16:09.407 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:16:09.879 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:16:10.351 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:16:10.824 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:16:11.297 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:16:11.768 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:16:12.243 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:16:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:16:12.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:12.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:16:12.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:16:12.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:12.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:12.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:12.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:12.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:12.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:12.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:12.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:12.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:12.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:12.378 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:16:12.378 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:12.378 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:12.378 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:12.378 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:12.378 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:12.378 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:17.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:17.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:17.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:17.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:17.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:17.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:17.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:17.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:17.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:17.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:17.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:16:17.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:16:17.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:16:17.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:17.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:17.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:17.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:16:17.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:17.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:16:17.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:17.409 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:16:17.409 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:16:17.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:17.409 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:17.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:17.410 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:16:17.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:17.410 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:16:17.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:17.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:16:17.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:16:17.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:17.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:17.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:17.414 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:16:17.414 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:17.414 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:16:17.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:16:17.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:16:17.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:16:17.418 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:16:17.418 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:17.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:17.423 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:16:17.901 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:16:17.946 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:16:17.948 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:16:17.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:16:17.950 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:16:17.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:16:17.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:16:17.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:16:17.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:17.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:16:17.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:16:17.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:16:17.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:16:18.373 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:16:18.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:18.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:18.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:18.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:18.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:16:19.318 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:16:19.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:19.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:19.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:19.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:19.790 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:16:20.262 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:16:20.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:20.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:20.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:20.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:16:21.206 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:16:21.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:21.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:21.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:21.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:21.678 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:16:22.150 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:16:22.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:22.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:22.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:22.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:22.621 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:16:22.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:16:22.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:16:22.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:16:22.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:22.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:23.094 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:16:23.567 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:16:24.037 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:16:24.510 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:16:24.982 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:16:25.455 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:16:25.928 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:16:26.400 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:16:26.873 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:16:27.346 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:16:27.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:16:27.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:27.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:16:27.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:16:27.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:27.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:27.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:27.482 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:16:32.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:32.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:32.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:32.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:32.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:32.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:32.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:32.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:32.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:32.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:32.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:32.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:32.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:16:32.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:32.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:32.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:16:32.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:32.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:32.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:16:32.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:16:32.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:16:32.511 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:16:32.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:32.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:16:32.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:16:33.035 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:16:33.037 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:16:33.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:16:33.039 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:16:33.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:16:33.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:16:33.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:16:33.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:33.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:16:33.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:16:33.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:16:33.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:16:33.466 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:16:33.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:33.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:33.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:16:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:16:34.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:34.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:16:35.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:16:35.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:35.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:16:36.297 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:16:36.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:36.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:36.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:36.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:16:37.242 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:16:37.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:37.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:37.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:37.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:37.713 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:16:37.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:16:37.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:16:37.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:16:37.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:37.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:38.186 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:16:38.660 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:16:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:16:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:16:40.078 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:16:40.550 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:16:41.024 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:16:41.491 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:16:41.965 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:16:42.432 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:16:42.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:16:42.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:16:42.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:16:42.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:16:42.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:42.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:42.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:42.570 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:42.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:42.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:42.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:42.571 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:42.571 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:42.571 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:42.571 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:42.571 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:16:47.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:47.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:47.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:47.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:47.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:47.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:47.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:47.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:47.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:47.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:16:47.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:16:47.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:16:47.590 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:16:47.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:47.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:47.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:47.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:16:47.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:16:47.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:16:47.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:47.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:16:47.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:16:47.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:47.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:47.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:47.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:16:47.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:16:47.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:16:47.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:47.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:16:47.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:16:47.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:47.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:16:47.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:47.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:16:47.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:16:47.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:16:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:47.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:16:47.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:16:47.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:16:47.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:16:47.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:16:47.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:16:47.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:16:47.607 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:16:47.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:16:47.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:16:47.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:16:48.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:16:48.135 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:16:48.138 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:16:48.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:16:48.140 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:16:48.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:16:48.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:48.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:48.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:48.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:49.032 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:16:49.507 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:16:49.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:49.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:49.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:49.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:49.980 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:16:50.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:16:50.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:50.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:50.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:50.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:50.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:16:51.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:16:51.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:51.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:51.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:51.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:51.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:16:52.344 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:16:52.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:52.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:52.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:52.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:52.815 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:16:53.290 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:16:53.756 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:16:54.220 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:16:54.683 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:16:55.147 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:16:55.610 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:16:56.073 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:16:56.538 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:16:57.002 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:16:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:16:57.928 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:16:58.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:16:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:16:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:16:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:16:58.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:16:58.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:16:58.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:16:58.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:16:58.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:16:58.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:16:58.152 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:03.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:03.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:03.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:03.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:03.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:03.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:03.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:03.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:03.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:03.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:03.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:03.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:03.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:03.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:03.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:03.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:03.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:03.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:03.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:03.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:03.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:03.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:03.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:03.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:03.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:03.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:03.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:03.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:03.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:03.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:03.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:03.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:03.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:03.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:03.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:03.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:03.187 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:03.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:03.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:03.192 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:03.192 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:03.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:03.194 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:03.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:08.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:08.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:08.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:08.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:08.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:08.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:08.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:08.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:08.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:08.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:08.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:08.214 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:08.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:08.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:08.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:08.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:08.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:08.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:08.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:08.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:08.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:08.219 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:08.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:08.219 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:08.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:08.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:08.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:08.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:08.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:08.222 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:08.222 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:08.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:08.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:08.223 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:08.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:08.223 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:08.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.227 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:08.227 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:08.227 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:08.228 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:08.232 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:17:08.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:17:08.762 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:17:08.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:17:08.763 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:17:08.764 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:17:08.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:17:08.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:17:08.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:17:08.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:17:08.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:17:08.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:17:08.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:17:08.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:17:09.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:17:09.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:09.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:09.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:09.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:09.654 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:17:10.127 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:17:10.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:10.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:10.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:10.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:10.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:17:11.071 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:17:11.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:11.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:11.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:11.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:11.542 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:17:12.016 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:17:12.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:12.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:17:12.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:17:13.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:13.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:13.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:13.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:13.431 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:17:13.904 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:17:14.377 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:17:14.849 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:17:15.322 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:17:15.795 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:17:16.267 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:17:16.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:17:16.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:17:16.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:17:16.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:16.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:16.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:16.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:16.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:16.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:16.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:16.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:16.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:16.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:16.829 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:16.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.830 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.830 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.830 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.830 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:16.830 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:17:21.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:21.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:21.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:21.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:21.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:21.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:21.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:21.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:21.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:21.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:21.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:21.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:21.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:21.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:21.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:21.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:21.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:21.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:21.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:21.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:21.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:21.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:21.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:21.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:21.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:21.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:21.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:21.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:21.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:21.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:21.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:21.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:21.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:21.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:21.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:21.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:21.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:21.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:21.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:21.856 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:21.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:21.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:21.858 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:21.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:26.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:26.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:26.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:26.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:26.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:26.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:26.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:26.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:26.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:26.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:26.894 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:26.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:26.902 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:26.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:26.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:26.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:26.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:26.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:26.904 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:26.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:26.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:26.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:26.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:26.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:26.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:26.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:26.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:26.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:26.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:26.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:26.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:26.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:26.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:26.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:26.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:26.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:26.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:26.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:26.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:26.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:26.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:26.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:26.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:26.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:26.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:26.923 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:26.924 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:26.928 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:17:27.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:17:27.460 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:17:27.462 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:17:27.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:17:27.465 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:17:27.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:17:27.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:17:27.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:17:27.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:17:27.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:17:27.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:17:27.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:17:27.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:17:27.879 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:17:27.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:27.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:27.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:27.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:28.350 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:17:28.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:17:28.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:28.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:28.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:28.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:29.296 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:17:29.768 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:17:29.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:29.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:29.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:29.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:17:30.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:17:30.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:30.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:30.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:30.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:31.183 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:17:31.655 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:17:31.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:31.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:31.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:31.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:32.128 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:17:32.601 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:17:33.073 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:17:33.546 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:17:34.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:17:34.490 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:17:34.962 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:17:35.435 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:17:35.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:17:35.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:17:35.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:35.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:35.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:35.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:35.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:35.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:35.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:35.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:35.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:35.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:35.506 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:40.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:40.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:40.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:40.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:40.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:40.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:40.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:40.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:40.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:40.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:40.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:40.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:40.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:40.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:40.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:40.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:40.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:40.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:40.534 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:40.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:40.537 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:40.537 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:40.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:40.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:40.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:40.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:40.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:40.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:40.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:40.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:40.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:40.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:40.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:40.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:40.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:40.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:40.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:40.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:40.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:40.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:40.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:40.547 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:40.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:40.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:40.549 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:40.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:45.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:45.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:45.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:45.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:45.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:45.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:45.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:45.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:45.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:45.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:45.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:45.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:45.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:45.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:45.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:45.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:45.574 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:45.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:45.575 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:45.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:45.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:45.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:45.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:45.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:45.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:45.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:45.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:45.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:45.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:45.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:45.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:45.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:45.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:45.584 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:45.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:45.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:17:46.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:17:46.111 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:17:46.114 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:17:46.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:17:46.116 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:17:46.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:17:46.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:17:46.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:17:46.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:17:46.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:17:46.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:17:46.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:17:46.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:17:46.537 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:17:46.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:46.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:46.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:46.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:47.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:17:47.481 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:17:47.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:47.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:47.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:47.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:47.953 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:17:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:17:48.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:48.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:48.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:48.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:48.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:17:49.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:17:49.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:49.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:49.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:49.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:49.844 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:17:50.317 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:17:50.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:50.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:50.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:50.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:50.790 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:17:51.262 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:17:51.733 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:17:52.206 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:17:52.678 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:17:53.150 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:17:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:17:54.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:17:54.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:17:54.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:17:54.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:54.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:54.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:54.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:54.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:54.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:54.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:54.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:54.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:54.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:54.165 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:17:59.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:59.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:59.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:59.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:59.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:59.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:59.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:17:59.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:59.186 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:17:59.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:17:59.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:17:59.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:17:59.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:17:59.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:59.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:59.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:59.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:17:59.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:17:59.188 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:17:59.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:59.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:17:59.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:17:59.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:17:59.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:17:59.191 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:17:59.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:17:59.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:17:59.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:17:59.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:17:59.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:17:59.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:17:59.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:17:59.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:17:59.193 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:18:04.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:04.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:04.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:04.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:04.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:04.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:04.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:04.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:04.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:04.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:04.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:18:04.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:18:04.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:18:04.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:04.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:04.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:04.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:18:04.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:04.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:18:04.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:04.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:18:04.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:18:04.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:04.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:04.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:04.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:18:04.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:04.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:18:04.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:04.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:18:04.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:18:04.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:04.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:04.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:04.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:18:04.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:04.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:18:04.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:18:04.218 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:18:04.218 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:18:04.218 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:04.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:04.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:04.223 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:18:04.701 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:18:04.741 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:18:04.743 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:18:04.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:18:04.746 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:18:04.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:18:04.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:18:04.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:18:04.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:18:04.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:18:04.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:18:04.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:18:04.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:18:05.173 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:18:05.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:05.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:05.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:05.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:05.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:18:06.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:18:06.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:06.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:06.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:06.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:06.590 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:18:07.062 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:18:07.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:07.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:07.535 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:18:08.003 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:18:08.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:08.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:08.474 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:18:08.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:18:09.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:09.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:09.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:09.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:09.420 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:18:09.892 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:18:10.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:18:10.837 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:18:11.309 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:18:11.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:18:12.252 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:18:12.725 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:18:12.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:18:12.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:12.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:12.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:12.798 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:18:12.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:12.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:17.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:17.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:17.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:17.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:17.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:17.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:17.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:17.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:17.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:17.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:17.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:18:17.818 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:18:17.818 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:18:17.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:17.819 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:17.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:17.819 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:18:17.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:17.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:18:17.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:17.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:18:17.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:18:17.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:17.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:17.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:17.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:18:17.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:17.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:18:17.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:17.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:18:17.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:18:17.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:17.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:17.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:17.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:18:17.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:17.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:18:17.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:18:17.829 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:18:17.829 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:18:17.829 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:17.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:17.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:17.830 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:18:17.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:22.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:22.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:22.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:22.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:22.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:22.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:22.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:22.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:22.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:22.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:22.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:18:22.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:18:22.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:18:22.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:22.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:22.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:22.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:18:22.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:22.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:22.844 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:22.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:18:22.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:22.845 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:18:22.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:18:22.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:22.846 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:22.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:22.846 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:18:22.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:22.846 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:18:22.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:18:22.848 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:18:22.848 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:18:22.848 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:22.853 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:18:23.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:18:23.372 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:18:23.374 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:18:23.376 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:18:23.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:18:23.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:18:23.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:18:23.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:18:23.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:18:23.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:18:23.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:18:23.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:18:23.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:18:23.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:18:23.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:23.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:23.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:23.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:24.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:18:24.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:18:24.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:24.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:24.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:24.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:25.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:18:25.692 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:18:25.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:25.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:25.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:25.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:26.163 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:18:26.636 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:18:26.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:26.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:26.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:26.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:27.109 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:18:27.581 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:18:27.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:27.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:27.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:27.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:28.052 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:18:28.525 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:18:28.998 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:18:29.469 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:18:29.940 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:18:30.411 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:18:30.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:18:31.357 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:18:31.830 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:18:32.303 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:18:32.775 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:18:33.247 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:18:33.718 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:18:34.192 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:18:34.664 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:18:35.136 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:18:35.607 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:18:36.080 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:18:36.553 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:18:37.025 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:18:37.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:18:37.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:18:37.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:37.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:37.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:37.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:37.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:37.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:37.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:37.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:37.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:37.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:37.425 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:18:42.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:42.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:42.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:42.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:42.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:42.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:42.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:42.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:42.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:42.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:42.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:18:42.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:18:42.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:18:42.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:42.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:42.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:42.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:18:42.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:42.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:18:42.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:42.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:18:42.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:18:42.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:42.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:42.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:42.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:18:42.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:42.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:18:42.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:42.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:18:42.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:18:42.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:42.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:42.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:42.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:18:42.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:42.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:18:42.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:18:42.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:18:42.453 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:18:42.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:42.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:42.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:42.455 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:18:47.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:47.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:47.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:47.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:47.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:47.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:47.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:18:47.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:18:47.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:18:47.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:18:47.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:47.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:47.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:47.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:18:47.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:18:47.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:18:47.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:47.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:18:47.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:18:47.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:47.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:47.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:47.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:18:47.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:18:47.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:18:47.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:47.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:18:47.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:18:47.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:18:47.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:18:47.483 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:18:47.483 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:18:47.483 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:18:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:18:47.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:18:47.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:18:47.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:18:47.965 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:18:48.007 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:18:48.009 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:18:48.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:18:48.011 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:18:48.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:18:48.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:18:48.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:18:48.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:18:48.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:18:48.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:18:48.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:18:48.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:18:48.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:18:48.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:48.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:48.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:48.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:48.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:18:49.382 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:18:49.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:49.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:49.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:49.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:49.854 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:18:50.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:18:50.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:50.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:50.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:50.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:50.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:18:51.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:18:51.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:51.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:51.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:51.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:51.743 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:18:52.215 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:18:52.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:52.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:52.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:52.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:52.686 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:18:53.160 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:18:53.632 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:18:54.104 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:18:54.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:18:55.049 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:18:55.521 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:18:55.993 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:18:56.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:18:56.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:18:56.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:18:56.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:18:56.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:18:56.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:18:56.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:18:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:18:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:18:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:18:56.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:18:56.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:18:56.067 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:18:56.067 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:18:56.067 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:18:56.067 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:18:56.067 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:18:56.067 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:18:56.067 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:01.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:01.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:01.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:01.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:01.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:01.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:01.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:01.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:01.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:01.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:01.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:19:01.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:19:01.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:19:01.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:01.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:01.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:01.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:19:01.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:01.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:19:01.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:01.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:19:01.084 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:19:01.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:01.084 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:01.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:01.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:19:01.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:01.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:19:01.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:01.086 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:19:01.086 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:19:01.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:01.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:01.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:01.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:19:01.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:01.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:19:01.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:19:01.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:19:01.089 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:19:01.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:01.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:01.090 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:19:01.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:06.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:06.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:06.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:06.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:06.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:06.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:06.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:06.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:06.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:06.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:06.108 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:19:06.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:19:06.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:19:06.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:06.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:06.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:06.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:19:06.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:06.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:19:06.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:06.118 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:19:06.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:19:06.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:06.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:06.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:06.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:19:06.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:06.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:19:06.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:06.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:19:06.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:19:06.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:06.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:06.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:06.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:19:06.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:06.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:19:06.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:06.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:19:06.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:19:06.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:19:06.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:19:06.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:19:06.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:19:06.125 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:19:06.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:06.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:06.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:19:06.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:19:06.649 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:19:06.652 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:19:06.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:19:06.654 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:19:06.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:19:06.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:19:06.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:19:06.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:19:06.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:19:06.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:19:06.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:19:06.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:19:07.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:19:07.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:07.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:07.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:07.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:07.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:19:08.022 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:19:08.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:08.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:08.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:08.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:08.496 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:19:08.968 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:19:09.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:09.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:09.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:09.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:09.440 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:19:09.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:19:10.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:10.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:10.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:10.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:19:10.857 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:19:11.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:11.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:11.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:11.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:11.329 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:19:11.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:19:12.273 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:19:12.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:19:13.218 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:19:13.691 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:19:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:19:14.636 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:19:15.109 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:19:15.581 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:19:16.053 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:19:16.524 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:19:16.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:19:16.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:19:16.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:16.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:16.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:16.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:16.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:16.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:16.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:16.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:16.715 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:19:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:16.716 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2287 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:16.716 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:16.716 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:16.716 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:16.716 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:16.716 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:21.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:21.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:21.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:21.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:21.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:21.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:21.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:21.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:21.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:21.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:21.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:19:21.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:19:21.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:19:21.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:21.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:21.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:21.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:19:21.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:21.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:19:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:21.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:19:21.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:19:21.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:21.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:21.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:21.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:19:21.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:21.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:19:21.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:21.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:19:21.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:19:21.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:21.735 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:21.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:19:21.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:21.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:21.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:19:21.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:21.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:19:21.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:19:21.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:19:21.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:19:21.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:19:21.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:19:21.742 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:19:21.743 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:19:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:19:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:21.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:21.745 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:19:21.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:26.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:26.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:26.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:26.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:26.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:26.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:26.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:26.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:26.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:26.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:26.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:19:26.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:19:26.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:19:26.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:26.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:26.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:26.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:19:26.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:26.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:19:26.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:26.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:26.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:19:26.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:26.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:26.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:19:26.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:19:26.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:19:26.772 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:19:26.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:26.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:26.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:19:27.252 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:19:27.297 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:19:27.299 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:19:27.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:19:27.300 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:19:27.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:19:27.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:19:27.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:19:27.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:19:27.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:19:27.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:19:27.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:19:27.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:19:27.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:19:27.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:27.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:27.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:27.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:19:28.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:19:28.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:28.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:28.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:28.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:29.138 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:19:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:19:29.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:29.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:29.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:29.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:19:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:19:30.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:30.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:30.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:30.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:31.026 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:19:31.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:19:31.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:31.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:31.972 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:19:32.444 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:19:32.917 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:19:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:19:33.862 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:19:34.333 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:19:34.806 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:19:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:19:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:19:36.223 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:19:36.696 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:19:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:19:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:19:38.113 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:19:38.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:19:38.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:19:38.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:38.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:38.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:38.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:38.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:38.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:38.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:38.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:38.356 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:19:38.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:38.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.357 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.358 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.358 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:38.358 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:19:43.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:43.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:43.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:43.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:43.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:43.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:43.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:43.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:43.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:43.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:43.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:19:43.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:19:43.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:19:43.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:43.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:43.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:43.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:19:43.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:43.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:19:43.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:43.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:19:43.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:19:43.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:43.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:43.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:43.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:19:43.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:43.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:19:43.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:43.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:19:43.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:19:43.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:43.383 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:43.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:43.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:19:43.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:43.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:19:43.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:43.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:19:43.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:19:43.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:19:43.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:19:43.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:19:43.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:19:43.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:19:43.387 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:19:43.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:43.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:43.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:43.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:43.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:43.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:43.389 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:19:43.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:48.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:19:48.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:19:48.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:48.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:48.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:48.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:48.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:19:48.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:48.404 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:48.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:19:48.405 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:19:48.407 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:19:48.407 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:19:48.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:48.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:48.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:19:48.408 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:19:48.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:19:48.409 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:19:48.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:48.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:19:48.410 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:19:48.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:48.412 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:19:48.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:19:48.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:19:48.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:19:48.415 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:19:48.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:19:48.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:19:48.898 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:19:48.944 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:19:48.946 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:19:48.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:19:48.948 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:19:48.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:19:48.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:19:48.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:19:48.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:19:48.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:19:48.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:19:48.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:19:48.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:19:49.370 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:19:49.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:49.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:49.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:49.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:49.841 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:19:50.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:19:50.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:50.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:50.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:50.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:50.787 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:19:51.259 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:19:51.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:51.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:51.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:51.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:51.730 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:19:52.203 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:19:52.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:52.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:52.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:52.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:52.676 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:19:53.148 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:19:53.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:19:53.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:19:53.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:19:53.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:19:53.619 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:19:54.092 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:19:54.565 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:19:55.037 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:19:55.508 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:19:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:19:56.453 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:19:56.925 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:19:57.399 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:19:57.871 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:19:58.344 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:19:58.817 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:19:59.289 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:19:59.762 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:20:00.232 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:20:00.703 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:20:01.177 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:20:01.649 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:20:02.121 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:20:02.592 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:20:03.065 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:20:03.538 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:20:04.010 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:20:04.483 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:20:04.956 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:20:05.428 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:20:05.899 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:20:06.370 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:20:06.843 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:20:07.316 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:20:07.788 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:20:08.261 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:20:08.733 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:20:08.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:20:08.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:20:09.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:09.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:09.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:09.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:09.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:09.007 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:20:09.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:09.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:09.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:09.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:09.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:09.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:09.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:09.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:09.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:14.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:14.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:14.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:14.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:14.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:14.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:14.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:14.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:14.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:14.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:14.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:20:14.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:20:14.025 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:20:14.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:14.025 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:14.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:14.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:20:14.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:14.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:20:14.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:14.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:20:14.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:20:14.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:14.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:14.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:14.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:20:14.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:14.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:20:14.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:14.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:14.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:20:14.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:14.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:20:14.034 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:20:14.034 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:20:14.034 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:14.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:14.035 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:14.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:19.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:19.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:19.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:19.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:19.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:19.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:19.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:20:19.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:20:19.060 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:20:19.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:19.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:19.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:19.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:20:19.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:19.061 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:20:19.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:19.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:20:19.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:20:19.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:19.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:19.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:19.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:20:19.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:19.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:20:19.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:19.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:19.068 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:20:19.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:20:19.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:20:19.073 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:20:19.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:19.077 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:20:19.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:20:19.602 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:20:19.604 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:20:19.606 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:20:19.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:20:20.021 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:20:20.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:20.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:20.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:20.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:20.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:20:20.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:20:21.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:21.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:21.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:21.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:21.431 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:20:21.895 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:20:22.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:22.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:22.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:22.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:22.364 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:20:22.839 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:20:23.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:23.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:23.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:23.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:23.311 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:20:23.786 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:20:24.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:24.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:24.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:24.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:24.261 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:20:24.729 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:20:25.194 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:20:25.666 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:20:26.130 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:20:26.593 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:20:27.065 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:20:27.529 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:20:27.998 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:20:28.469 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:20:28.944 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:20:29.416 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:20:29.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:29.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:29.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:29.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:29.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:29.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:29.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:29.618 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:20:29.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:29.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:29.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:29.618 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:20:34.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:34.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:34.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:34.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:34.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:34.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:34.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:34.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:34.632 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:34.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:34.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:20:34.636 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:20:34.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:20:34.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:34.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:34.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:34.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:20:34.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:34.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:20:34.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:34.639 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:20:34.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:20:34.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:34.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:34.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:34.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:20:34.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:34.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:20:34.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:34.642 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:34.642 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:20:34.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:20:34.645 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:20:34.645 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:20:34.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:34.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:34.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:34.647 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:20:34.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:39.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:39.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:39.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:39.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:39.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:39.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:39.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:39.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:39.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:39.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:39.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:20:39.670 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:20:39.671 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:20:39.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:39.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:39.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:39.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:20:39.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:39.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:20:39.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:39.676 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:20:39.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:20:39.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:39.676 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:39.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:39.676 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:20:39.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:39.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:20:39.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:39.680 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:20:39.680 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:20:39.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:39.680 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:39.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:39.681 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:20:39.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:39.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:20:39.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.685 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:20:39.685 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:20:39.685 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:20:39.686 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:39.690 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:20:40.167 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:20:40.212 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:20:40.215 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:20:40.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:20:40.218 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:20:40.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:20:40.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:40.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:40.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:40.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:41.115 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:20:41.587 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:20:41.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:41.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:41.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:41.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:42.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:20:42.534 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:20:42.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:42.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:42.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:42.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:43.007 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:20:43.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:20:43.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:43.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:43.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:43.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:43.956 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:20:44.428 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:20:44.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:44.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:44.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:44.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:44.903 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:20:45.375 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:20:45.848 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:20:46.321 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:20:46.793 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:20:47.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:20:47.739 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:20:48.211 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:20:48.686 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:20:49.158 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:20:49.633 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:20:50.105 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:20:50.581 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:20:51.052 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:20:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:20:51.980 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:20:52.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:52.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:52.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:52.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:52.235 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:20:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:57.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:57.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:57.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:57.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:57.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:57.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:57.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:57.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:57.249 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:57.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:20:57.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:20:57.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:20:57.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:20:57.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:57.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:57.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:57.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:20:57.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:20:57.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:20:57.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:20:57.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:20:57.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:20:57.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:57.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:57.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:57.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:20:57.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:20:57.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:20:57.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:20:57.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:20:57.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:20:57.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:57.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:20:57.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:57.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:20:57.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:20:57.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:20:57.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:20:57.267 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:20:57.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:20:57.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:20:57.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:20:57.267 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:20:57.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:20:57.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:20:57.268 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:20:57.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:20:57.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:20:57.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:20:57.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:20:57.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:20:57.271 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:02.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:02.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:02.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:02.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:02.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:02.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:02.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:02.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:02.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:02.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:02.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:02.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:02.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:02.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:02.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:02.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:02.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:02.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:02.296 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:02.297 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:02.297 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:02.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:02.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:02.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:02.298 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:02.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:02.298 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:02.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:02.300 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:02.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:02.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:02.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:02.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:02.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:02.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:02.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:02.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:02.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:02.304 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:02.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:02.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:02.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:21:02.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:21:02.832 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:21:02.834 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:21:02.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:21:02.836 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:21:02.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:02.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:02.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:21:02.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:02.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:02.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:02.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:21:02.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:21:02.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:02.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:02.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:02.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:03.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:21:03.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:03.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:03.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:03.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:03.731 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:21:04.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:21:04.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:04.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:04.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:04.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:04.673 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:21:05.144 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:21:05.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:05.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:05.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:05.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:05.617 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:21:06.090 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:21:06.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:06.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:06.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:06.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:06.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:21:07.032 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:21:07.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:07.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:07.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:07.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:07.503 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:21:07.977 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:21:08.449 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:21:08.921 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:21:09.392 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:21:09.865 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:21:10.337 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:21:10.809 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:21:10.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:10.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:10.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:10.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:10.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:10.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:10.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:10.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:10.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:10.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:10.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:10.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:10.892 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:10.892 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:21:10.892 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:21:10.892 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:21:10.892 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:21:10.892 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:21:10.892 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:21:15.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:15.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:15.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:15.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:15.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:15.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:15.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:15.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:15.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:15.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:15.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:15.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:15.912 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:15.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:15.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:15.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:15.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:15.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:15.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:15.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:15.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:15.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:15.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:15.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:15.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:15.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:15.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:15.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:15.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:15.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:15.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:15.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:15.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:15.918 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:15.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:15.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:15.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:15.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:15.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:15.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:15.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:15.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:15.920 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:20.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:20.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:20.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:20.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:20.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:20.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:20.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:20.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:20.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:20.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:20.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:20.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:20.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:20.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:20.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:20.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:20.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:20.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:20.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:20.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:20.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:20.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:20.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:20.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:20.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:20.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:20.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:20.946 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:20.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:20.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:21:21.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:21:21.471 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:21:21.473 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:21:21.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:21:21.475 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:21:21.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:21.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:21.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:21:21.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:21.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:21.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:21.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:21:21.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:21:21.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:21.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:21.901 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:21:21.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:21.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:21.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:21.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:22.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:21:22.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:21:22.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:22.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:22.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:22.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:21:23.789 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:21:23.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:23.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:23.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:23.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:24.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:21:24.732 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:21:24.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:24.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:24.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:24.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:25.205 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:21:25.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:21:25.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:25.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:25.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:25.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:26.150 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:21:26.620 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:21:27.091 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:21:27.565 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:21:28.037 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:21:28.509 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:21:28.980 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:21:29.453 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:21:29.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:29.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:29.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:29.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:29.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:29.527 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:34.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:34.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:34.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:34.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:34.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:34.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:34.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:34.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:34.544 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:34.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:34.545 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:34.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:34.550 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:34.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:34.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:34.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:34.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:34.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:34.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:34.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:34.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:34.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:34.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:34.556 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:34.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:34.556 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:34.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:34.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:34.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:34.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:34.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:34.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:34.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:34.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:34.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:34.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:34.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:34.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:34.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:34.566 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:34.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:34.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:34.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:34.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:34.568 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:34.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:39.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:39.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:39.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:39.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:39.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:39.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:39.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:39.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:39.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:39.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:39.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:39.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:39.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:39.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:39.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:39.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:39.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:39.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:39.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:39.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:39.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:39.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:39.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:39.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:39.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:39.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:39.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:39.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:39.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:39.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:39.599 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:39.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:39.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:39.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:39.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:39.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:39.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:39.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:39.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:39.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:39.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:39.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:39.603 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:39.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:39.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:39.604 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:39.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:39.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:39.609 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:21:40.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:21:40.136 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:21:40.138 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:21:40.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:21:40.141 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:21:40.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:40.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:40.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:21:40.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:40.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:40.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:40.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:21:40.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:21:40.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:40.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:40.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:40.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:40.560 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:21:40.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:41.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:21:41.505 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:21:41.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:41.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:41.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:41.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:41.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:21:42.449 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:21:42.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:42.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:42.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:42.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:42.923 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:21:43.395 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:21:43.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:43.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:43.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:43.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:43.867 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:21:44.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:21:44.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:44.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:44.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:44.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:44.809 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:21:45.282 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:21:45.755 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:21:46.227 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:21:46.698 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:21:47.170 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:21:47.644 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:21:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:21:48.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:48.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:48.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:48.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:48.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:48.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:48.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:48.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:48.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:48.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:48.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:48.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:48.187 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:53.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:53.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:53.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:53.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:53.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:53.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:53.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:53.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:53.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:53.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:53.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:53.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:53.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:53.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:53.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:53.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:53.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:53.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:53.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:53.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:53.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:53.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:53.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:53.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:53.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:53.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:53.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:53.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:53.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:53.221 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:53.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:53.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:53.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:53.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:53.222 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:53.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:53.222 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:53.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:53.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:53.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:53.231 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:53.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:53.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:53.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:53.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:53.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:53.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:53.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:53.234 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:21:58.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:21:58.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:21:58.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:58.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:58.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:58.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:58.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:21:58.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:58.252 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:58.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:21:58.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:21:58.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:21:58.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:21:58.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:58.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:58.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:21:58.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:21:58.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:21:58.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:21:58.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:58.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:21:58.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:21:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:58.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:58.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:21:58.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:21:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:21:58.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:21:58.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:58.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:21:58.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:21:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:58.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:21:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:21:58.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:21:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:21:58.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:21:58.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:58.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:21:58.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:21:58.266 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:21:58.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:21:58.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:21:58.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:21:58.788 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:21:58.790 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:21:58.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:21:58.792 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:21:58.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:21:58.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:21:58.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:21:58.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:58.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:58.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:58.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:21:58.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:21:58.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:21:58.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:21:58.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:58.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:21:59.221 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:21:59.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:21:59.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:21:59.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:21:59.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:21:59.692 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:22:00.166 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:22:00.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:00.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:00.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:00.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:00.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:22:01.110 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:22:01.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:01.581 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:22:02.050 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:22:02.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:02.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:02.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:02.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:02.522 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:22:02.996 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:22:03.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:03.468 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:22:03.940 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:22:04.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:22:04.881 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:22:05.352 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:22:05.825 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:22:06.298 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:22:06.770 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:22:06.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:22:06.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:22:06.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:06.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:06.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:06.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:06.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:06.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:06.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:06.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:06.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:06.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:06.851 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:22:11.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:11.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:11.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:11.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:11.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:11.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:11.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:11.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:22:11.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:22:11.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:22:11.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:11.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:11.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:11.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:22:11.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:11.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:22:11.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:11.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:22:11.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:22:11.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:11.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:11.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:11.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:22:11.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:11.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:22:11.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:11.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:22:11.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:22:11.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:11.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:11.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:11.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:22:11.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:11.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:22:11.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:22:11.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:22:11.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:22:11.879 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:22:11.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:11.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:11.881 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:22:11.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:16.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:16.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:16.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:16.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:16.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:16.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:16.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:16.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:16.913 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:16.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:16.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:22:16.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:22:16.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:22:16.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:16.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:16.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:16.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:22:16.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:16.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:22:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:16.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:22:16.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:22:16.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:16.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:16.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:16.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:22:16.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:16.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:22:16.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:16.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:22:16.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:22:16.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:16.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:16.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:16.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:22:16.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:16.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:22:16.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:22:16.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:22:16.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:22:16.936 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:22:16.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:16.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:16.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:16.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:16.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:22:17.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:22:17.473 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:22:17.475 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:22:17.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:22:17.478 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:22:17.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:22:17.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:22:17.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:22:17.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:22:17.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:22:17.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:22:17.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:22:17.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:22:17.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:22:17.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:22:17.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:22:17.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:22:17.891 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:22:17.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:17.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:17.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:17.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:18.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:22:18.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:22:18.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:18.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:18.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:18.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:19.308 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:22:19.780 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:22:19.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:19.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:19.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:19.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:20.251 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:22:20.724 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:22:20.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:20.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:20.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:20.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:21.197 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:22:21.669 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:22:21.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:21.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:21.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:21.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:22:22.614 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:22:23.087 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:22:23.560 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:22:24.033 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:22:24.505 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:22:24.976 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:22:25.449 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:22:25.921 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:22:26.394 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:22:26.867 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:22:27.339 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:22:27.811 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:22:28.282 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:22:28.755 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:22:29.228 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:22:29.700 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:22:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:22:30.644 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:22:31.116 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:22:31.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:22:31.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:22:31.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:31.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:31.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:31.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:31.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:31.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:31.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:31.525 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:22:31.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:31.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:31.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:31.525 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3150 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:22:31.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3150 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:22:31.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3150 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:22:31.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3150 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:22:31.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3150 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:22:31.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3150 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:22:36.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:36.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:36.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:36.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:36.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:36.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:36.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:36.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:36.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:36.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:36.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:22:36.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:22:36.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:22:36.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:36.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:36.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:36.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:22:36.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:36.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:22:36.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:36.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:22:36.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:22:36.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:36.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:36.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:36.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:22:36.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:36.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:22:36.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:36.550 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:22:36.550 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:22:36.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:36.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:36.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:36.551 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:22:36.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:36.551 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:22:36.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:22:36.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:22:36.556 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:22:36.556 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:22:36.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:22:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:36.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:36.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:36.558 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:22:41.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:41.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:41.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:41.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:41.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:41.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:41.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:41.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:41.573 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:41.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:41.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:22:41.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:22:41.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:22:41.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:41.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:41.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:41.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:22:41.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:41.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:22:41.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:41.578 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:22:41.578 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:22:41.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:41.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:41.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:41.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:22:41.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:41.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:22:41.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:41.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:22:41.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:22:41.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:41.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:41.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:41.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:22:41.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:41.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:22:41.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:22:41.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:22:41.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:22:41.586 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:22:41.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:41.590 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:22:42.069 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:22:42.114 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:22:42.116 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:22:42.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:22:42.119 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:22:42.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:22:42.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:22:42.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:22:42.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:22:42.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:22:42.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:22:42.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:22:42.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:22:42.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:22:42.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:22:42.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:22:42.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:22:42.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:22:42.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:42.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:42.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:42.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:43.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:22:43.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:22:43.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:43.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:43.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:43.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:43.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:22:44.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:22:44.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:44.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:44.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:44.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:44.901 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:22:45.375 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:22:45.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:45.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:45.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:45.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:45.847 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:22:46.319 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:22:46.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:46.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:46.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:46.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:46.790 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:22:47.263 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:22:47.736 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:22:48.207 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:22:48.679 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:22:49.152 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:22:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:22:50.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:22:50.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:22:50.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:22:50.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:50.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:50.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:50.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:50.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:50.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:50.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:50.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:50.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:50.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:50.173 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:22:55.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:55.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:55.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:55.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:55.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:55.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:55.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:55.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:55.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:55.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:22:55.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:22:55.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:22:55.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:22:55.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:55.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:55.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:55.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:22:55.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:22:55.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:22:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:22:55.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:22:55.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:22:55.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:55.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:55.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:55.193 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:22:55.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:22:55.193 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:22:55.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:22:55.195 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:22:55.195 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:22:55.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:55.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:22:55.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:22:55.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:22:55.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:22:55.196 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:22:55.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:22:55.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:22:55.202 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:22:55.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:22:55.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:22:55.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:22:55.204 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:22:55.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:00.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:00.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:00.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:00.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:00.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:00.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:00.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:00.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:00.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:00.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:00.223 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:23:00.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:23:00.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:23:00.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:00.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:00.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:00.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:23:00.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:00.228 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:23:00.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:00.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:23:00.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:23:00.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:00.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:00.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:00.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:23:00.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:00.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:23:00.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:00.233 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:00.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:23:00.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:23:00.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:23:00.235 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:23:00.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:00.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:00.240 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:23:00.718 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:23:00.763 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:23:00.766 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:23:00.768 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:23:00.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:23:00.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:23:00.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:23:00.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:23:00.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:23:00.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:23:00.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:23:00.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:23:00.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:23:01.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:23:01.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:01.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:01.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:01.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:01.662 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:23:02.132 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:23:02.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:02.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:02.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:02.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:02.606 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:23:03.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:23:03.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:03.550 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:23:04.024 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:23:04.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:04.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:04.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:04.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:04.496 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:23:04.968 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:23:05.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:05.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:05.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:05.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:05.439 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:23:05.912 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:23:06.385 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:23:06.857 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:23:07.328 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:23:07.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:23:08.274 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:23:08.746 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:23:09.217 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:23:09.690 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:23:10.162 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:23:10.634 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:23:10.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:23:10.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:23:10.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:10.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:10.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:10.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:10.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:10.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:10.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:10.821 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:23:15.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:15.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:15.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:15.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:15.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:15.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:15.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:15.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:15.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:15.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:15.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:23:15.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:23:15.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:23:15.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:15.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:15.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:15.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:23:15.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:15.838 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:23:15.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:15.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:23:15.840 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:23:15.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:15.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:15.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:15.842 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:23:15.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:15.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:23:15.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:15.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:23:15.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:23:15.845 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:15.845 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:15.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:15.845 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:23:15.845 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:15.845 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:23:15.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:15.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:23:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:23:15.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:23:15.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:23:15.852 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:23:15.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:15.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:15.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:15.854 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:23:15.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:20.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:20.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:20.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:20.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:20.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:20.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:20.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:20.872 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:23:20.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:23:20.874 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:23:20.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:20.874 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:20.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:20.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:23:20.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:20.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:23:20.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:20.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:23:20.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:23:20.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:20.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:20.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:20.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:23:20.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:20.877 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:23:20.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:20.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:20.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:23:20.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:23:20.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:23:20.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:23:20.882 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:23:20.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:20.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:23:21.366 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:23:21.406 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:23:21.409 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:23:21.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:23:21.411 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:23:21.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:23:21.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:23:21.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:23:21.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:23:21.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:23:21.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:23:21.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:23:21.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:23:21.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:23:21.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:23:21.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:23:21.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:23:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:23:21.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:21.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:21.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:21.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:22.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:23:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:23:22.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:22.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:22.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:22.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:23.255 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:23:23.727 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:23:23.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:23.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:23.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:23.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:23:24.669 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:23:24.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:24.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:24.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:24.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:25.142 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:23:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:23:25.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:25.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:25.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:25.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:26.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:23:26.557 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:23:27.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:23:27.503 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:23:27.974 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:23:28.446 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:23:28.919 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:23:29.391 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:23:29.863 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:23:30.334 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:23:30.808 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:23:31.280 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:23:31.752 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:23:32.223 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:23:32.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:23:32.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:23:32.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:32.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:32.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:32.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:32.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:32.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:32.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:32.468 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:23:32.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:32.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:32.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:32.468 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:23:37.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:37.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:37.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:37.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:37.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:37.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:37.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:37.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:37.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:37.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:37.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:23:37.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:23:37.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:23:37.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:37.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:37.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:37.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:23:37.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:37.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:23:37.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:37.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:23:37.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:23:37.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:37.487 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:37.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:37.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:23:37.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:37.487 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:23:37.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:37.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:23:37.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:23:37.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:37.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:37.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:37.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:23:37.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:37.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:23:37.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:23:37.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:23:37.491 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:23:37.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:37.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:37.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:37.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:37.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:37.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:37.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:37.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:37.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:37.493 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:23:42.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:42.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:42.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:42.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:42.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:42.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:42.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:42.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:42.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:42.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:42.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:23:42.516 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:23:42.517 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:23:42.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:42.517 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:42.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:42.518 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:23:42.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:42.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:23:42.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:42.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:23:42.520 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:23:42.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:42.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:42.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:42.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:23:42.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:42.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:23:42.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:42.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:23:42.523 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:23:42.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:42.523 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:42.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:42.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:23:42.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:42.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:23:42.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:23:42.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:23:42.527 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:23:42.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:42.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:23:43.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:23:43.050 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:23:43.052 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:23:43.054 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:23:43.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:23:43.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:23:43.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:43.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:43.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:43.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:43.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:23:44.429 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:23:44.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:44.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:44.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:44.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:44.905 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:23:45.377 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:23:45.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:45.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:45.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:45.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:45.852 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:23:46.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:23:46.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:46.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:46.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:46.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:46.799 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:23:47.271 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:23:47.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:47.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:47.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:47.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:47.745 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:23:48.217 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:23:48.689 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:23:49.163 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:23:49.635 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:23:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:23:50.583 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:23:51.055 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:23:51.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:23:52.002 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:23:52.477 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:23:52.949 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:23:53.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:53.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:53.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:53.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:53.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:53.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:53.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:53.064 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:23:58.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:58.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:58.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:58.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:58.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:58.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:58.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:58.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:58.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:58.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:23:58.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:23:58.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:23:58.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:23:58.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:58.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:58.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:58.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:23:58.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:23:58.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:23:58.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:23:58.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:23:58.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:23:58.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:58.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:58.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:58.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:23:58.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:23:58.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:23:58.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:23:58.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:23:58.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:23:58.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:58.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:23:58.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:23:58.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:23:58.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:23:58.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:23:58.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:23:58.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:23:58.091 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:23:58.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:23:58.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:23:58.093 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:23:58.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:03.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:03.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:03.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:03.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:03.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:03.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:03.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:03.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:03.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:03.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:03.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:24:03.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:24:03.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:24:03.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:03.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:03.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:03.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:24:03.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:03.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:24:03.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:03.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:24:03.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:24:03.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:03.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:03.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:03.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:24:03.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:03.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:24:03.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:03.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:24:03.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:24:03.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:03.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:03.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:03.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:24:03.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:03.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:24:03.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:03.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:24:03.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:24:03.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:24:03.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:24:03.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:24:03.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:24:03.128 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:24:03.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:03.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:03.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:24:03.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:24:03.657 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:24:03.660 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:24:03.662 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:24:03.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:24:04.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:24:04.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:04.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:24:05.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:24:05.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:05.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:24:05.975 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:24:06.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:06.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:06.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:06.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:06.447 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:24:06.919 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:24:07.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:07.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:07.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:07.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:07.394 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:24:07.866 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:24:08.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:08.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:08.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:08.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:08.342 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:24:08.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:24:09.288 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:24:09.760 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:24:10.231 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:24:10.704 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:24:11.177 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:24:11.649 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:24:12.124 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:24:12.596 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:24:13.072 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:24:13.543 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:24:14.019 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:24:14.491 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:24:14.966 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:24:15.435 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:24:15.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:15.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:15.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:15.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:15.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:15.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:15.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:15.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:15.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:15.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:15.676 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:24:20.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:20.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:20.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:20.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:20.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:20.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:20.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:20.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:20.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:20.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:20.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:24:20.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:24:20.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:24:20.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:20.687 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:20.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:20.687 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:24:20.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:20.687 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:20.688 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:20.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:24:20.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:20.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:24:20.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:24:20.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:20.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:20.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:20.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:24:20.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:20.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:24:20.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:24:20.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:24:20.692 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:24:20.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:20.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:24:21.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:24:21.219 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:24:21.221 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:24:21.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:24:21.223 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:24:21.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:24:21.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:24:21.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:24:21.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:24:21.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:24:21.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:24:21.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:24:21.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:24:21.646 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:24:21.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:21.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:21.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:21.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:22.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:24:22.591 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:24:22.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:22.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:23.064 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:24:23.536 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:24:23.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:23.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:24.007 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:24:24.478 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:24:24.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:24.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:24.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:24.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:24.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:24:25.419 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:24:25.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:25.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:25.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:25.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:25.893 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:24:26.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:24:26.837 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:24:27.308 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:24:27.782 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:24:28.254 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:24:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:24:29.197 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:24:29.670 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:24:30.143 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:24:30.614 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:24:31.086 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:24:31.559 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:24:32.031 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:24:32.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:24:32.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:24:32.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:32.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:32.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:32.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:32.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:32.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:32.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:32.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:32.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:32.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:32.277 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:32.278 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:37.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:37.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:37.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:37.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:37.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:37.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:37.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:37.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:37.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:37.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:37.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:24:37.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:24:37.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:24:37.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:37.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:37.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:37.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:24:37.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:37.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:24:37.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:37.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:24:37.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:24:37.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:37.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:37.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:37.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:24:37.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:37.305 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:24:37.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:37.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:24:37.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:24:37.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:37.307 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:37.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:37.307 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:24:37.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:37.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:24:37.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:24:37.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:24:37.311 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:24:37.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:37.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:24:37.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:24:37.841 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:24:37.843 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:24:37.844 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:24:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:24:37.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:24:37.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:24:37.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:24:37.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:24:37.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:24:37.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:24:37.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:24:37.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:24:38.266 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:24:38.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:38.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:38.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:38.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:38.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:24:39.209 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:24:39.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:39.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:39.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:39.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:39.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:24:40.155 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:24:40.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:40.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:24:41.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:24:41.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:41.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:41.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:41.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:41.571 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:24:42.044 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:24:42.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:42.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:42.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:42.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:24:42.987 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:24:43.457 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:24:43.931 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:24:44.403 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:24:44.875 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:24:45.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:24:45.819 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:24:46.292 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:24:46.764 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:24:47.235 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:24:47.708 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:24:48.181 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:24:48.652 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:24:49.124 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:24:49.597 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:24:50.069 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:24:50.541 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:24:51.012 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:24:51.485 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:24:51.958 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:24:52.430 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:24:52.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:24:52.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:24:52.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:52.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:52.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:52.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:52.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:52.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:52.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:52.895 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:24:52.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:52.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:52.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:52.895 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3367 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:52.895 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3367 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:52.895 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3367 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:52.895 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3367 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:52.895 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3367 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:52.895 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3367 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:57.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:57.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:57.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:57.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:57.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:57.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:57.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:57.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:57.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:57.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:24:57.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:24:57.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:24:57.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:24:57.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:57.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:57.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:57.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:24:57.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:24:57.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:24:57.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:57.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:24:57.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:24:57.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:57.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:57.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:57.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:24:57.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:24:57.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:24:57.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:57.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:24:57.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:24:57.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:57.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:24:57.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:57.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:24:57.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:24:57.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:24:57.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:24:57.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:24:57.929 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:24:57.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:24:57.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:24:57.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:24:57.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:24:58.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:24:58.457 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:24:58.459 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:24:58.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:24:58.462 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:24:58.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:24:58.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:24:58.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:24:58.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:24:58.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:24:58.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:24:58.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:24:58.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:24:58.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:24:58.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:24:58.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:24:58.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:24:58.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:24:58.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:24:58.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:24:58.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:24:58.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:24:58.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:24:58.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:24:58.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:24:58.516 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:24:58.516 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:58.516 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:58.516 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:58.516 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:58.516 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:24:58.516 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:03.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:25:03.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:25:03.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:03.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:03.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:03.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:03.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:03.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:25:03.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:03.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:25:03.528 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:25:03.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:25:03.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:25:03.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:25:03.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:03.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:03.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:25:03.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:25:03.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:25:03.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:03.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:25:03.533 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:25:03.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:25:03.533 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:03.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:03.534 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:25:03.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:25:03.534 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:25:03.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:03.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:25:03.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:25:03.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:25:03.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:03.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:03.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:25:03.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:25:03.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:25:03.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:25:03.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:25:03.539 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:25:03.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:03.543 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:25:04.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:25:04.063 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:25:04.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.066 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:25:04.068 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:25:04.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:04.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:04.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:04.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:04.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:25:04.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:04.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:04.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:04.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:04.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:04.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:04.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:04.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:04.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:04.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:04.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:04.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:04.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:04.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:04.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:04.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:25:05.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:05.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:05.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:05.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:05.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:05.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:05.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:05.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:05.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:05.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:25:05.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:25:05.295 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:25:05.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:05.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:05.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:05.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:10.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:25:10.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:25:10.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:10.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:10.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:10.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:10.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:10.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:25:10.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:10.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:25:10.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:25:10.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:25:10.314 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:25:10.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:25:10.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:10.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:10.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:25:10.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:25:10.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:25:10.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:10.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:25:10.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:25:10.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:25:10.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:10.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:10.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:25:10.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:25:10.319 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:25:10.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:10.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:25:10.321 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:25:10.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:25:10.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:10.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:10.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:25:10.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:25:10.321 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:25:10.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:10.324 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:25:10.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:25:10.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:25:10.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:25:10.325 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:25:10.325 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:25:10.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:10.330 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:25:10.808 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:25:10.849 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:25:10.851 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:25:10.852 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:25:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:10.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:10.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:10.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:10.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:10.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:10.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:10.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:10.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:10.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:10.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:10.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:10.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:10.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:10.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:10.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:10.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:11.280 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:25:11.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:11.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:11.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:11.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:11.752 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:25:12.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:25:12.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:12.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:12.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:12.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:12.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:25:13.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:25:13.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:13.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:13.641 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:25:14.115 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:25:14.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:14.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:25:15.060 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:25:15.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:15.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:15.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:15.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:15.533 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:25:15.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:15.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:15.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:15.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:15.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:15.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:15.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:15.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:15.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:15.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:15.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:15.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:15.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:15.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:15.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:15.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:15.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:15.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:15.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:15.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:16.005 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:25:16.477 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:25:16.948 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:25:17.422 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:25:17.894 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:25:18.367 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:25:18.838 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:25:19.311 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:25:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:25:20.256 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:25:20.727 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:25:20.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:20.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:20.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:20.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:20.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:20.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:20.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:20.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:20.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:20.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:20.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:20.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:20.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:20.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:20.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:20.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:21.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:21.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:21.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:21.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:21.197 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:25:21.668 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:25:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:25:22.614 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:25:23.086 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:25:23.557 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:25:24.030 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:25:24.503 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:25:24.975 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:25:25.446 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:25:25.919 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:25:26.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:26.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:26.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:26.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:26.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:26.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:26.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:26.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:26.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:26.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:26.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:26.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:26.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:26.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:26.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:26.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:26.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:26.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:26.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:26.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:26.390 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:25:26.862 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:25:27.334 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:25:27.805 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:25:28.279 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:25:28.750 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:25:29.222 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:25:29.693 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:25:30.178 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:25:30.650 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:25:31.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:31.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:31.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:31.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:31.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:31.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:31.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:31.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:31.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:25:31.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:25:31.079 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:25:31.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:31.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:31.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:31.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4481 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:31.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4481 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:31.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4481 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:31.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4481 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:31.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4481 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:31.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4481 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:36.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:25:36.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:25:36.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:36.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:36.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:36.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:36.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:36.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:25:36.106 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:36.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:25:36.106 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:25:36.111 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:25:36.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:25:36.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:25:36.112 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:36.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:36.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:25:36.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:25:36.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:25:36.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:36.115 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:25:36.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:25:36.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:25:36.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:36.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:36.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:25:36.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:25:36.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:25:36.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:36.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:25:36.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:25:36.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:25:36.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:25:36.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:36.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:25:36.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:25:36.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:25:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:25:36.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:25:36.123 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:25:36.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:25:36.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:25:36.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:25:36.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:25:36.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:25:36.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:25:36.650 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:25:36.652 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:25:36.654 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:25:36.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:36.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:36.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:36.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:36.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:36.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:36.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:36.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:36.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:36.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:36.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:36.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:36.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:36.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:36.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:36.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:36.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:37.076 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:25:37.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:37.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:37.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:37.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:37.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:25:38.022 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:25:38.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:38.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:38.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:38.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:38.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:25:38.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:25:39.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:39.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:39.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:39.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:39.438 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:25:39.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:25:40.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:40.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:40.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:40.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:40.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:25:40.857 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:25:41.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:41.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:41.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:41.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:41.330 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:25:41.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:41.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:41.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:41.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:41.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:41.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:41.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:41.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:41.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:41.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:41.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:41.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:41.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:41.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:41.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:41.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:41.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:41.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:41.802 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:25:42.273 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:25:42.744 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:25:43.214 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:25:43.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:25:44.160 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:25:44.632 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:25:45.103 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:25:45.577 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:25:46.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:25:46.521 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:25:46.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:46.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:46.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:46.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:46.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:46.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:46.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:46.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:46.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:46.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:46.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:46.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:46.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:46.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:46.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:46.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:46.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:46.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:46.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:46.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:46.992 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:25:47.463 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:25:47.933 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:25:48.404 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:25:48.875 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:25:49.349 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:25:49.821 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:25:50.293 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:25:50.766 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:25:51.239 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:25:51.711 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:25:51.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:51.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:51.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:51.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:51.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:51.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:51.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:51.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:51.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:51.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:25:51.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:51.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:51.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:51.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:51.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:25:51.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:25:51.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:25:51.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:25:51.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:51.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:52.182 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:25:52.653 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:25:53.126 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:25:53.598 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:25:54.070 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:25:54.541 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:25:55.015 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:25:55.487 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:25:55.959 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:25:56.430 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:25:56.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:25:56.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:25:56.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:25:56.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:25:56.903 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:25:56.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:25:56.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:25:56.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:25:56.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:25:56.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:25:56.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:25:56.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:25:56.919 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:25:56.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:25:56.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:25:56.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:25:56.919 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:01.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:26:01.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:26:01.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:01.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:01.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:01.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:01.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:01.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:26:01.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:01.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:26:01.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:26:01.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:26:01.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:26:01.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:26:01.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:01.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:01.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:26:01.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:26:01.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:26:01.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:01.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:26:01.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:26:01.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:26:01.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:01.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:01.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:26:01.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:26:01.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:26:01.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:01.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:26:01.937 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:26:01.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:26:01.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:01.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:01.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:26:01.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:26:01.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:26:01.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:26:01.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:26:01.944 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:26:01.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:01.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:26:02.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:26:02.471 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:26:02.472 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:26:02.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:02.475 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:26:02.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:02.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:02.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:02.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:02.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:02.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:02.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:02.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:02.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:02.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:02.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:02.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:02.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:02.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:02.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:02.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:02.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:26:02.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:02.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:02.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:02.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:03.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:26:03.844 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:26:03.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:03.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:03.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:03.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:04.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:26:04.789 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:26:04.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:04.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:05.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:26:05.735 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:26:05.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:05.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:05.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:05.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:06.207 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:26:06.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:26:06.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:06.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:07.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:26:07.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:07.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:07.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:07.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:07.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:07.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:07.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:07.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:07.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:07.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:07.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:07.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:07.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:07.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:07.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:07.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:07.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:07.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:07.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:07.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:07.623 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:26:08.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:26:08.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:26:09.037 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:26:09.511 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:26:09.983 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:26:10.455 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:26:10.926 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:26:11.399 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:26:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:26:12.344 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:26:12.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:12.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:12.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:12.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:12.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:12.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:12.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:12.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:12.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:12.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:12.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:12.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:12.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:12.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:12.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:12.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:12.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:12.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:12.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:12.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:12.814 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:26:13.285 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:26:13.756 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:26:14.227 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:26:14.700 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:26:15.172 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:26:15.644 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:26:16.116 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:26:16.589 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:26:17.061 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:26:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:26:17.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:17.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:17.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:17.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:17.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:17.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:17.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:17.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:17.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:17.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:17.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:17.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:17.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:17.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:17.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:17.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:17.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:17.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:17.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:26:18.475 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:26:18.948 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:26:19.421 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:26:19.893 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:26:20.364 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:26:20.837 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:26:21.309 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:26:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:26:22.252 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:26:22.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:22.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:22.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:22.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:22.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:22.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:22.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:22.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:22.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:22.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:22.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:26:22.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:26:22.689 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:26:22.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:22.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:22.690 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.690 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.690 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.690 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.690 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.691 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.691 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:22.691 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:27.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:26:27.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:26:27.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:27.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:27.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:27.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:27.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:27.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:26:27.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:27.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:26:27.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:26:27.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:26:27.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:26:27.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:26:27.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:27.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:27.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:26:27.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:26:27.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:26:27.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:27.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:26:27.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:26:27.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:26:27.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:27.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:27.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:26:27.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:26:27.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:26:27.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:27.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:26:27.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:26:27.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:26:27.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:27.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:27.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:26:27.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:26:27.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:26:27.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:26:27.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:26:27.721 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:26:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:26:28.248 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:26:28.251 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:26:28.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:28.254 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:26:28.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:28.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:28.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:28.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:28.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:28.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:28.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:28.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:28.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:28.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:28.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:28.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:28.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:28.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:28.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:28.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:26:28.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:28.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:28.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:28.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:29.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:26:29.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:26:29.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:29.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:29.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:29.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:26:30.566 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:26:30.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:30.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:30.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:30.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:31.040 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:26:31.512 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:26:31.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:31.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:31.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:31.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:31.985 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:26:32.458 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:26:32.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:32.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:32.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:32.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:32.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:26:33.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:33.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:33.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:33.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:33.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:33.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:33.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:33.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:33.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:33.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:33.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:33.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:33.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:33.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:33.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:33.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:33.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:33.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:33.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:33.402 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:26:33.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:26:34.347 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:26:34.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:26:35.292 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:26:35.763 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:26:36.236 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:26:36.708 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:26:37.181 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:26:37.654 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:26:38.126 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:26:38.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:38.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:38.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:38.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:38.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:38.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:38.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:38.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:38.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:38.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:38.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:38.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:38.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:38.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:38.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:38.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:38.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:38.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:38.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:38.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:38.598 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:26:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:26:39.543 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:26:40.015 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:26:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:26:40.961 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:26:41.433 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:26:41.905 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:26:42.377 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:26:42.850 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:26:43.322 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:26:43.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:43.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:43.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:43.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:43.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:43.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:43.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:43.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:43.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:43.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:43.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:43.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:43.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:43.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:43.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:43.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:43.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:43.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:43.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:43.794 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:26:44.265 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:26:44.739 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:26:45.211 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:26:45.683 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:26:46.154 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:26:46.628 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:26:47.100 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:26:47.572 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:26:48.043 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:26:48.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:48.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:48.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:48.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:48.516 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:26:48.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:48.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:48.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:48.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:48.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:48.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:48.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:48.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:48.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:26:48.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:26:48.526 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:26:48.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:48.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:48.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:48.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:48.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:48.526 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:53.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:26:53.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:26:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:53.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:53.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:53.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:26:53.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:53.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:26:53.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:26:53.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:26:53.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:26:53.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:26:53.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:53.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:53.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:26:53.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:26:53.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:26:53.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:53.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:26:53.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:26:53.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:26:53.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:53.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:53.546 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:26:53.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:26:53.546 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:26:53.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:53.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:26:53.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:26:53.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:26:53.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:26:53.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:53.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:26:53.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:26:53.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:26:53.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:26:53.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:26:53.550 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:26:53.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:26:53.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:26:54.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:26:54.071 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:26:54.073 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:26:54.075 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:26:54.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:54.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:54.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:54.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:54.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:54.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:54.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:54.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:54.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:54.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:54.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:54.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:54.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:54.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:54.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:54.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:54.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:54.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:54.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:54.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:54.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:26:54.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:54.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:54.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:54.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:54.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:54.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:54.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:54.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:54.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:54.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:54.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:54.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:54.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:54.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:54.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:54.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:54.976 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:26:55.447 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:26:55.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:55.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:55.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:55.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:55.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:55.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:55.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:55.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:55.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:55.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:55.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:55.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:55.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:55.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:26:55.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:55.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:55.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:55.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:55.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:26:55.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:26:55.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:26:55.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:26:55.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:55.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:55.918 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:26:56.389 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:26:56.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:26:56.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:26:56.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:26:56.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:26:56.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:26:56.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:26:56.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:26:56.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:26:56.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:26:56.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:26:56.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:26:56.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:26:56.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:26:56.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:26:56.491 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:26:56.491 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:56.491 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:56.491 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:56.491 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:56.491 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:26:56.491 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:27:01.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:27:01.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:27:01.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:27:01.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:27:01.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:27:01.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:27:01.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:27:01.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:27:01.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:27:01.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:27:01.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:27:01.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:27:01.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:27:01.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:27:01.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:27:01.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:27:01.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:27:01.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:27:01.521 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:27:01.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:27:01.525 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:27:01.526 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:27:01.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:27:01.526 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:27:01.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:27:01.526 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:27:01.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:27:01.526 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:27:01.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:27:01.530 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:27:01.530 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:27:01.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:27:01.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:27:01.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:27:01.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:27:01.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:27:01.531 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:27:01.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:27:01.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:27:01.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:27:01.536 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:27:01.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:27:01.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:27:02.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:27:02.064 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:27:02.067 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:27:02.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:27:02.069 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:27:02.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:02.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:02.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:27:02.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:02.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:02.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:27:02.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:27:02.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:02.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:27:02.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:27:02.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:27:02.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:27:02.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:27:02.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:27:02.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:02.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:02.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:27:02.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:27:02.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:27:02.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:27:02.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:27:02.963 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:27:03.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:27:03.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:27:03.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:27:03.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:27:03.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:27:03.909 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:27:04.381 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:27:04.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:27:04.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:27:04.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:27:04.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:27:04.853 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:27:05.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:27:05.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:27:05.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:27:05.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:27:05.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:27:05.795 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:27:06.268 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:27:06.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:27:06.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:27:06.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:27:06.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:27:06.741 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:27:07.213 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:27:07.684 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:27:08.158 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:27:08.630 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:27:09.103 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:27:09.574 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:27:10.047 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:27:10.520 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:27:10.992 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:27:11.463 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:27:11.934 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:27:12.407 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:27:12.880 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:27:13.352 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:27:13.825 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:27:14.298 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:27:14.770 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:27:15.241 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:27:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:27:16.187 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:27:16.659 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:27:17.130 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:27:17.604 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:27:18.076 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:27:18.549 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:27:19.020 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:27:19.493 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:27:19.966 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:27:20.438 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:27:20.909 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:27:21.380 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:27:21.851 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:27:22.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:22.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:27:22.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:22.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:22.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:22.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:22.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:27:22.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:22.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:22.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:27:22.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:27:22.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:22.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:27:22.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:27:22.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:27:22.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:27:22.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:27:22.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:27:22.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:22.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:22.321 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:27:22.792 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:27:23.266 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:27:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:27:24.210 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:27:24.681 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:27:25.152 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:27:25.622 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:27:26.093 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:27:26.564 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:27:27.037 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:27:27.510 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:27:27.982 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:27:28.455 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:27:28.928 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:27:29.400 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:27:29.874 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:27:30.346 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:27:30.819 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:27:31.292 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:27:31.765 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:27:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:27:32.708 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:27:33.179 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:27:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:27:34.124 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:27:34.597 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:27:35.070 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:27:35.542 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:27:36.015 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:27:36.485 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:27:36.956 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:27:37.427 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:27:37.898 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:27:38.368 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:27:38.842 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:27:39.314 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:27:39.787 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:27:40.260 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:27:40.732 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:27:41.204 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:27:41.676 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:27:42.149 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:27:42.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:42.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:27:42.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:42.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:42.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:42.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:42.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:27:42.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:27:42.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:27:42.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:27:42.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:27:42.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:42.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:27:42.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:27:42.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:27:42.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:27:42.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:27:42.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:27:42.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:42.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:27:42.620 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:27:43.092 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:27:43.564 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:27:44.035 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:27:44.509 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:27:44.981 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:27:45.453 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:27:45.924 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:27:46.397 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:27:46.870 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:27:47.342 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:27:47.813 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:27:48.284 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:27:48.757 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:27:49.230 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:27:49.702 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:27:50.173 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:27:50.646 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:27:51.119 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:27:51.591 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:27:52.062 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:27:52.532 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:27:53.006 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:27:53.478 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:27:53.950 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:27:54.421 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:27:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:27:55.365 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:27:55.838 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:27:56.310 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:27:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:27:57.254 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:27:57.727 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:27:58.199 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:27:58.670 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:27:59.141 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:27:59.614 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:28:00.087 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:28:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:28:01.030 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:28:01.503 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 02:28:01.976 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 02:28:02.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:02.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:02.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:02.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:02.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:02.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:02.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:02.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:02.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:02.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:02.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:02.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:02.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:02.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:02.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:02.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:02.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:02.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:02.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:02.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:02.442 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 02:28:02.907 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 02:28:03.371 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 02:28:03.835 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 02:28:04.300 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 02:28:04.763 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 02:28:05.227 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 02:28:05.693 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 02:28:06.159 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 02:28:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 02:28:07.102 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 02:28:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 02:28:08.041 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 02:28:08.509 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 02:28:08.982 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 02:28:09.454 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 02:28:09.925 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 02:28:10.399 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 02:28:10.871 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 02:28:11.343 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 02:28:11.814 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 02:28:12.288 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 02:28:12.760 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 02:28:13.232 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 02:28:13.703 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 02:28:14.174 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 02:28:14.647 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 02:28:15.120 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 02:28:15.592 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 02:28:16.063 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 02:28:16.536 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 02:28:17.009 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 02:28:17.481 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 02:28:17.952 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 02:28:18.425 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 02:28:18.898 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 02:28:19.370 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 02:28:19.841 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 02:28:20.314 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 02:28:20.786 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 02:28:21.258 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 02:28:21.729 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 02:28:22.202 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 02:28:22.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:22.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:22.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:22.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:22.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:22.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:22.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:22.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:22.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:22.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:22.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:22.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:22.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:28:22.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:28:22.376 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:28:22.377 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=17482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:22.377 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=17482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:22.377 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=17482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:22.377 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=17482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:22.377 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=17482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:22.377 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=17482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:27.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:28:27.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:28:27.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:27.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:27.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:27.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:27.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:27.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:28:27.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:27.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:28:27.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:28:27.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:28:27.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:28:27.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:28:27.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:27.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:27.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:28:27.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:28:27.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:28:27.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:28:27.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:28:27.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:28:27.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:27.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:28:27.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:28:27.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:28:27.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:27.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:27.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:28:27.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:28:27.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:28:27.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:28:27.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:28:27.399 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:28:27.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:27.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:28:27.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:28:27.400 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:28:32.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:28:32.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:28:32.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:32.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:32.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:32.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:32.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:32.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:28:32.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:32.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:28:32.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:28:32.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:28:32.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:28:32.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:28:32.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:32.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:32.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:28:32.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:28:32.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:28:32.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:32.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:28:32.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:28:32.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:28:32.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:32.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:32.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:28:32.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:28:32.421 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:28:32.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:32.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:28:32.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:28:32.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:28:32.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:32.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:32.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:28:32.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:28:32.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:28:32.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:28:32.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:28:32.425 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:28:32.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:32.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:28:32.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:28:32.950 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:28:32.951 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:28:32.952 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:28:32.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:32.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:32.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:32.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:32.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:32.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:32.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:32.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:32.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:32.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:32.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:32.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:32.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:32.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:33.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:33.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:33.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:33.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:33.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:28:33.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:33.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:33.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:33.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:33.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:33.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:33.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:33.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:33.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:33.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:33.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:33.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:33.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:33.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:33.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:33.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:33.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:33.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:33.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:33.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:33.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:28:34.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:34.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:34.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:34.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:34.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:34.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:34.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:34.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:34.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:34.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:28:34.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:34.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:34.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:34.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:34.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:34.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:34.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:34.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:34.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:34.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:34.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:34.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:28:34.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:34.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:34.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:34.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:34.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:34.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:34.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:34.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:34.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:34.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:34.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:34.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:34.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:35.263 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:28:35.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:35.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:35.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:35.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:35.737 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:28:36.207 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:28:36.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:36.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:36.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:36.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:36.680 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:28:37.152 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:28:37.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:37.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:37.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:37.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:37.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:37.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:37.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:37.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:37.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:37.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:37.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:37.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:37.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:37.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:37.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:37.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:37.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:37.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:37.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:37.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:37.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:37.623 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:28:38.094 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:28:38.564 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:28:39.038 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:28:39.510 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:28:39.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:39.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:39.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:39.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:39.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:39.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:39.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:39.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:39.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:39.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:39.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:39.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:39.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:39.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:39.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:39.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:39.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:39.982 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:28:40.453 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:28:40.924 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:28:41.395 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:28:41.866 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:28:42.336 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:28:42.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:42.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:42.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:42.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:42.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:42.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:42.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:42.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:42.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:42.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:42.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:42.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:42.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:42.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:42.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:42.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:42.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:42.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:42.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:42.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:42.807 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:28:43.280 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:28:43.753 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:28:44.225 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:28:44.696 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:28:45.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:45.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:45.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:45.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:45.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:45.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:45.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:45.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:45.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:45.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:45.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:45.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:45.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:45.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:45.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:45.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:45.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:45.168 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:28:45.641 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:28:46.113 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:28:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:28:47.058 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:28:47.530 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:28:47.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:47.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:47.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:47.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:47.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:47.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:47.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:47.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:47.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:47.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:47.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:47.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:47.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:47.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:47.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:47.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:48.002 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:28:48.473 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:28:48.946 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:28:49.419 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:28:49.891 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:28:50.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:50.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:50.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:50.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:50.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:50.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:50.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:50.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:50.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:50.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:50.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:50.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:50.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:28:50.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:28:50.231 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:28:50.231 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:50.231 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:50.231 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:50.231 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:50.231 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:50.232 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:28:55.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:28:55.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:28:55.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:55.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:55.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:55.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:55.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:28:55.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:28:55.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:55.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:28:55.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:28:55.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:28:55.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:28:55.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:28:55.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:55.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:28:55.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:28:55.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:28:55.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:28:55.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:55.250 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:28:55.251 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:28:55.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:28:55.251 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:55.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:28:55.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:28:55.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:28:55.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:28:55.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:55.255 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:28:55.255 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:28:55.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:28:55.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:28:55.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:28:55.255 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:28:55.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:28:55.255 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:28:55.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:28:55.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:28:55.262 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:28:55.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:28:55.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:28:55.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:28:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:28:55.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:28:55.745 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:28:55.797 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:28:55.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:55.801 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:28:55.804 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:28:55.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:55.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:55.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:55.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:55.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:55.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:55.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:55.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:55.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:55.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:55.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:55.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:55.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:55.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:55.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:55.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:56.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:28:56.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:56.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:56.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:56.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:56.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:28:57.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:28:57.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:57.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:57.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:57.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:57.634 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:28:58.107 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:28:58.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:58.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:58.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:58.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:58.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:28:58.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:59.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:59.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:59.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:59.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:59.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:59.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:28:59.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:28:59.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:28:59.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:28:59.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:59.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:59.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:59.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:28:59.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:28:59.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:28:59.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:28:59.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:59.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:28:59.050 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:28:59.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:28:59.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:28:59.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:28:59.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:28:59.523 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:28:59.995 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:29:00.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:00.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:00.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:00.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:00.469 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:29:00.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:29:01.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:29:01.884 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:29:02.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:02.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:02.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:02.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:02.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:02.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:02.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:02.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:02.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:02.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:02.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:02.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:02.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:02.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:02.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:02.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:02.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:02.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:02.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:02.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:02.354 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:29:02.826 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:29:03.299 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:29:03.771 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:29:04.243 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:29:04.714 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:29:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:29:05.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:05.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:05.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:05.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:05.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:05.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:05.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:05.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:05.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:05.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:05.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:05.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:05.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:05.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:05.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:05.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:05.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:05.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:05.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:05.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:05.657 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:29:06.130 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:29:06.603 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:29:07.073 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:29:07.547 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:29:08.019 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:29:08.491 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:29:08.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:08.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:08.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:08.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:08.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:08.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:08.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:08.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:08.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:08.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:08.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:08.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:08.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:08.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:08.830 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:29:13.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:13.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:13.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:13.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:13.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:13.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:13.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:13.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:13.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:13.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:13.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:29:13.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:29:13.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:29:13.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:13.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:13.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:13.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:29:13.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:13.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:29:13.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:13.877 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:29:13.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:29:13.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:13.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:13.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:13.879 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:29:13.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:13.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:29:13.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:13.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:29:13.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:29:13.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:13.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:13.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:13.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:29:13.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:13.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:29:13.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:29:13.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:29:13.889 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:29:13.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:13.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:29:14.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:29:14.422 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:29:14.425 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:29:14.427 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:29:14.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:14.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:14.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:14.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:14.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:14.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:14.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:14.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:14.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:14.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:14.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:14.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:14.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:14.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:14.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:14.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:14.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:14.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:29:14.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:14.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:14.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:14.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:14.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:14.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:14.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:14.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:14.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:14.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:14.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:14.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:14.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:14.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:14.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:14.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:14.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:14.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:15.315 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:29:15.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:15.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:15.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:15.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:15.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:15.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:15.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:15.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:15.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:15.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:15.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:15.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:15.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:15.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:15.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:15.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:15.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:15.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:15.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:15.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:15.786 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:29:15.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:15.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:15.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:15.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:16.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:29:16.730 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:29:16.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:16.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:16.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:16.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:17.203 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:29:17.675 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:29:17.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:17.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:17.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:17.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:18.146 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:29:18.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:18.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:18.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:18.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:18.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:18.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:18.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:18.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:18.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:18.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:18.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:18.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:18.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:18.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:18.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:18.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:18.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:18.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:18.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:18.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:18.617 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:29:18.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:18.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:18.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:18.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:19.088 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:29:19.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:29:20.029 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:29:20.500 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:29:20.973 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:29:21.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:21.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:21.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:21.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:21.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:21.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:21.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:21.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:21.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:21.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:21.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:21.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:21.308 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:29:21.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:21.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:21.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:21.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:21.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:21.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:21.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:21.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:26.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:26.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:26.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:26.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:26.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:26.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:26.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:26.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:26.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:26.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:26.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:29:26.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:29:26.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:29:26.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:26.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:26.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:26.326 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:29:26.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:26.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:29:26.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:26.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:29:26.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:29:26.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:26.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:26.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:26.331 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:29:26.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:26.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:29:26.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:26.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:29:26.335 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:29:26.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:26.336 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:26.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:26.336 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:29:26.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:26.336 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:29:26.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:26.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:29:26.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:29:26.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:29:26.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:29:26.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:29:26.343 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:29:26.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:26.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:26.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:26.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:29:26.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:29:26.874 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:29:26.875 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:29:26.876 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:29:26.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:26.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:26.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:26.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:26.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:26.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:26.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:26.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:26.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:26.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:26.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:26.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:26.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:26.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:26.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:26.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:26.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:27.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:29:27.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:27.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:27.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:27.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:29:28.243 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:29:28.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:28.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:28.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:28.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:28.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:28.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:28.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:28.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:28.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:28.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:28.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:28.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:28.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:28.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:28.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:28.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:28.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:28.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:28.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:28.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:28.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:28.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:28.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:28.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:28.713 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:29:29.186 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:29:29.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:29.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:29.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:29.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:29.658 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:29:30.129 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:29:30.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:30.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:30.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:30.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:30.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:30.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:30.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:30.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:30.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:30.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:30.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:30.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:30.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:30.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:30.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:30.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:30.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:30.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:30.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:30.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:30.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:30.599 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:29:31.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:29:31.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:31.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:31.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:31.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:31.544 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:29:32.016 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:29:32.488 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:29:32.959 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:29:33.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:29:33.901 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:29:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:29:34.842 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:29:35.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:35.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:35.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:35.315 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:29:35.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:35.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:35.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:35.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:35.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:35.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:35.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:35.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:35.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:35.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:35.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:35.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:35.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:35.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:35.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:35.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:35.787 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:29:36.259 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:29:36.733 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:29:37.205 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:29:37.678 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:29:38.151 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:29:38.623 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:29:39.095 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:29:39.566 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:29:40.040 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:29:40.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:40.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:40.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:40.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:40.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:40.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:40.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:40.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:40.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:40.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:40.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:40.208 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:29:40.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2997 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:40.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2997 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:40.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2997 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:40.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2997 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:40.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2997 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:40.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2997 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:45.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:45.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:45.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:45.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:45.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:45.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:45.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:45.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:45.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:45.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:45.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:29:45.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:29:45.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:29:45.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:45.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:45.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:45.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:29:45.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:45.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:29:45.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:45.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:45.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:29:45.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:45.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:29:45.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:29:45.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:45.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:45.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:45.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:29:45.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:45.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:29:45.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:45.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:29:45.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:29:45.237 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:29:45.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:45.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:45.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:29:45.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:29:45.761 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:29:45.763 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:29:45.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:45.766 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:29:45.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:45.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:45.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:45.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:45.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:45.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:45.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:45.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:45.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:45.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:45.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:45.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:45.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:45.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:45.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:45.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:46.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:29:46.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:46.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:46.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:46.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:46.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:46.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:46.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:46.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:46.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:46.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:46.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:46.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:46.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:46.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:46.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:46.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:46.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:46.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:46.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:46.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:46.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:46.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:46.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:29:47.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:29:47.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:47.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:47.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:47.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:47.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:47.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:47.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:47.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:47.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:47.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:47.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:47.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:47.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:47.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:47.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:47.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:47.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:47.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:47.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:47.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:47.604 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:29:48.075 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:29:48.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:48.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:48.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:48.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:48.546 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:29:49.019 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:29:49.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:49.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:49.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:49.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:49.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:49.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:49.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:49.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:49.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:49.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:49.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:49.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:49.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:49.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:49.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:49.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:49.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:49.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:49.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:49.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:49.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:49.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:49.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:49.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:29:49.963 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:29:50.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:50.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:50.435 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:29:50.908 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:29:51.381 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:29:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:51.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:51.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:51.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:51.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:51.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:51.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:51.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:51.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:51.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:51.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:51.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:51.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:51.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:51.484 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:29:51.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:51.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:51.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:51.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:51.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:51.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:29:56.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:29:56.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:29:56.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:56.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:56.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:56.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:56.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:29:56.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:56.490 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:56.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:29:56.490 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:56.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:29:56.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:29:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:56.492 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:29:56.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:29:56.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:56.493 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:29:56.493 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:29:56.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:29:56.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:29:56.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:56.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:29:56.494 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:29:56.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:29:56.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:29:56.496 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:29:56.496 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:29:56.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:29:56.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:29:56.979 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:29:57.023 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:29:57.025 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:29:57.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:57.027 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:29:57.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:57.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:57.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:57.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:57.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:57.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:57.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:57.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:57.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:57.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:57.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:57.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:57.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:57.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:57.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:57.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:57.448 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:29:57.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:57.922 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:29:58.394 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:29:58.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:58.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:58.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:58.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:58.867 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:29:59.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:29:59.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:29:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:29:59.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:29:59.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:29:59.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:59.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:59.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:59.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:59.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:59.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:59.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:59.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:29:59.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:29:59.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:29:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:29:59.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:59.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:59.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:59.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:29:59.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:29:59.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:29:59.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:29:59.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:59.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:29:59.812 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:30:00.283 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:30:00.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:00.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:00.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:00.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:00.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:30:01.230 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:30:01.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:01.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:01.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:01.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:01.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:30:02.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:30:02.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:02.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:02.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:02.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:02.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:02.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:02.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:02.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:02.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:02.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:02.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:02.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:02.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:02.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:02.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:02.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:02.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:02.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:02.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:02.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:02.643 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:30:03.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:30:03.585 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:30:04.059 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:30:04.531 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:30:05.003 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:30:05.474 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:30:05.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:05.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:05.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:05.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:05.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:05.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:05.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:05.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:05.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:05.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:05.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:05.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:05.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:05.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:05.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:05.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:05.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:05.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:05.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:05.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:05.945 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:30:06.418 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:30:06.890 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:30:07.363 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:30:07.836 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:30:08.308 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:30:08.780 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:30:09.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:09.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:09.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:09.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:09.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:09.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:09.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:09.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:30:09.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:30:09.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:30:09.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:30:09.116 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:30:09.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:30:09.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:30:09.117 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2727 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:30:09.117 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2727 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:30:09.117 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2727 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:30:09.117 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2727 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:30:09.117 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2727 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:30:09.117 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2727 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:30:14.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:30:14.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:30:14.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:30:14.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:30:14.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:30:14.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:30:14.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:30:14.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:30:14.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:14.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:30:14.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:30:14.130 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:30:14.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:30:14.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:30:14.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:14.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:30:14.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:30:14.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:30:14.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:30:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:30:14.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:30:14.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:30:14.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:30:14.133 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:30:14.133 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:30:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:14.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:30:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:30:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:30:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:30:14.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:30:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:30:14.136 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:30:14.136 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:30:14.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:30:14.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:30:14.656 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:30:14.657 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:30:14.658 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:30:14.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:14.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:14.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:14.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:14.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:14.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:14.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:14.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:14.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:14.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:14.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:14.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:14.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:14.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:14.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:14.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:14.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:14.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:14.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:14.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:14.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:14.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:14.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:14.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:14.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:14.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:14.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:14.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:14.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:14.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:14.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:14.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:14.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:14.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:14.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:14.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.092 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:30:15.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:15.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:15.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:15.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:15.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:15.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:15.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:15.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:15.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:15.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:15.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:15.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:15.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:15.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:15.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:15.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:15.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:15.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:15.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:15.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.563 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:30:15.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:15.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:15.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:15.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:15.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:15.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:15.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:15.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:15.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:15.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:15.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:15.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:15.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:15.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:15.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:15.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:15.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:15.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:30:16.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:16.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:16.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:30:16.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:16.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:16.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:16.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:16.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:30:16.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:30:16.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:30:16.598 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:30:21.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:30:21.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:30:21.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:30:21.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:30:21.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:30:21.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:30:21.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:30:21.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:30:21.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:21.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:30:21.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:30:21.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:30:21.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:30:21.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:30:21.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:21.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:30:21.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:30:21.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:30:21.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:30:21.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:21.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:30:21.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:30:21.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:30:21.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:21.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:30:21.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:30:21.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:30:21.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:30:21.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:21.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:30:21.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:30:21.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:30:21.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:30:21.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:30:21.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:30:21.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:30:21.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:30:21.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:30:21.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:30:21.630 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:30:21.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:30:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:30:21.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:30:22.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:30:22.163 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:30:22.165 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:30:22.167 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:30:22.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:22.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:22.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:22.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:22.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:22.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:22.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:22.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:22.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:22.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:22.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:22.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:22.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:22.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:22.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:22.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:22.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:22.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:30:22.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:22.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:22.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:22.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:23.056 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:30:23.529 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:30:23.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:23.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:23.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:23.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:24.002 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:30:24.474 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:30:24.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:24.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:24.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:24.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:24.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:30:25.420 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:30:25.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:25.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:25.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:25.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:25.893 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:30:26.366 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:30:26.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:30:26.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:30:26.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:30:26.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:30:26.839 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:30:27.311 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:30:27.784 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:30:28.257 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:30:28.729 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:30:29.200 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:30:29.671 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:30:30.144 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:30:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:30:31.089 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:30:31.560 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:30:32.031 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:30:32.505 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:30:32.977 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:30:33.449 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:30:33.923 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:30:34.395 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:30:34.867 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:30:35.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:30:35.814 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:30:36.287 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:30:36.760 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:30:37.233 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:30:37.706 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:30:38.179 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:30:38.651 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:30:39.122 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:30:39.595 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:30:40.068 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:30:40.540 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:30:41.014 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:30:41.486 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:30:41.959 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:30:42.432 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:30:42.905 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:30:43.377 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:30:43.851 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:30:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:30:44.796 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:30:45.270 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:30:45.742 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:30:46.214 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:30:46.688 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:30:47.160 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:30:47.633 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:30:48.106 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:30:48.579 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:30:49.051 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:30:49.525 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:30:49.997 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:30:50.470 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:30:50.943 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:30:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:30:51.888 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:30:52.359 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:30:52.832 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:30:53.305 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:30:53.777 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:30:54.248 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:30:54.719 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:30:55.192 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:30:55.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:55.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:55.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:55.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:55.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:55.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:55.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:55.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:30:55.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:30:55.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:30:55.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:30:55.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:55.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:55.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:55.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:30:55.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:30:55.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:30:55.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:30:55.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:55.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:30:55.664 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:30:56.136 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:30:56.607 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:30:57.078 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:30:57.549 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:30:58.022 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:30:58.495 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:30:58.964 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:30:59.433 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:30:59.904 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:31:00.377 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:31:00.850 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:31:01.322 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:31:01.793 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:31:02.266 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:31:02.739 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:31:03.211 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:31:03.682 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:31:04.153 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:31:04.624 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:31:05.097 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:31:05.569 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:31:06.042 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:31:06.515 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:31:06.988 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:31:07.460 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:31:07.933 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:31:08.406 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:31:08.878 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:31:09.349 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:31:09.820 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:31:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:31:10.765 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:31:11.237 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:31:11.708 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:31:12.179 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:31:12.653 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:31:13.125 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:31:13.597 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:31:14.068 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:31:14.542 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:31:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:31:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:31:15.957 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:31:16.428 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:31:16.899 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:31:17.372 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:31:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:31:18.316 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:31:18.787 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:31:19.258 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:31:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:31:20.204 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:31:20.676 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:31:21.150 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:31:21.622 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 02:31:22.094 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 02:31:22.565 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 02:31:23.039 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 02:31:23.511 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 02:31:23.983 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 02:31:24.457 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 02:31:24.929 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 02:31:25.402 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 02:31:25.875 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 02:31:26.348 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 02:31:26.820 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 02:31:27.293 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 02:31:27.766 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 02:31:28.238 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 02:31:28.709 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 02:31:28.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:31:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:31:28.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:31:28.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:31:28.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:31:28.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:31:28.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:31:28.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:31:28.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:31:28.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:31:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:31:28.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:31:28.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:31:28.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:31:28.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:31:28.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:31:28.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:31:28.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:31:28.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:31:28.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:31:29.180 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 02:31:29.650 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 02:31:30.124 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 02:31:30.596 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 02:31:31.068 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 02:31:31.542 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 02:31:32.014 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 02:31:32.486 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 02:31:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 02:31:33.431 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 02:31:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 02:31:34.375 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 02:31:34.846 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 02:31:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 02:31:35.790 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 02:31:36.262 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 02:31:36.734 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 02:31:37.205 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 02:31:37.676 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 02:31:38.150 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 02:31:38.622 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 02:31:39.094 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 02:31:39.565 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 02:31:40.039 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 02:31:40.511 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 02:31:40.983 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 02:31:41.454 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 02:31:41.925 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 02:31:42.398 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 02:31:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 02:31:43.343 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 02:31:43.813 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 02:31:44.284 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 02:31:44.757 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 02:31:45.230 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 02:31:45.702 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 02:31:46.173 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 02:31:46.644 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 02:31:47.117 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 02:31:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-02 02:31:48.062 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-02 02:31:48.533 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-02 02:31:49.004 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-02 02:31:49.477 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-02 02:31:49.950 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-02 02:31:50.422 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-02 02:31:50.893 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-02 02:31:51.366 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-02 02:31:51.838 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-02 02:31:52.310 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-03-02 02:31:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-03-02 02:31:53.255 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-03-02 02:31:53.727 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-03-02 02:31:54.200 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-03-02 02:31:54.670 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-03-02 02:31:55.144 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-03-02 02:31:55.616 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-03-02 02:31:56.088 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-03-02 02:31:56.559 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-03-02 02:31:57.033 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-03-02 02:31:57.505 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-03-02 02:31:57.977 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-03-02 02:31:58.448 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-03-02 02:31:58.919 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-03-02 02:31:59.389 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-03-02 02:31:59.860 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-03-02 02:32:00.334 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-03-02 02:32:00.806 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-03-02 02:32:01.278 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-03-02 02:32:01.749 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-03-02 02:32:02.220 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-03-02 02:32:02.694 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-03-02 02:32:03.166 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-03-02 02:32:03.638 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-03-02 02:32:03.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:03.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:03.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:03.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:04.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:04.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:04.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:04.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:04.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:04.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:04.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:04.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:04.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:04.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:04.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:32:04.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:32:04.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:04.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:04.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:04.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:04.109 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-03-02 02:32:04.580 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-03-02 02:32:05.053 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-03-02 02:32:05.525 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-03-02 02:32:05.998 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-03-02 02:32:06.471 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-03-02 02:32:06.944 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-03-02 02:32:07.416 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-03-02 02:32:07.887 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-03-02 02:32:08.360 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-03-02 02:32:08.832 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-03-02 02:32:09.304 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-03-02 02:32:09.775 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-03-02 02:32:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-03-02 02:32:10.721 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-03-02 02:32:11.193 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-03-02 02:32:11.664 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-03-02 02:32:12.137 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-03-02 02:32:12.609 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-03-02 02:32:13.082 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-03-02 02:32:13.552 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-03-02 02:32:14.026 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-03-02 02:32:14.498 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-03-02 02:32:14.970 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-03-02 02:32:15.441 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-03-02 02:32:15.914 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-03-02 02:32:16.387 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-03-02 02:32:16.859 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-03-02 02:32:17.330 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-03-02 02:32:17.803 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-03-02 02:32:18.276 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-03-02 02:32:18.748 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-03-02 02:32:19.219 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-03-02 02:32:19.693 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-03-02 02:32:20.165 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-03-02 02:32:20.637 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-03-02 02:32:21.108 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-03-02 02:32:21.579 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-03-02 02:32:22.052 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-03-02 02:32:22.524 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-03-02 02:32:22.996 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-03-02 02:32:23.467 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-03-02 02:32:23.941 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-03-02 02:32:24.413 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-03-02 02:32:24.885 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-03-02 02:32:25.356 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-03-02 02:32:25.827 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-03-02 02:32:26.300 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-03-02 02:32:26.773 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-03-02 02:32:27.245 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-03-02 02:32:27.716 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-03-02 02:32:28.189 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-03-02 02:32:28.662 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-03-02 02:32:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-03-02 02:32:29.605 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-03-02 02:32:30.078 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-03-02 02:32:30.551 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-03-02 02:32:31.022 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-03-02 02:32:31.494 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-03-02 02:32:31.964 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-03-02 02:32:32.437 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-03-02 02:32:32.910 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-03-02 02:32:33.382 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-03-02 02:32:33.853 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-03-02 02:32:34.324 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-03-02 02:32:34.797 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-03-02 02:32:35.270 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-03-02 02:32:35.742 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-03-02 02:32:36.213 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-03-02 02:32:36.686 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-03-02 02:32:37.158 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-03-02 02:32:37.631 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-03-02 02:32:38.101 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-03-02 02:32:38.575 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-03-02 02:32:39.047 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-03-02 02:32:39.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:39.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:39.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:39.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:39.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:39.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:39.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:32:39.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:32:39.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:32:39.343 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:32:39.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:32:39.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:32:39.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:32:39.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=29748 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:32:39.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=29748 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:32:39.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=29748 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:32:39.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=29748 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:32:39.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=29748 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:32:39.344 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=29748 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:32:44.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:32:44.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:32:44.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:32:44.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:32:44.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:32:44.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:32:44.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:32:44.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:32:44.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:44.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:32:44.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:32:44.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:32:44.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:32:44.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:32:44.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:44.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:32:44.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:32:44.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:32:44.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:32:44.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:44.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:32:44.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:32:44.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:32:44.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:32:44.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:32:44.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:32:44.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:32:44.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:44.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:32:44.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:32:44.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:32:44.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:44.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:32:44.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:32:44.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:32:44.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:32:44.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:32:44.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:32:44.372 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:32:44.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:32:44.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:32:44.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:32:44.374 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:32:44.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:32:49.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:32:49.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:32:49.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:32:49.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:32:49.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:32:49.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:32:49.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:32:49.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:32:49.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:49.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:32:49.392 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:32:49.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:32:49.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:32:49.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:32:49.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:49.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:32:49.396 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:32:49.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:32:49.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:32:49.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:49.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:32:49.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:32:49.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:32:49.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:49.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:32:49.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:32:49.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:32:49.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:32:49.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:49.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:32:49.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:32:49.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:32:49.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:32:49.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:32:49.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:32:49.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:32:49.401 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:32:49.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:49.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:32:49.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:32:49.404 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:32:49.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:32:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:32:49.408 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:32:49.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:32:49.922 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:32:49.923 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:32:49.923 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:32:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:49.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:49.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:49.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:49.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:49.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:49.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:49.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:49.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:49.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:49.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:49.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:32:49.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:32:49.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:49.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:49.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:49.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:50.359 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:32:50.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:50.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:50.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:50.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:50.831 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:32:51.304 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:32:51.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:51.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:51.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:51.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:51.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:51.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:51.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:51.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:51.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:51.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:51.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:51.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:51.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:51.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:51.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:51.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:51.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:51.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:51.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:32:51.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:32:51.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:51.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:51.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:51.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:51.776 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:32:52.249 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:32:52.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:52.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:52.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:52.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:52.720 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:32:53.193 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:32:53.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:53.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:53.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:53.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:53.666 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:32:53.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:53.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:53.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:53.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:53.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:53.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:53.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:53.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:53.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:53.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:53.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:53.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:53.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:53.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:32:53.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:32:53.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:53.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:53.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:53.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:54.137 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:32:54.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:32:54.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:32:54.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:32:54.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:32:54.609 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:32:55.080 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:32:55.553 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:32:56.025 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:32:56.498 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:32:56.968 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:32:57.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:57.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:57.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:57.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:57.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:57.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:57.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:57.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:32:57.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:32:57.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:32:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:32:57.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:57.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:57.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:57.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:32:57.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:32:57.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:32:57.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:32:57.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:57.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:32:57.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:32:57.913 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:32:58.385 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:32:58.857 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:32:59.328 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:32:59.801 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:33:00.274 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:33:00.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:00.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:00.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:00.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:00.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:00.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:00.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:00.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:00.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:33:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:33:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:33:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:33:00.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:33:00.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:33:00.614 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:33:00.614 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2421 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:33:00.615 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2421 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:33:00.615 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2421 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:33:00.615 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2421 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:33:00.615 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2421 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:33:00.615 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2421 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:33:05.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:33:05.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:33:05.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:33:05.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:33:05.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:33:05.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:33:05.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:33:05.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:33:05.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:33:05.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:33:05.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:33:05.629 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:33:05.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:33:05.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:33:05.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:33:05.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:33:05.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:33:05.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:33:05.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:33:05.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:05.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:33:05.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:33:05.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:33:05.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:33:05.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:33:05.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:33:05.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:33:05.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:33:05.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:33:05.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:33:05.638 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:33:05.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:33:05.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:33:05.643 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:33:05.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:33:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:33:06.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:33:06.163 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:33:06.165 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:33:06.165 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:33:06.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:06.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:06.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:06.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:06.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:06.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:06.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:06.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:06.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:06.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:06.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:06.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:33:06.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:33:06.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:06.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:06.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:06.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:06.598 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:33:06.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:06.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:06.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:06.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:07.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:33:07.544 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:33:07.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:07.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:07.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:07.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:08.017 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:33:08.490 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:33:08.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:08.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:08.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:08.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:08.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:33:09.435 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:33:09.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:09.906 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:33:10.379 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:33:10.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:33:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:33:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:33:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:33:10.852 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:33:11.324 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:33:11.798 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:33:12.270 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:33:12.743 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:33:13.216 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:33:13.689 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:33:14.161 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:33:14.635 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:33:15.107 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:33:15.580 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:33:16.050 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:33:16.524 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:33:16.996 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:33:17.469 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:33:17.940 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:33:18.413 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:33:18.886 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:33:19.358 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:33:19.829 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:33:20.300 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:33:20.773 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:33:21.246 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:33:21.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:21.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:21.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:21.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:21.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:21.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:21.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:21.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:21.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:21.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:21.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:21.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:21.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:21.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:33:21.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:33:21.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:21.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:21.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:21.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:21.718 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:33:22.189 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:33:22.660 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:33:23.131 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:33:23.604 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:33:24.077 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:33:24.549 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:33:25.020 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:33:25.493 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:33:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:33:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:33:26.909 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:33:27.380 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:33:27.853 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:33:28.326 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:33:28.798 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:33:29.269 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:33:29.740 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:33:30.210 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:33:30.681 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:33:31.152 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:33:31.625 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:33:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:33:32.570 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:33:33.044 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:33:33.516 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:33:33.988 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:33:34.459 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:33:34.930 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:33:35.401 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:33:35.872 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:33:36.342 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:33:36.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:36.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:36.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:36.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:36.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:36.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:36.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:36.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:36.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:36.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:36.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:36.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:36.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:36.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:36.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:33:36.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:33:36.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:36.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:36.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:36.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:36.814 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:33:37.287 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:33:37.759 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:33:38.229 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:33:38.702 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:33:39.174 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:33:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:33:40.116 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:33:40.589 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:33:41.061 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:33:41.533 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:33:42.004 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:33:42.478 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:33:42.950 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:33:43.422 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:33:43.893 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:33:44.364 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:33:44.835 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:33:45.308 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:33:45.781 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:33:46.253 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:33:46.724 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:33:47.197 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:33:47.670 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:33:48.142 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:33:48.613 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:33:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:33:49.559 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:33:50.031 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:33:50.502 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:33:50.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:50.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:50.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:50.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:50.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:50.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:50.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:33:50.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:33:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:33:50.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:33:50.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:50.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:50.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:50.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:33:50.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:33:50.972 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:33:51.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:33:51.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:33:51.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:51.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:33:51.443 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:33:51.917 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:33:52.389 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:33:52.861 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:33:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:33:53.805 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:33:54.278 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:33:54.750 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:33:55.221 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:33:55.694 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:33:56.166 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:33:56.638 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:33:57.109 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:33:57.583 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:33:58.055 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:33:58.527 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:33:58.998 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:33:59.472 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:33:59.944 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:34:00.416 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:34:00.886 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:34:01.360 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:34:01.832 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:34:02.304 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:34:02.775 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:34:03.249 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:34:03.721 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:34:04.193 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:34:04.664 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:34:05.135 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:34:05.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:05.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:05.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:05.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:05.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:05.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:05.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:05.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:05.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:05.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:34:05.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:34:05.549 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:34:05.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:05.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:05.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:05.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=12944 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:10.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:34:10.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:34:10.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:10.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:10.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:10.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:10.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:10.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:34:10.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:10.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:34:10.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:34:10.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:34:10.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:34:10.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:34:10.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:10.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:10.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:34:10.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:34:10.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:34:10.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:10.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:34:10.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:34:10.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:34:10.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:10.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:10.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:34:10.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:34:10.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:34:10.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:34:10.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:34:10.574 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:34:10.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:34:10.577 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:34:10.577 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:34:10.577 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:10.582 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:34:11.060 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:34:11.098 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:34:11.099 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:34:11.101 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:34:11.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:11.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:11.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:11.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:11.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:11.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:11.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:11.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:11.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:11.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:11.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:11.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:11.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:11.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:11.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:11.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:11.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:11.530 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:34:11.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:11.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:11.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:11.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:12.004 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:34:12.476 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:34:12.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:12.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:12.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:12.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:12.949 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:34:13.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:34:13.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:13.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:13.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:13.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:13.894 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:34:14.367 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:34:14.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:14.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:14.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:14.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:14.841 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:34:15.313 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:34:15.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:15.787 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:34:16.259 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:34:16.732 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:34:17.203 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:34:17.676 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:34:18.149 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:34:18.621 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:34:19.092 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:34:19.566 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:34:20.038 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:34:20.510 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:34:20.981 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:34:21.455 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:34:21.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:21.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:21.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:21.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:21.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:21.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:21.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:21.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:21.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:21.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:21.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:21.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:21.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:21.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:21.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:21.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:21.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:21.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:21.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:21.927 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:34:22.399 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:34:22.870 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:34:23.341 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:34:23.812 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:34:24.285 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:34:24.758 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:34:25.230 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:34:25.704 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:34:26.176 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:34:26.648 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:34:27.119 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:34:27.590 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:34:28.060 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:34:28.531 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:34:29.002 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:34:29.473 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:34:29.944 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:34:30.417 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:34:30.889 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:34:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:34:31.832 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:34:31.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:31.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:32.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:32.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:32.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:32.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:32.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:32.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:32.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:32.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:32.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:32.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:32.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:32.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:32.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:32.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:32.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:32.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:32.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:32.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:32.305 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:34:32.778 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:34:33.250 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:34:33.721 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:34:34.194 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:34:34.667 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:34:35.139 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:34:35.610 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:34:36.081 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:34:36.551 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:34:37.025 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:34:37.497 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:34:37.969 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:34:38.440 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:34:38.914 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:34:38.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:38.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:38.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:38.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:38.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:38.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:38.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:38.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:38.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:38.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:38.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:38.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:38.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:38.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:38.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:38.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:39.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:39.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:39.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:39.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:39.386 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:34:39.858 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:34:40.329 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:34:40.802 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:34:41.275 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:34:41.747 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:34:42.218 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:34:42.691 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:34:43.164 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:34:43.636 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:34:44.109 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:34:44.582 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:34:45.053 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:34:45.525 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:34:45.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:45.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:45.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:45.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:45.998 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:34:46.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:46.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:46.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:46.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:46.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:46.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:46.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:46.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:46.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:34:46.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:34:46.009 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:34:46.009 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7655 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:46.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7655 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:46.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7655 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:46.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7655 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:46.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7655 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:46.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7655 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:34:51.012 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:34:51.012 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:34:51.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:51.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:51.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:51.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:51.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:51.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:34:51.020 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:51.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:34:51.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:34:51.023 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:34:51.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:34:51.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:34:51.024 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:51.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:51.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:34:51.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:34:51.026 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:34:51.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:51.029 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:34:51.029 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:34:51.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:34:51.030 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:51.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:51.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:34:51.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:34:51.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:34:51.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:51.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:34:51.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:34:51.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:34:51.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:51.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:51.035 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:34:51.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:34:51.035 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:34:51.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:51.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:34:51.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:34:51.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:34:51.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:34:51.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:34:51.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:34:51.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:34:51.041 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:34:51.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:51.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:51.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:34:51.524 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:34:51.572 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:34:51.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:51.575 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:34:51.579 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:34:51.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:51.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:51.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:51.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:51.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:51.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:51.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:51.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:51.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:51.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:51.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:51.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:51.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:51.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:51.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:51.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:51.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:51.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:51.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:51.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:51.996 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:34:52.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:52.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:52.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:52.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:52.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:52.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:52.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:52.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:52.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:52.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:52.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:52.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:52.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:52.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:52.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:52.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:52.467 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:34:52.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:52.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:52.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:52.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:52.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:52.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:52.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:52.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:52.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:52.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:52.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:52.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:52.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:52.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:52.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:52.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:52.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:52.938 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:34:53.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:53.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:53.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:53.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:53.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:53.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:53.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:53.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:53.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:53.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:53.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:53.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:53.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:53.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:53.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:53.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:53.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:53.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:53.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:53.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:53.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:53.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:53.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:53.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:53.410 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:34:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:34:54.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:54.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:54.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:54.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:54.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:54.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:54.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:54.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:54.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:54.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:54.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:54.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:54.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:54.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:34:54.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:34:54.214 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:34:59.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:34:59.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:34:59.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:59.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:59.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:59.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:59.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:34:59.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:34:59.231 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:59.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:34:59.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:34:59.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:34:59.238 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:34:59.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:34:59.238 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:59.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:34:59.239 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:34:59.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:34:59.240 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:34:59.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:34:59.242 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:34:59.243 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:34:59.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:34:59.243 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:59.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:34:59.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:34:59.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:34:59.244 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:34:59.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:34:59.247 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:34:59.247 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:34:59.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:34:59.247 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:34:59.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:34:59.247 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:34:59.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:34:59.248 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:34:59.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:34:59.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:34:59.252 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:34:59.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:34:59.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:34:59.736 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:34:59.781 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:34:59.782 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:34:59.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:59.783 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:34:59.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:59.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:59.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:59.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:34:59.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:34:59.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:34:59.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:34:59.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:59.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:59.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:59.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:34:59.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:34:59.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:34:59.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:34:59.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:34:59.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:00.208 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:35:00.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:00.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:00.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:00.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:00.679 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:35:01.153 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:35:01.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:01.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:01.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:01.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:01.625 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:35:02.098 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:35:02.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:02.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:02.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:02.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:02.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:35:03.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:03.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:03.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:03.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:03.042 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:35:03.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:03.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:03.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:03.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:03.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:03.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:03.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:03.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:03.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:03.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:03.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:03.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:03.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:03.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:03.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:03.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:03.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:03.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:03.514 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:35:03.986 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:35:04.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:04.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:04.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:04.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:04.457 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:35:04.927 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:35:05.398 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:35:05.869 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:35:06.340 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:35:06.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:06.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:06.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:06.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:06.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:06.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:06.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:06.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:06.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:06.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:06.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:06.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:06.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:06.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:06.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:06.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:06.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:06.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:06.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:06.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:06.811 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:35:07.281 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:35:07.754 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:35:08.227 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:35:08.699 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:35:09.170 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:35:09.641 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:35:10.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:10.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:10.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:10.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:10.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:10.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:10.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:10.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:10.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:10.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:10.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:10.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:10.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:10.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:10.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:10.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:10.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:10.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:10.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:10.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:10.113 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:35:10.586 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:35:11.058 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:35:11.529 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:35:12.003 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:35:12.475 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:35:12.947 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:35:13.421 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:35:13.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:13.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:13.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:13.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:13.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:13.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:13.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:13.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:13.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:13.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:13.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:13.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:13.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:35:13.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:35:13.749 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:35:18.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:35:18.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:35:18.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:18.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:18.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:18.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:18.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:18.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:35:18.781 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:18.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:35:18.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:35:18.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:35:18.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:35:18.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:35:18.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:18.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:18.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:35:18.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:35:18.789 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:35:18.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:18.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:35:18.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:35:18.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:35:18.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:18.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:18.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:35:18.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:35:18.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:35:18.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:18.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:35:18.798 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:35:18.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:35:18.798 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:18.799 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:35:18.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:35:18.799 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:35:18.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:35:18.803 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:35:18.803 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:35:18.803 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:18.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:18.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:35:19.285 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:35:19.326 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:35:19.328 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:35:19.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:19.330 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:35:19.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:19.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:19.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:19.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:19.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:19.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:19.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:19.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:19.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:19.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:19.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:19.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:19.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:19.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:19.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:19.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:19.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:19.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:19.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:19.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:19.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:19.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:19.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:19.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:19.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:19.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:19.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:19.758 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:35:19.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:19.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:19.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:19.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:19.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:19.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:19.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:20.229 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:35:20.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:20.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:20.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:20.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:20.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:20.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:20.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:20.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:20.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:20.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:20.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:20.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:20.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:20.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:20.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:20.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:20.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:20.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:20.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:20.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:20.702 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:35:20.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:20.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:20.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:20.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:21.174 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:35:21.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:21.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:21.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:21.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:21.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:21.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:21.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:21.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:21.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:21.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:21.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:21.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:21.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:21.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:21.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:21.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:21.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:21.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:21.646 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:35:21.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:21.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:21.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:21.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:22.117 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:35:22.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:22.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:22.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:22.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:22.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:35:22.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:35:22.445 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:35:22.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:22.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:27.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:35:27.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:35:27.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:27.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:27.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:27.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:27.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:27.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:35:27.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:27.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:35:27.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:35:27.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:35:27.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:35:27.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:35:27.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:27.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:27.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:35:27.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:35:27.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:35:27.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:27.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:35:27.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:35:27.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:35:27.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:27.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:27.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:35:27.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:35:27.473 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:35:27.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:27.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:35:27.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:35:27.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:35:27.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:27.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:27.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:35:27.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:35:27.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:35:27.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:35:27.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:35:27.479 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:35:27.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:27.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:35:27.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:35:28.003 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:35:28.006 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:35:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:28.008 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:35:28.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:28.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:28.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:28.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:28.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:28.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:28.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:28.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:28.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:28.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:28.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:28.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:28.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:28.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:28.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:28.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:28.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:35:28.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:28.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:28.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:28.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:28.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:35:29.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:35:29.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:29.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:29.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:29.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:29.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:35:30.324 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:35:30.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:30.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:30.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:30.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:30.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:35:30.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:30.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:30.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:30.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:30.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:30.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:30.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:30.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:30.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:30.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:30.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:30.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:30.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:30.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:30.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:30.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:30.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:30.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:30.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:30.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:31.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:35:31.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:31.738 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:35:32.208 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:35:32.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:32.679 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:35:33.150 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:35:33.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:35:34.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:35:34.562 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:35:35.036 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:35:35.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:35.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:35.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:35.508 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:35:35.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:35.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:35.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:35.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:35.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:35.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:35.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:35.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:35.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:35.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:35.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:35.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:35.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:35.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:35.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:35.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:35.980 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:35:36.451 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:35:36.922 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:35:37.393 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:35:37.866 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:35:38.338 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:35:38.811 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:35:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:35:39.752 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:35:40.226 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:35:40.698 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:35:41.170 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:35:41.641 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:35:42.112 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:35:42.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:42.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:42.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:42.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:42.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:42.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:42.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:42.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:42.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:42.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:42.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:42.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:42.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:42.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:42.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:42.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:42.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:42.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:42.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:42.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:42.582 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:35:43.053 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:35:43.527 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:35:43.999 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:35:44.471 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:35:44.942 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:35:45.415 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:35:45.888 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:35:46.359 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:35:46.831 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:35:47.304 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:35:47.776 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:35:48.249 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:35:48.722 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:35:49.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:49.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:49.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:49.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:49.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:49.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:49.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:49.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:49.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:49.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:49.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:49.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:49.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:35:49.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:35:49.057 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:35:49.057 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:35:49.057 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:35:54.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:35:54.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:35:54.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:54.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:54.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:54.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:54.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:35:54.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:35:54.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:54.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:35:54.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:35:54.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:35:54.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:35:54.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:35:54.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:54.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:35:54.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:35:54.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:35:54.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:35:54.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:54.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:35:54.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:35:54.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:35:54.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:54.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:35:54.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:35:54.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:35:54.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:35:54.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:35:54.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:35:54.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:35:54.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:35:54.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:35:54.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:35:54.088 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:35:54.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:35:54.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:35:54.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:35:54.623 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:35:54.624 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:35:54.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:54.627 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:35:54.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:54.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:54.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:54.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:54.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:54.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:54.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:54.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:54.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:54.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:54.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:54.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:54.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:54.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:54.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:54.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:55.043 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:35:55.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:55.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:55.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:55.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:55.514 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:35:55.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:35:56.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:56.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:56.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:56.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:56.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:56.458 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:35:56.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:56.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:56.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:56.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:56.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:56.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:56.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:56.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:56.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:56.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:56.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:56.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:56.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:56.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:56.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:56.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:56.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:35:57.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:57.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:57.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:57.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:57.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:35:57.873 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:35:58.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:58.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:58.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:58.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:58.344 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:35:58.817 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:35:59.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:35:59.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:35:59.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:35:59.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:35:59.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:59.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:59.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:59.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:59.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:59.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:59.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:59.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:35:59.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:35:59.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:35:59.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:35:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:59.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:59.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:59.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:35:59.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:35:59.289 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:35:59.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:35:59.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:35:59.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:59.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:35:59.762 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:36:00.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:36:00.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:36:01.176 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:36:01.649 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:36:02.121 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:36:02.592 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:36:03.065 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:36:03.538 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:36:03.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:36:03.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:03.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:36:03.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:36:03.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:36:03.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:36:03.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:36:03.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:36:03.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:36:03.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:36:03.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:03.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:36:03.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:36:03.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:36:03.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:36:03.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:36:03.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:36:03.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:36:03.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:36:03.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:36:04.010 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:36:04.481 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:36:04.952 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:36:05.425 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:36:05.898 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:36:06.370 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:36:06.843 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:36:07.315 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:36:07.787 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:36:08.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:36:08.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:08.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:36:08.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:36:08.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:08.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:08.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:08.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:08.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:08.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:08.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:08.123 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:08.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:08.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:08.124 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:08.124 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:08.124 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:08.124 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:08.124 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:13.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:13.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:13.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:13.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:13.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:13.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:13.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:13.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:13.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:13.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:13.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:13.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:13.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:13.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:13.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:13.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:13.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:13.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:13.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:13.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:13.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:13.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:13.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:13.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:13.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:13.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:13.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:13.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:13.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:13.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:13.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:13.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:13.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:13.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:13.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:13.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:13.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:13.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:13.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:13.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:13.160 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:13.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:13.164 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:13.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:13.687 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:13.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:13.690 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:13.692 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:13.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:13.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:14.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:14.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:14.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:14.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:14.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.585 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:14.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:14.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:15.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:15.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:15.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:15.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:15.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:15.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:15.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:15.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:15.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:15.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:15.026 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:15.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:15.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:20.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:20.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:20.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:20.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:20.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:20.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:20.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:20.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:20.037 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:20.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:20.037 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:20.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:20.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:20.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:20.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:20.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:20.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:20.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:20.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:20.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:20.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:20.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:20.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:20.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:20.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:20.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:20.043 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:20.043 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:20.043 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:20.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:20.048 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:20.563 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:20.565 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:20.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.567 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:20.997 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:21.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:21.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:21.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:21.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:21.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:21.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:21.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:21.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:21.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:21.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:21.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:21.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:21.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:21.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:21.914 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:26.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:26.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:26.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:26.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:26.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:26.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:26.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:26.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:26.924 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:26.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:26.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:26.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:26.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:26.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:26.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:26.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:26.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:26.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:26.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:26.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:26.927 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:26.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:26.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:26.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:26.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:26.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.930 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:26.930 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:26.930 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:26.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:26.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:27.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:27.452 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:27.453 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:27.454 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:27.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:27.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:27.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:27.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:27.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:27.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:28.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:28.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:28.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:28.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:28.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:28.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:28.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:28.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:28.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:28.798 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:28.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:28.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:28.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:28.798 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:33.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:33.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:33.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:33.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:33.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:33.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:33.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:33.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:33.809 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:33.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:33.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:33.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:33.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:33.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:33.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:33.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:33.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:33.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:33.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:33.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:33.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:33.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:33.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:33.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:33.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:33.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:33.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:33.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:33.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:33.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:33.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:33.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:33.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:33.828 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:33.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:33.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:34.311 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:34.374 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:34.376 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:34.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.378 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:34.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:34.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:34.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:34.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:34.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:34.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:35.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:35.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:35.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:35.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:35.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:35.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:35.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:35.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:35.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:35.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:35.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:35.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:35.712 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:40.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:40.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:40.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:40.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:40.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:40.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:40.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:40.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:40.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:40.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:40.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:40.730 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:40.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:40.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:40.730 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:40.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:40.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:40.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:40.731 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:40.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:40.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:40.735 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:40.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:40.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:40.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:40.735 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:40.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:40.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:40.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:40.739 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:40.740 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:40.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:40.740 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:40.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:40.740 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:40.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:40.740 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:40.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:40.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:40.747 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:40.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:40.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:41.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:41.272 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:41.275 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:41.276 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:41.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:41.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.701 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:41.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:41.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:41.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:41.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:41.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:41.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:42.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:42.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:42.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:42.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:42.598 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:42.598 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:42.598 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:42.598 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:42.598 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:42.598 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:42.598 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:47.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:47.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:47.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:47.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:47.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:47.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:47.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:47.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:47.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:47.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:47.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:47.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:47.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:47.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:47.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:47.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:47.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:47.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:47.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:47.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:47.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:47.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:47.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:47.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:47.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:47.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:47.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:47.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:47.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:47.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:47.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:47.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:47.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:47.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:47.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:47.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:47.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:47.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:47.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:47.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:47.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:47.634 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:47.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:47.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:48.168 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:48.170 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:48.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.171 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:48.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:48.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:48.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:48.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:48.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:48.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:49.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:49.524 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:36:49.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:49.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:49.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:49.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:49.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:49.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:49.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:49.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:49.534 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:49.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:49.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:49.534 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.534 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:49.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:54.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:54.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:54.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:54.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:54.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:54.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:54.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:54.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:54.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:54.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:36:54.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:36:54.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:36:54.550 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:36:54.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:54.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:54.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:54.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:36:54.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:36:54.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:36:54.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:54.554 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:36:54.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:36:54.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:54.554 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:54.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:54.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:36:54.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:36:54.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:36:54.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:54.556 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:36:54.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:36:54.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:54.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:36:54.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:54.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:36:54.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:36:54.557 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:36:54.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:36:54.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:36:54.561 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:36:54.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:36:54.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:36:54.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:36:54.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:54.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:36:55.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:36:55.089 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:36:55.092 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:36:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.094 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:36:55.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:36:55.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:36:55.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:55.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:55.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:55.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:55.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:55.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:36:56.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:36:56.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:36:56.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:36:56.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:36:56.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:36:56.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:36:56.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:36:56.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:36:56.427 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:36:56.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:36:56.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:36:56.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:36:56.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:01.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:01.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:01.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:01.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:01.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:01.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:01.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:01.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:01.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:01.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:01.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:01.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:01.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:01.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:01.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:01.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:01.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:01.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:01.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:01.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:01.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:01.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:01.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:01.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:01.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:01.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:01.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:01.442 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:01.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:01.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:01.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:01.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:01.954 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:01.955 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:01.956 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:01.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:01.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:02.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:02.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:02.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:02.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:02.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:02.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:02.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:02.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:02.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:02.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:02.015 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:07.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:07.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:07.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:07.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:07.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:07.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:07.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:07.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:07.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:07.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:07.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:07.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:07.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:07.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:07.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:07.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:07.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:07.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:07.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:07.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:07.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:07.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:07.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:07.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:07.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:07.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:07.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:07.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:07.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:07.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:07.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:07.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:07.028 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:07.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:07.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:07.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:07.028 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:07.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:07.029 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:07.029 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:07.029 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:07.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:07.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:07.034 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:07.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:07.548 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:07.548 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:07.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.549 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:07.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:07.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:07.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:07.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:07.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:07.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:07.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:07.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:07.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:07.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:07.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:07.654 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:07.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:12.656 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:12.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:12.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:12.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:12.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:12.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:12.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:12.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:12.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:12.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:12.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:12.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:12.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:12.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:12.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:12.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:12.664 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:12.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:12.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:12.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:12.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:12.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:12.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:12.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:12.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.667 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:12.667 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:12.667 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:12.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:12.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:13.136 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:13.186 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:13.187 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:13.187 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:13.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:13.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:13.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:13.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:13.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:13.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:13.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:13.293 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:18.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:18.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:18.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:18.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:18.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:18.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:18.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:18.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:18.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:18.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:18.305 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:18.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:18.306 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:18.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:18.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:18.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:18.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:18.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:18.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:18.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:18.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:18.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:18.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:18.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:18.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:18.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:18.311 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:18.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:18.311 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:18.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:18.311 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:18.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:18.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:18.315 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:18.315 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:18.315 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:18.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:18.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:18.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:18.829 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:18.829 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:18.829 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:18.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:18.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:18.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:18.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:18.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:18.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:18.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:18.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:18.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:18.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:18.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:18.897 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:23.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:23.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:23.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:23.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:23.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:23.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:23.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:23.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:23.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:23.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:23.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:23.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:23.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:23.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:23.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:23.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:23.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:23.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:23.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:23.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:23.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:23.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:23.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:23.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:23.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:23.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:23.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:23.913 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:23.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:23.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:23.918 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:24.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:24.432 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:24.434 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:24.435 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:24.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:24.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:24.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:24.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:24.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:24.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:24.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:24.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:24.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:24.502 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:24.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:24.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:24.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:24.502 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:24.502 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:24.502 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:24.502 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:24.502 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:24.502 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:29.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:29.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:29.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:29.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:29.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:29.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:29.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:29.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:29.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:29.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:29.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:29.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:29.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:29.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:29.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:29.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:29.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:29.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:29.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:29.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:29.537 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:29.537 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:29.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:29.537 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:29.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:29.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:29.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:29.538 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:29.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:29.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:29.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:29.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:29.553 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:29.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:29.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:30.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:30.084 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:30.085 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:30.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.086 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:30.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:30.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:30.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:30.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:30.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:30.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:30.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:30.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:30.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:30.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:30.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:30.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:30.193 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:35.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:35.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:35.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:35.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:35.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:35.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:35.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:35.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:35.200 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:35.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:35.201 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:35.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:35.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:35.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:35.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:35.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:35.202 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:35.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:35.202 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:35.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:35.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:35.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:35.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:35.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:35.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:35.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:35.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:35.207 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:35.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:35.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:35.678 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:35.734 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:35.736 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:35.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.739 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:35.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:35.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:35.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:35.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:35.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:35.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:35.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:35.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:35.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:35.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:35.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:35.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:35.855 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:40.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:40.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:40.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:40.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:40.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:40.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:40.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:40.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:40.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:40.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:40.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:40.865 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:40.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:40.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:40.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:40.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:40.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:40.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:40.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:40.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.870 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:40.870 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:40.870 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:40.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:40.875 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:41.342 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:41.395 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:41.397 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:41.399 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:41.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:41.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:41.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:41.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:37:41.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:41.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:41.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:41.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:37:41.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:37:41.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:37:41.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:41.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:41.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:41.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:42.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:37:42.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:37:42.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:42.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:42.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:42.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:43.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:37:43.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:37:43.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:43.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:43.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:43.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:44.145 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:37:44.612 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:37:44.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:44.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:44.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:44.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:44.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:44.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:44.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:44.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:44.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:44.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:44.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:44.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:44.855 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:49.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:49.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:49.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:49.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:49.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:49.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:49.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:49.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:49.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:49.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:49.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:49.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:49.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:49.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:49.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:49.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:49.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:49.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:49.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:49.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:49.891 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:49.891 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:49.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:49.892 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:49.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:49.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:49.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:49.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:49.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:49.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:49.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:49.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:49.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:49.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:49.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:49.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:49.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:49.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:49.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:49.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:49.906 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:49.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:49.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:49.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:49.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:50.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:50.432 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:50.435 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:50.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:50.436 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:50.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:50.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:50.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:37:50.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:50.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:50.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:50.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:37:50.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:37:50.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:37:50.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:50.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:50.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:50.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:50.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:37:50.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:50.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:50.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:50.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:50.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:50.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:50.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:50.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:37:50.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:50.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:50.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:50.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:37:50.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:37:50.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:50.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:50.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:50.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:50.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:50.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:50.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:50.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:50.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:50.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:50.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:50.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:50.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:50.990 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:37:50.990 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:50.990 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:50.991 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:50.991 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:50.991 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:50.991 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:37:55.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:37:55.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:37:55.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:55.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:55.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:55.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:56.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:37:56.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:56.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:56.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:37:56.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:37:56.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:37:56.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:37:56.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:56.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:56.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:37:56.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:37:56.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:37:56.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:37:56.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:56.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:37:56.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:37:56.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:56.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:56.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:37:56.027 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:37:56.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:37:56.027 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:37:56.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:56.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:37:56.029 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:37:56.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:56.031 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:37:56.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:37:56.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:37:56.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:37:56.031 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:37:56.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:37:56.032 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:37:56.032 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:37:56.032 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:37:56.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:37:56.037 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:37:56.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:37:56.557 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:37:56.559 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:37:56.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:56.560 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:37:56.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:56.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:56.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:37:56.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:56.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:56.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:56.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:37:56.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:37:56.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:37:56.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:56.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:56.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:56.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:56.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:37:56.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:56.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:37:56.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:37:56.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:37:56.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:37:56.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:37:56.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:37:56.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:37:56.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:37:56.968 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:37:57.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:57.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:57.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:57.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:57.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:37:57.897 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:37:58.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:58.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:58.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:58.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:58.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:37:58.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:37:59.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:37:59.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:37:59.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:37:59.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:37:59.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:37:59.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:38:00.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:00.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:00.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:00.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:00.228 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:38:00.693 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:38:01.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:01.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:01.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:01.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:01.160 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:38:01.626 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:38:02.092 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:38:02.561 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:38:03.025 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:38:03.490 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:38:03.957 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:38:04.423 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:38:04.889 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:38:05.353 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:38:05.817 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:38:06.283 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:38:06.748 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:38:07.215 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:38:07.678 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:38:08.146 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:38:08.611 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:38:09.080 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:38:09.551 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:38:10.017 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:38:10.483 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:38:10.948 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:38:11.414 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:38:11.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:11.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:11.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:11.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:38:11.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:11.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:11.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:11.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:38:11.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:38:11.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:38:11.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:11.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:11.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:11.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:11.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:11.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:11.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:11.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:11.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:11.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:11.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:11.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:11.746 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:38:11.747 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:11.747 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:11.747 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:11.747 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:11.747 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:11.747 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:16.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:16.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:16.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:16.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:16.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:16.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:16.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:16.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:16.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:16.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:16.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:16.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:16.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:38:16.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:16.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:38:16.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:38:16.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:16.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:16.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:16.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:38:16.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:16.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:38:16.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:16.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:16.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:38:16.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:16.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:38:16.753 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:38:16.753 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:38:16.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:16.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:38:17.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:38:17.268 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:38:17.268 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:38:17.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:38:17.269 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:38:17.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:17.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:17.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:38:17.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:17.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:17.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:17.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:38:17.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:38:17.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:38:17.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:17.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:17.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:17.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:17.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:38:17.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:38:17.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:17.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:17.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:17.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:38:17.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:17.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:17.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:17.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:38:17.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:38:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:38:17.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:17.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:17.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:17.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:17.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:17.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:17.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:17.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:17.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:17.654 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:38:17.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:17.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:17.654 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:22.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:22.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:22.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:22.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:22.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:22.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:22.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:22.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:22.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:22.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:22.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:38:22.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:38:22.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:38:22.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:22.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:22.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:22.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:38:22.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:22.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:38:22.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:22.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:22.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:38:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:22.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:22.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:38:22.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:38:22.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:38:22.665 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:38:22.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:22.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:22.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:38:23.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:38:23.185 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:38:23.187 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:38:23.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:38:23.188 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:38:23.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:23.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:23.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:38:23.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:23.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:23.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:23.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:38:23.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:38:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:38:23.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:23.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:23.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:23.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:23.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:38:23.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:23.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:23.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:23.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:24.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:38:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:38:24.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:24.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:24.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:24.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:38:25.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:25.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:25.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:25.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:38:25.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:38:25.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:38:25.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:38:25.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:38:25.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:38:25.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:38:25.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:38:25.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:38:25.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:25.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:25.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:25.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:25.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:25.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:25.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:25.286 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:38:25.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:25.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:25.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=576 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=576 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:25.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:38:30.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:30.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:30.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:30.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:30.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:30.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:30.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:30.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:30.285 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:30.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:30.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:38:30.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:38:30.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:38:30.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:30.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:30.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:30.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:38:30.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:30.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:38:30.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:30.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:38:30.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:38:30.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:30.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:30.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:30.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:38:30.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:30.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:38:30.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:30.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:38:30.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:38:30.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:30.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:30.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:30.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:38:30.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:30.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:38:30.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:38:30.291 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:38:30.291 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:38:30.291 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:30.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:30.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:30.292 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:38:35.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:35.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:35.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:35.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:35.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:35.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:35.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:35.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:35.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:35.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:38:35.297 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:35.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:38:35.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:38:35.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:35.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:38:35.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:38:35.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:38:35.300 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:38:35.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:38:35.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:35.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:38:35.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:35.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:38:35.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:38:35.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:38:35.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:38:35.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:38:35.302 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:38:35.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:35.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:35.304 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:38:35.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:38:39.826 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.244.20:5700'
2026-03-02 02:38:39.827 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.244.20:5802)
2026-03-02 02:38:39.827 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.244.20:5801)
2026-03-02 02:38:39.827 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.244.22:6700'
2026-03-02 02:38:39.827 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.244.22:6802)
2026-03-02 02:38:39.827 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.244.22:6801)
2026-03-02 02:38:39.827 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.244.20:5700/1'
2026-03-02 02:38:39.827 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.244.20:5804)
2026-03-02 02:38:39.827 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.244.20:5803)
2026-03-02 02:38:39.827 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.244.20:5700/2'
2026-03-02 02:38:39.827 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.244.20:5806)
2026-03-02 02:38:39.827 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.244.20:5805)
2026-03-02 02:38:39.827 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.244.20:5700/3'
2026-03-02 02:38:39.827 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.244.20:5808)
2026-03-02 02:38:39.827 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.244.20:5807)
2026-03-02 02:38:39.827 [INFO] fake_trx.py:429 Init complete
2026-03-02 02:38:39.827 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-03-02 02:38:39.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:39.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:39.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:39.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:39.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:38:39.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:57.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:38:57.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:38:57.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:38:57.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:38:57.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:38:57.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:02.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:02.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:02.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:02.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:02.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:02.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:07.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:07.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:07.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:07.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:07.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:07.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:12.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:12.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:12.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:12.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:12.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:12.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:17.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:17.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:17.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:17.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:17.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:17.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:22.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:22.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:22.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:22.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:22.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:22.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:27.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:27.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:27.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:27.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:27.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:27.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:32.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:32.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:32.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:32.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:32.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:32.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:37.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:37.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:37.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:37.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:37.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:37.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:42.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:42.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:42.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:42.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:42.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:42.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:39:42.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:39:42.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:39:42.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:39:42.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 0 -> 1
2026-03-02 02:39:42.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:39:42.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:39:42.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:39:42.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:39:42.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 0 -> 1
2026-03-02 02:39:42.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:39:42.255 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 0 -> 1
2026-03-02 02:39:42.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:39:42.255 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 0 -> 1
2026-03-02 02:39:42.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:39:47.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:47.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:47.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:47.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:47.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:47.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:52.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:39:52.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:39:52.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:39:52.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:39:57.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:39:57.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:39:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:39:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:39:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:39:57.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:02.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:02.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:02.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:02.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:02.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:02.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:07.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:07.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:07.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:07.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:07.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:07.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:12.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:12.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:12.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:12.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:12.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:12.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:21.180 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.244.20:5700'
2026-03-02 02:40:21.180 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.244.20:5802)
2026-03-02 02:40:21.181 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.244.20:5801)
2026-03-02 02:40:21.181 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.244.22:6700'
2026-03-02 02:40:21.181 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.244.22:6802)
2026-03-02 02:40:21.181 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.244.22:6801)
2026-03-02 02:40:21.181 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.244.20:5700/1'
2026-03-02 02:40:21.181 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.244.20:5804)
2026-03-02 02:40:21.181 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.244.20:5803)
2026-03-02 02:40:21.181 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.244.20:5700/2'
2026-03-02 02:40:21.181 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.244.20:5806)
2026-03-02 02:40:21.181 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.244.20:5805)
2026-03-02 02:40:21.181 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.244.20:5700/3'
2026-03-02 02:40:21.181 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.244.20:5808)
2026-03-02 02:40:21.181 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.244.20:5807)
2026-03-02 02:40:21.181 [INFO] fake_trx.py:429 Init complete
2026-03-02 02:40:21.181 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-03-02 02:40:21.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:21.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:21.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:21.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:21.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:21.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:25.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:25.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:25.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:25.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:25.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 0 -> 1
2026-03-02 02:40:25.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:40:25.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:40:25.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:25.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:25.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:25.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:40:25.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:25.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 0 -> 1
2026-03-02 02:40:25.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:25.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:40:25.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:40:25.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:25.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:25.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:25.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:40:25.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:25.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 0 -> 1
2026-03-02 02:40:25.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:25.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:40:25.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:40:25.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:25.448 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:25.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:25.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:40:25.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:25.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 0 -> 1
2026-03-02 02:40:25.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:40:25.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:40:25.451 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:40:25.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:25.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:40:25.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:40:25.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:25.973 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:40:25.974 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:40:25.974 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:40:25.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:25.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:25.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:25.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:25.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:25.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:25.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:25.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:26.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:26.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:26.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:26.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:26.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:26.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:40:26.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:26.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:26.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:26.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:26.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:26.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:26.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:26.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:26.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:26.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:26.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:26.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:26.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:26.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:26.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:26.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:26.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:26.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:26.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:26.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:26.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:26.847 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:40:27.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:27.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:27.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:27.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:27.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:27.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:27.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:27.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:27.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:27.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:27.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:27.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:27.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:27.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:27.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:27.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:27.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:27.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:27.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:27.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:27.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:27.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:27.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:27.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:40:27.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:27.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:27.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:27.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:27.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:27.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:27.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:27.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:27.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:27.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:27.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:27.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:27.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:27.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:27.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:27.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:27.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:27.774 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:40:27.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:27.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:27.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:27.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:27.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:28.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:40:28.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:28.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:28.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:28.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:28.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:28.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:28.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:28.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:28.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:28.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:28.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:28.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:28.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:28.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:28.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:28.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:28.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:28.506 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:28.506 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:40:28.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:28.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:28.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:40:29.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:40:29.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:29.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:29.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:29.282 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:29.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:29.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:29.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:29.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:29.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:29.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:29.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:29.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:29.430 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:29.430 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:40:29.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:29.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:29.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:29.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:40:29.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:29.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:29.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:29.817 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:29.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:29.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:29.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:29.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:29.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:29.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:29.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:29.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:29.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:29.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:29.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:29.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:29.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:30.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:40:30.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:30.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:30.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:30.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:30.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:30.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:30.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:30.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:30.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:30.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:30.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:30.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:40:30.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:30.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:30.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:30.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:31.019 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:40:31.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:31.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:31.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:31.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:31.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:31.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:31.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:31.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:31.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:31.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:31.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:31.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:31.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:31.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:31.483 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:40:31.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:31.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:31.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:31.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:31.947 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:40:32.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:32.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:32.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:32.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:32.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:32.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:32.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:32.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:32.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:32.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:32.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:32.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:32.410 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:40:32.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:32.443 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:40:32.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:32.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:32.873 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:40:33.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:33.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:33.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:33.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:33.187 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:33.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:33.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:33.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:33.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:33.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:33.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:33.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:33.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:33.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:33.336 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:40:33.366 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:33.366 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:40:33.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:33.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:33.799 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:40:34.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:34.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:34.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:34.193 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:34.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:34.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:34.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:34.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:34.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:34.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:34.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:34.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:34.263 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:40:34.294 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:34.294 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:34.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:34.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:34.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:34.415 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:34.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:34.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:34.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:34.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:34.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:34.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:34.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:34.530 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:34.530 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:34.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.725 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:40:34.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:34.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:34.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:34.895 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:34.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:34.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:34.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:34.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:34.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:34.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:34.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:34.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:34.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:35.018 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:35.018 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:35.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.189 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:40:35.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:35.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:35.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:35.379 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:35.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:35.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:35.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:35.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:35.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:35.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:35.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:35.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:35.484 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:35.484 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:35.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.651 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:40:35.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:35.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:35.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:35.859 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:35.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:35.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:35.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:35.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:35.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:35.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:35.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:35.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:35.946 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:35.946 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:35.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:35.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:36.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:36.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:36.039 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:36.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:36.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:36.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:36.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:36.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:36.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:36.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:36.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:36.114 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:40:36.144 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:36.144 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:36.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:36.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:36.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:36.519 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:36.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:36.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:36.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:36.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:36.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:36.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:36.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:36.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:36.577 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:40:36.610 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:36.610 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:36.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:36.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:37.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:37.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:37.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:37.003 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:37.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:37.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:37.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:37.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:37.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:40:37.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:40:37.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:40:37.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:40:37.041 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:40:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:37.099 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:40:37.099 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:40:37.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:37.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:37.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:40:37.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:37.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:37.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:37.484 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:40:37.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:37.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:37.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:37.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:37.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:37.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:37.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:37.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:37.490 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:40:37.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:37.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:42.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:42.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:42.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:42.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:42.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:42.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:42.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:42.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:42.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:42.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:42.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:42.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:42.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:40:42.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:42.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:40:42.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:40:42.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:42.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:42.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:42.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:40:42.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:42.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:40:42.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:42.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:40:42.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:40:42.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:42.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:42.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:42.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:40:42.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:42.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:40:42.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:42.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:40:42.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:40:42.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:40:42.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:40:42.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:40:42.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:40:42.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:40:42.511 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:40:42.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:42.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:42.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:42.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:42.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:40:42.980 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:40:43.038 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:40:43.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.042 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:40:43.045 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:40:43.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:43.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:43.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:43.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
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2026-03-02 02:40:43.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:43.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:43.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:43.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:43.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:43.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
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2026-03-02 02:40:43.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-03-02 02:40:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.370 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:40:44.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:44.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:44.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:44.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:44.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:44.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:44.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:44.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:44.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:44.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:44.391 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:40:44.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:44.391 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:44.391 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:44.391 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:49.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:49.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:49.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:49.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:49.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:49.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:49.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:49.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:49.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:49.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:40:49.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:40:49.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:40:49.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:49.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:49.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:49.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:40:49.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:49.402 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:40:49.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:49.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:49.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:40:49.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:49.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:40:49.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:40:49.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:49.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:49.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:49.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:40:49.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:49.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:40:49.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:40:49.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:40:49.410 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:40:49.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:49.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:40:49.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:40:49.922 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:40:49.923 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:40:49.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:49.924 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:40:49.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:49.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:49.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:49.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:49.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:49.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:49.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:49.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:49.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:49.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:49.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:49.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:49.976 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:40:49.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:49.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:49.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:49.976 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:40:54.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:54.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:54.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:54.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:54.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:54.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:54.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:54.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:54.986 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:54.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:40:54.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:40:54.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:40:54.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:40:54.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:54.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:54.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:54.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:40:54.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:40:54.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:40:54.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:54.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:40:54.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:40:54.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:54.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:54.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:54.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:40:54.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:40:54.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:40:54.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:54.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:40:54.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:40:54.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:54.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:40:54.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:54.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:40:54.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:40:54.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:40:54.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:54.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:40:54.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:40:54.999 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:40:55.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:55.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:40:55.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:40:55.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:40:55.513 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:40:55.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:40:55.514 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:40:55.515 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:40:55.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:40:55.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:40:55.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:40:55.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:40:55.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:40:55.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:40:55.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:40:55.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:40:55.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:40:55.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:40:55.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:40:55.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:40:55.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:40:55.527 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:41:00.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:41:00.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:41:00.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:41:00.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:41:00.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:41:00.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:41:00.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:41:00.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:41:00.545 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:00.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:41:00.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:41:00.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:41:00.550 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:41:00.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:41:00.550 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:00.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:41:00.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:41:00.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:41:00.551 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:41:00.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:00.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:41:00.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:41:00.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:41:00.554 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:00.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:41:00.554 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:41:00.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:41:00.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:41:00.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:00.556 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:41:00.556 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:41:00.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:41:00.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:00.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:41:00.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:41:00.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:41:00.557 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:41:00.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:00.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:41:00.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:41:00.561 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:41:00.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:00.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:00.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:41:01.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:41:01.073 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:41:01.074 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:41:01.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:01.074 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:41:01.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:01.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:01.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:01.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:01.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:41:01.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:41:01.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:41:01.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:41:01.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:41:01.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:41:01.225 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:41:01.225 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:41:01.225 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:41:01.225 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:41:01.225 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:41:01.225 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:41:01.225 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:41:06.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:41:06.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:41:06.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:41:06.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:41:06.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:41:06.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:41:06.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:41:06.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:41:06.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:06.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:41:06.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:41:06.235 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:41:06.235 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:41:06.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:41:06.235 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:06.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:41:06.236 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:41:06.236 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:41:06.236 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:41:06.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:06.237 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:41:06.237 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:41:06.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:41:06.237 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:06.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:41:06.238 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:41:06.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:41:06.238 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:41:06.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:06.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:41:06.240 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:41:06.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:41:06.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:41:06.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:41:06.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:41:06.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:41:06.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:41:06.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:06.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:41:06.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:41:06.245 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:41:06.245 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:06.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:41:06.711 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:41:06.760 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:41:06.760 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:41:06.761 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:41:06.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:06.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:06.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:06.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:06.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:06.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:06.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:06.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:06.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:06.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:06.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:06.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:06.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:06.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:06.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:07.174 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:41:07.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:07.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:07.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:07.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:07.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:41:08.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:41:08.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:08.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:08.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:08.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:08.562 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:41:09.024 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:41:09.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:09.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:09.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:09.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:41:09.949 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:41:10.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:10.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:10.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:10.412 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:41:10.875 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:41:10.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:10.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:10.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:10.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:10.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:10.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:10.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:10.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:10.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:10.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:10.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:10.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:10.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:10.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:10.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:10.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:10.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:11.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:11.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:41:11.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:41:11.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:41:11.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:41:11.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:41:11.801 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:41:12.265 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:41:12.729 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:41:13.192 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:41:13.656 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:41:14.120 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:41:14.583 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:41:15.047 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:41:15.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:15.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:15.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:15.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:15.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:15.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:15.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:15.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:15.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:15.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:15.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:15.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:15.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:15.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:15.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:15.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:15.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:15.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:15.560 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:41:16.024 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:41:16.488 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:41:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:41:17.416 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:41:17.879 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:41:18.343 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:41:18.806 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:41:19.269 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:41:19.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:19.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:19.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:19.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:19.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:19.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:19.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:19.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:19.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:19.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:19.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:19.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:19.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:19.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:19.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:19.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:19.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:19.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:41:20.194 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:41:20.657 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:41:21.119 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:41:21.581 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:41:22.044 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:41:22.507 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:41:22.970 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:41:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:41:23.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:23.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:23.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:23.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:23.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:23.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:23.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:23.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:23.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:23.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:23.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:23.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:23.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:23.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:23.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:23.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:23.896 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:41:24.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:24.359 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:41:24.822 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:41:25.285 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:41:25.747 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:41:26.210 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:41:26.673 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:41:27.136 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:41:27.599 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:41:28.061 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:41:28.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:28.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:28.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:28.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:28.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:28.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:28.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:28.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:28.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:28.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:28.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:28.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:28.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:28.292 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:41:28.292 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:41:28.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:28.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:28.524 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:41:28.987 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:41:29.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:41:29.912 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:41:30.375 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:41:30.837 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:41:31.300 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:41:31.762 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:41:32.225 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:41:32.688 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:41:33.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:33.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:33.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:33.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:33.008 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:41:33.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:33.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:33.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:33.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:33.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:33.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:33.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:33.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:33.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:41:33.060 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:41:33.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:33.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:33.151 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:41:33.614 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:41:33.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:34.077 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:41:34.540 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:41:35.002 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:41:35.464 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:41:35.941 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:41:36.404 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:41:36.866 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:41:37.329 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:41:37.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:37.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:37.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:37.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:37.785 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:41:37.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:37.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:37.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:37.791 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:41:37.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:37.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:37.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:37.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:37.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:37.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:37.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:37.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:37.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:38.256 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:41:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:38.719 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:41:39.182 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:41:39.644 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:41:40.107 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:41:40.569 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:41:41.031 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:41:41.494 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:41:41.956 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:41:42.419 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:41:42.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:42.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:42.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:42.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:42.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:42.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:42.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:42.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:42.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:42.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:42.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:42.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:42.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:42.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:42.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:42.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:42.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:42.882 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:41:43.344 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:41:43.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:43.807 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:41:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:41:44.731 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:41:45.194 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:41:45.656 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:41:46.118 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:41:46.581 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:41:47.044 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:41:47.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:47.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:47.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:47.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:47.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:47.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:47.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:47.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:47.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:47.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:47.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:47.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:47.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:41:47.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:47.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:47.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:47.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:47.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:47.506 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:41:47.969 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:41:48.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:48.431 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:41:48.894 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:41:49.357 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:41:49.819 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:41:50.281 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:41:50.744 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:41:51.207 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:41:51.669 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:41:52.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:52.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:52.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:52.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:52.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:52.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:52.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:52.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:52.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:52.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:52.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:52.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:52.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:52.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:41:52.039 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:41:52.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:52.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:52.132 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:41:52.594 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:41:52.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:53.056 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:41:53.518 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:41:53.981 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:41:54.443 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:41:54.906 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:41:55.368 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:41:55.830 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:41:56.292 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:41:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:56.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:56.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:56.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:56.725 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:41:56.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:41:56.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:41:56.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:41:56.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:56.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:41:56.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:41:56.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:41:56.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:41:56.755 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:41:56.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:56.758 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:41:56.758 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:41:56.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:56.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:41:57.217 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:41:57.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:41:57.679 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:41:58.141 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:41:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:41:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:41:59.529 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:41:59.993 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:42:00.457 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:42:00.920 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:42:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:42:01.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:01.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:01.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:01.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:01.499 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:01.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:01.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:01.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:01.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:01.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:01.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:01.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:01.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:01.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:01.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:01.519 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:01.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:01.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:01.845 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:42:01.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:02.307 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:42:02.770 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:42:03.233 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:42:03.696 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:42:04.159 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:42:04.623 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:42:05.086 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 02:42:05.550 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 02:42:05.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:05.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:05.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:05.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:05.999 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:06.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:06.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:06.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:06.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:06.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:06.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:06.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:06.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:06.014 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 02:42:06.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:06.019 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:06.019 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:06.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:06.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:06.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:06.478 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 02:42:06.941 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 02:42:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 02:42:07.866 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 02:42:08.330 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 02:42:08.794 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 02:42:09.257 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 02:42:09.720 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 02:42:10.183 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 02:42:10.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:10.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:10.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:10.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:10.184 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:10.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:10.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:10.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:10.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:10.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:10.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:10.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:10.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:10.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:10.226 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:10.226 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:10.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:10.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:10.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:10.646 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 02:42:11.109 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 02:42:11.571 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 02:42:12.034 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 02:42:12.496 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 02:42:12.959 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 02:42:13.422 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 02:42:13.884 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 02:42:14.346 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 02:42:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:14.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:14.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:14.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:14.371 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:14.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:14.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:14.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:14.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:14.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:14.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:14.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:14.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:14.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:14.391 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:14.391 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:14.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:14.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:14.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:14.809 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 02:42:15.271 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 02:42:15.735 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 02:42:16.199 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 02:42:16.662 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 02:42:17.126 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 02:42:17.589 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 02:42:18.053 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 02:42:18.523 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 02:42:18.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:18.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:18.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:18.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:18.557 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:18.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:18.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:18.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:18.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:18.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:18.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:18.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:18.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:18.567 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:18.567 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:18.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:18.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:18.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:18.986 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 02:42:19.450 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 02:42:19.912 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 02:42:20.376 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 02:42:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 02:42:21.302 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 02:42:21.765 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 02:42:22.227 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 02:42:22.690 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 02:42:22.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:22.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:22.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:22.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:22.914 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:22.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:22.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:22.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:22.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:22.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:22.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:22.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:22.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:22.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:22.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:22.967 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:22.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:22.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:23.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:23.153 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 02:42:23.616 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 02:42:24.078 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 02:42:24.542 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 02:42:25.006 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 02:42:25.472 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 02:42:25.936 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 02:42:26.400 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 02:42:26.863 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 02:42:27.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:27.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:27.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:27.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:27.101 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:27.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:27.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:27.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:27.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:27.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:27.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:27.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:27.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:27.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:27.144 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:27.144 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:27.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:27.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:27.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:27.355 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 02:42:27.819 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 02:42:28.284 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 02:42:28.751 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 02:42:29.215 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 02:42:29.683 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 02:42:30.148 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 02:42:30.612 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-02 02:42:31.077 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-02 02:42:31.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:31.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:31.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:31.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:31.288 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:31.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:31.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:31.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:31.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:31.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:31.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:31.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:31.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:31.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:31.309 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:31.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:31.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:31.543 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-02 02:42:32.007 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-02 02:42:32.472 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-02 02:42:32.936 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-02 02:42:33.401 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-02 02:42:33.865 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-02 02:42:34.330 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-02 02:42:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-02 02:42:35.259 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-03-02 02:42:35.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:35.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:35.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:35.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:35.524 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:35.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:35.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:35.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:35.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:35.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:35.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:42:35.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:42:35.530 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:42:35.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:35.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:35.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:35.530 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19645 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:42:40.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:42:40.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:42:40.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:40.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:40.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:40.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:40.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:40.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:42:40.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:40.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:42:40.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:42:40.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:42:40.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:42:40.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:42:40.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:42:40.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:42:40.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:42:40.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:42:40.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:42:40.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:40.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:42:40.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:42:40.550 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:42:40.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:42:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:40.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:42:40.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:42:40.552 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:42:45.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:42:45.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:42:45.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:45.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:45.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:45.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:45.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:45.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:42:45.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:45.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:42:45.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:42:45.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:42:45.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:42:45.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:42:45.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:45.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:45.567 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:42:45.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:42:45.567 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:42:45.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:45.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:42:45.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:42:45.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:42:45.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:45.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:45.569 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:42:45.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:42:45.569 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:42:45.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:45.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:42:45.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:42:45.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:42:45.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:42:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:45.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:42:45.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:42:45.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:42:45.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:42:45.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:42:45.576 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:42:45.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:42:45.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:42:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:45.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:42:46.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:42:46.091 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:42:46.092 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:42:46.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.093 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:42:46.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:46.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:46.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:46.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:46.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:46.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.508 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:42:46.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:46.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:46.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:46.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:46.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:46.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:46.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:46.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:46.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:46.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:46.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:46.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:46.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:42:46.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:46.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:46.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:46.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:46.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:47.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:47.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:47.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:47.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:47.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:47.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:47.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:47.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:47.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:47.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:42:47.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:47.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:47.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:47.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:47.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:47.900 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:42:47.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:47.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:47.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:47.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:47.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:47.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:47.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:47.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:47.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:47.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:47.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:47.989 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:47.989 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:42:47.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:47.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:48.363 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:42:48.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:48.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:48.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:48.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:48.465 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:48.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:48.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:48.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:48.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:48.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:48.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:48.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:48.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:48.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:48.522 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:48.522 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:42:48.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:48.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:48.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:48.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:48.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:48.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:48.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:42:48.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:48.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:48.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:48.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:48.997 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:49.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:49.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:49.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:49.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:49.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:49.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:49.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:49.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:49.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:49.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:49.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:49.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.290 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:42:49.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:49.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:49.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:49.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:49.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:49.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:49.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:49.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:49.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:49.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:49.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:49.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:49.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:49.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:49.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:49.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:49.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:49.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:49.753 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:42:50.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:50.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:50.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:50.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:50.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:50.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:50.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:50.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:50.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:50.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:50.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:50.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:50.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:42:50.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:50.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:50.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:50.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:50.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:50.216 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:42:50.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:50.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:50.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:50.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:50.680 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:42:50.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:50.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:50.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:50.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:50.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:50.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:50.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:50.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:50.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:50.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:50.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:50.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:51.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:51.006 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:51.006 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:42:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.143 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:42:51.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:51.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:51.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:51.419 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:51.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:51.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:51.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:51.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:51.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:51.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:51.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:51.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:51.474 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:51.474 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:42:51.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:42:51.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:51.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:51.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:51.955 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:51.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:51.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:51.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:51.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:51.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:51.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:51.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:51.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:52.010 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:52.010 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:52.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.070 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:42:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:52.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:52.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:52.223 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:52.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:52.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:52.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:52.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:52.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:52.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:52.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:52.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:52.280 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:52.280 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:52.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.535 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:42:52.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:52.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:52.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:52.709 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:52.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:52.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:52.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:52.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:52.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:52.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:52.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:52.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:52.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:52.776 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:52.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:52.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:42:53.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:53.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:53.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:53.188 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:53.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:53.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:53.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:53.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:53.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:53.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:53.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:53.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:53.247 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:53.247 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:53.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.464 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:42:53.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:53.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:53.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:53.674 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:53.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:53.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:53.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:53.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:53.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:53.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:53.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:53.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:53.741 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:53.741 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:53.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:53.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:53.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:53.854 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:53.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:53.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:53.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:53.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:53.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:53.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:53.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:53.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:53.922 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:53.922 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:53.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:42:54.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:54.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:54.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:54.337 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:54.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:54.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:54.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:54.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:54.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:54.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:54.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:54.394 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:42:54.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:54.398 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:54.398 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:54.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:54.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:54.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:54.818 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:54.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:54.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:54.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:42:54.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:42:54.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:42:54.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:42:54.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:42:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:42:54.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:54.883 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:42:54.883 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:42:54.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:54.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:55.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:42:55.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:42:55.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:42:55.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:42:55.302 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:42:55.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:42:55.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:42:55.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:42:55.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:42:55.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:42:55.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:42:55.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:42:55.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:42:55.308 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:42:55.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:42:55.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:42:55.308 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2140 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:43:00.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:43:00.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:43:00.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:43:00.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:43:00.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:43:00.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:43:00.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:43:00.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:43:00.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:00.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:43:00.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:43:00.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:43:00.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:43:00.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:43:00.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:00.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:43:00.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:43:00.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:43:00.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:43:00.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:00.321 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:43:00.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:43:00.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:43:00.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:00.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:43:00.322 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:43:00.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:43:00.322 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:43:00.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:00.324 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:43:00.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:43:00.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:43:00.325 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:00.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:43:00.325 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:43:00.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:43:00.325 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:43:00.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:00.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:43:00.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:43:00.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:43:00.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:43:00.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:43:00.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:43:00.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:43:00.330 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:43:00.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:00.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:00.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:00.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:43:00.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:43:00.847 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:43:00.848 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:43:00.848 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:43:00.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:00.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:00.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:00.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:00.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:00.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:00.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:00.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:00.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:00.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:00.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:00.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:00.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:01.262 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:43:01.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:01.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:01.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:01.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:01.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:01.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:01.725 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:43:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:01.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:01.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:01.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:01.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:01.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:01.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:01.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:01.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:01.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:01.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:01.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:01.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:01.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:01.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:01.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:02.189 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:43:02.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:02.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:02.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:02.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:02.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:43:02.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:02.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:03.117 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:43:03.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:03.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:03.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:03.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:03.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:03.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:03.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:03.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:03.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:03.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:03.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:03.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:03.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:03.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:03.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:03.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:03.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:03.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:03.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:03.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:03.581 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:43:04.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:04.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:04.044 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:43:04.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:04.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:04.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:04.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:04.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:04.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:04.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:04.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:04.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:04.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:04.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:04.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:04.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:04.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:04.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:04.508 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:43:04.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:04.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:04.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:04.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:04.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:04.972 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:43:05.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:05.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:05.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:05.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:05.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:05.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:05.437 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:43:05.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:05.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:05.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:05.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:05.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:05.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:05.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:05.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:05.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:05.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:05.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:05.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:05.900 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:43:05.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:05.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:05.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:05.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:05.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:06.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:43:06.827 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:43:06.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:06.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:07.290 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:43:07.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:07.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:07.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:07.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:07.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:07.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:07.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:07.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:07.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:07.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:07.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:07.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:07.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:07.474 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:07.474 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:43:07.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:07.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:07.753 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:43:08.216 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:43:08.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:08.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:08.678 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:43:08.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:08.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:08.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:08.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:08.892 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:08.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:08.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:08.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:08.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:08.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:08.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:08.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:08.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:08.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:08.946 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:08.946 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:43:08.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:08.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:09.141 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:43:09.604 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:43:09.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:10.068 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:43:10.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:10.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:10.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:10.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:10.369 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:10.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:10.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:10.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:10.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:10.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:10.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:10.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:10.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:10.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:10.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:10.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:10.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:10.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:10.532 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:43:10.995 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:43:11.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:11.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:11.459 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:43:11.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:11.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:11.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:11.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:11.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:11.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:11.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:11.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:11.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:11.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:11.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:11.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:11.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:11.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:11.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:11.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:11.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:11.921 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:43:12.385 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:43:12.850 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:43:12.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:12.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:13.314 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:43:13.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:13.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:13.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:13.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:13.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:13.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:13.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:13.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:13.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:13.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:13.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:13.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:13.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:13.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:13.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:13.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:13.777 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:43:14.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:14.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:14.240 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:43:14.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:14.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:14.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:14.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:14.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:14.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:14.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:14.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:14.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:14.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:14.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:14.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:14.703 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:43:14.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:14.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:14.742 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:43:14.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:14.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:15.166 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:43:15.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:15.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:43:16.094 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:43:16.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:16.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:16.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:16.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:16.097 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:16.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:16.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:16.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:16.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:16.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:16.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:16.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:16.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:16.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:16.163 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:16.163 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:43:16.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:16.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:16.558 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:43:17.022 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:43:17.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:17.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:17.486 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:43:17.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:17.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:17.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:17.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:17.575 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:17.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:17.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:17.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:17.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:17.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:17.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:17.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:17.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:17.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:17.635 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:17.636 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:17.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:17.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:17.951 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:43:18.415 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:43:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:18.880 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:43:19.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:19.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:19.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:19.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:19.033 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:19.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:19.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:19.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:19.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:19.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:19.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:19.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:19.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:19.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:19.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:19.091 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:19.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:19.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:19.344 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:43:19.808 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:43:19.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:20.272 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:43:20.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:20.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:20.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:20.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:20.446 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:20.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:20.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:20.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:20.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:20.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:20.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:20.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:20.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:20.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:20.508 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:20.508 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:20.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:20.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:20.736 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:43:21.200 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:43:21.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:21.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:43:21.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:21.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:21.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:21.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:21.853 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:21.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:21.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:21.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:21.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:21.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:21.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:21.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:21.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:21.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:21.910 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:21.910 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:21.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:21.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:22.128 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:43:22.590 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:43:22.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:22.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:23.054 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:43:23.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:23.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:23.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:23.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:23.261 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:23.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:23.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:23.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:23.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:23.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:23.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:23.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:23.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:23.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:23.323 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:23.323 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:23.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:23.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:23.517 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:43:23.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:23.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:23.980 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:43:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:24.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:24.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:24.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:24.368 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:24.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:24.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:24.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:24.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:24.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:24.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:24.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:24.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:24.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:24.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:24.422 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:24.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:24.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:24.443 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:43:24.906 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:43:25.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:25.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:25.369 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:43:25.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:25.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:25.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:25.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:25.775 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:25.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:25.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:25.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:25.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:25.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:25.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:25.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:25.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:25.833 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:43:25.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:25.839 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:25.839 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:25.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:25.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:26.298 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:43:26.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:26.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:26.763 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:43:27.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:27.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:27.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:27.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:27.189 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:27.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:27.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:27.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:27.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:27.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:27.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:27.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:27.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:27.227 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:43:27.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:27.253 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:27.253 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:43:27.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:27.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:27.692 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:43:28.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:28.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:28.157 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:43:28.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:28.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:28.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:28.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:28.600 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:28.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:28.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:43:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:43:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:43:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:43:28.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:43:28.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:43:28.605 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:43:33.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:43:33.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:43:33.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:43:33.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:43:33.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:43:33.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:43:33.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:43:33.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:43:33.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:33.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:43:33.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:43:33.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:43:33.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:43:33.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:43:33.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:33.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:43:33.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:43:33.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:43:33.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:43:33.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:33.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:43:33.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:43:33.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:43:33.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:33.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:43:33.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:43:33.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:43:33.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:43:33.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:33.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:43:33.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:43:33.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:43:33.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:43:33.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:43:33.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:43:33.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:43:33.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:43:33.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:33.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:43:33.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:43:33.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:43:33.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:43:33.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:43:33.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:43:33.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:43:33.624 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:43:33.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:43:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:43:33.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:43:34.093 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:43:34.142 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:43:34.143 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:43:34.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:34.144 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:43:34.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:34.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:34.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:34.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:34.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:34.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:34.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:34.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:34.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:34.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:34.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:34.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:34.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:34.557 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:43:34.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:34.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:34.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:34.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:35.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:43:35.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:43:35.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:35.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:35.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:35.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:35.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:43:36.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:43:36.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:36.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:36.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:36.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:36.885 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:43:37.349 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:43:37.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:37.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:37.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:37.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:37.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:43:38.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:38.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:38.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:38.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:38.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:38.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:38.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:38.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:38.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:38.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:38.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:38.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:38.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:38.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:38.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:38.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:38.276 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:43:38.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:43:38.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:43:38.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:43:38.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:43:38.740 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:43:39.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:43:39.667 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:43:40.130 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:43:40.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:43:41.057 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:43:41.519 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:43:41.982 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:43:42.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:42.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:42.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:42.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:42.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:42.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:42.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:42.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:42.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:42.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:42.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:42.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:42.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:42.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:42.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:42.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:42.446 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:43:42.909 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:43:43.374 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:43:43.837 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:43:44.301 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:43:44.765 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:43:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:43:45.692 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:43:46.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:46.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:46.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:46.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:46.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:46.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:46.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:46.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:46.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:46.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:46.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:46.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:46.155 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:43:46.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:46.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:46.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:46.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:46.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:46.618 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:43:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:43:47.543 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:43:48.007 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:43:48.470 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:43:48.933 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:43:49.397 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:43:49.860 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:43:50.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:50.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:50.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:50.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:50.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:50.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:50.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:50.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:50.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:50.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:50.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:50.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:50.322 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:43:50.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:50.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:50.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:50.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:50.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:50.786 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:43:51.249 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:43:51.712 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:43:52.177 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:43:52.640 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:43:53.103 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:43:53.566 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:43:54.032 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:43:54.499 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:43:54.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:54.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:54.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:54.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:54.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:54.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:54.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:54.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:54.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:54.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:54.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:54.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:54.964 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:43:54.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:54.978 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:54.978 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:43:54.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:54.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:55.431 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:43:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:43:56.362 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:43:56.826 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:43:57.292 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:43:57.761 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:43:58.228 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:43:58.693 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:43:59.158 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:43:59.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:59.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:59.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:59.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:59.230 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:43:59.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:43:59.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:43:59.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:43:59.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:59.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:43:59.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:43:59.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:43:59.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:43:59.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:43:59.286 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:43:59.286 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:43:59.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:59.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:43:59.621 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:44:00.085 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:44:00.550 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:44:01.021 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:44:01.487 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:44:01.952 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:44:02.419 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:44:02.887 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:44:03.352 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:44:03.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:03.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:03.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:03.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:03.570 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:03.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:03.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:03.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:03.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:03.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:03.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:03.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:03.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:03.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:44:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:03.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:03.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:03.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:03.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:03.818 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:44:04.284 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:44:04.748 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:44:05.212 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:44:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:44:06.138 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:44:06.603 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:44:07.074 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:44:07.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:07.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:07.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:07.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:07.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:07.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:07.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:07.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:07.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:07.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:07.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:07.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:07.954 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:44:07.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:08.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:08.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:08.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:08.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:08.418 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:44:08.881 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:44:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:44:09.808 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:44:10.270 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:44:10.733 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:44:11.196 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:44:11.658 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:44:12.121 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:44:12.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:12.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:12.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:12.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:12.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:12.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:12.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:12.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:12.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:12.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:12.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:12.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:12.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:44:12.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:12.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:12.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:12.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:12.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:12.584 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:44:13.047 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:44:13.510 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:44:13.973 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:44:14.436 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:44:14.899 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:44:15.362 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:44:15.827 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:44:16.293 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:44:16.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:16.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:16.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:16.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:16.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:16.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:16.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:16.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:16.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:16.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:16.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:16.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:16.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:16.390 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:16.390 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:44:16.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:16.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:16.755 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:44:17.220 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:44:17.683 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:44:18.146 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:44:18.609 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:44:19.072 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:44:19.535 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:44:19.997 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:44:20.460 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:44:20.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:20.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:20.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:20.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:20.589 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:20.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:20.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:20.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:20.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:20.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:20.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:20.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:20.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:20.641 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:20.641 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:44:20.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:20.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:20.923 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:44:21.386 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:44:21.849 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:44:22.313 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:44:22.775 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:44:23.239 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:44:23.703 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:44:24.166 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:44:24.629 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:44:24.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:24.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:24.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:24.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:24.899 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:24.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:24.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:24.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:24.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:24.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:24.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:24.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:24.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:24.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:24.955 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:24.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:24.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:25.092 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:44:25.556 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:44:26.019 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:44:26.483 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:44:26.947 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:44:27.411 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:44:27.876 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:44:28.340 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:44:28.804 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:44:28.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:28.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:28.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:28.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:28.964 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:28.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:28.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:28.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:28.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:28.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:28.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:28.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:28.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:29.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:29.038 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:29.039 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:29.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:29.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:29.269 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:44:29.732 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:44:30.196 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:44:30.659 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:44:31.123 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:44:31.587 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:44:32.050 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:44:32.514 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:44:32.979 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 02:44:33.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:33.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:33.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:33.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:33.148 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:33.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:33.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:33.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:33.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:33.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:33.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:33.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:33.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:33.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:33.213 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:33.213 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:33.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:33.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:33.442 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 02:44:33.906 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 02:44:34.370 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 02:44:34.833 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 02:44:35.296 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 02:44:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 02:44:36.225 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 02:44:36.688 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 02:44:37.151 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 02:44:37.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:37.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:37.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:37.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:37.344 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:37.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:37.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:37.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:37.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:37.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:37.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:37.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:37.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:37.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:37.402 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:37.402 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:37.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:37.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:37.615 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 02:44:38.078 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 02:44:38.541 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 02:44:39.004 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 02:44:39.468 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 02:44:39.931 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 02:44:40.394 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 02:44:40.856 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 02:44:41.320 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 02:44:41.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:41.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:41.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:41.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:41.529 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:41.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:41.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:41.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:41.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:41.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:41.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:41.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:41.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:41.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:41.589 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:41.589 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:41.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:41.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:41.783 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 02:44:42.246 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 02:44:42.710 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 02:44:43.174 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 02:44:43.638 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 02:44:44.101 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 02:44:44.564 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 02:44:45.027 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 02:44:45.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:45.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:45.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:45.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:45.417 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:45.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:45.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:45.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:45.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:45.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:45.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:45.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:45.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:45.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:45.475 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:45.475 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:45.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:45.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:45.491 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 02:44:45.955 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 02:44:46.420 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 02:44:46.885 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 02:44:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 02:44:47.815 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 02:44:48.280 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 02:44:48.745 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 02:44:49.210 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 02:44:49.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:49.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:49.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:49.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:49.616 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:49.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:49.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:49.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:49.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:49.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:49.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:49.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:49.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:49.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:49.708 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:49.708 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:49.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:49.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:49.719 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 02:44:50.185 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 02:44:50.649 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 02:44:51.115 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 02:44:51.579 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 02:44:52.043 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 02:44:52.507 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 02:44:52.971 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 02:44:53.434 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 02:44:53.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:53.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:53.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:53.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:53.857 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:53.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:53.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:53.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:44:53.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:53.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:44:53.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:44:53.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:44:53.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:44:53.897 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 02:44:53.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:53.913 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:44:53.913 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:44:53.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:53.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:54.361 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 02:44:54.825 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 02:44:55.291 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 02:44:55.760 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 02:44:56.223 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 02:44:56.686 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 02:44:57.150 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 02:44:57.614 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 02:44:58.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:44:58.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:44:58.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:44:58.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:44:58.059 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:44:58.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:44:58.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:44:58.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:44:58.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:44:58.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:44:58.078 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 02:44:58.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:44:58.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:44:58.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:44:58.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:44:58.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:44:58.079 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:44:58.079 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=18463 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:45:03.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:45:03.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:45:03.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:45:03.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:45:03.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:45:03.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:45:03.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:45:03.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:45:03.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:03.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:45:03.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:45:03.080 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:45:03.080 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:45:03.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:45:03.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:03.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:45:03.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:45:03.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:45:03.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:45:03.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:45:03.082 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:45:03.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:45:03.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:03.084 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:45:03.084 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:45:03.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:45:03.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:03.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:45:03.084 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:45:03.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:45:03.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:45:03.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:45:03.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:45:03.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:45:03.088 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:45:03.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:03.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:45:03.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:45:03.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:45:03.091 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:45:08.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:45:08.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:45:08.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:45:08.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:45:08.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:45:08.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:45:08.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:45:08.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:45:08.105 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:08.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:45:08.105 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:45:08.108 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:45:08.108 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:45:08.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:45:08.109 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:08.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:45:08.109 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:45:08.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:45:08.109 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:45:08.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:08.112 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:45:08.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:45:08.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:45:08.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:08.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:45:08.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:45:08.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:45:08.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:45:08.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:45:08.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:45:08.117 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:45:08.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:45:08.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:45:08.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:45:08.124 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:45:08.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:08.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:45:08.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:45:08.648 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:45:08.649 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:45:08.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:08.651 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:45:08.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:08.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:08.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:08.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:08.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:08.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:08.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:08.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:08.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:08.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:08.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:08.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:09.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:45:09.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:09.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:09.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:09.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:09.521 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:45:09.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:45:10.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:10.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:10.450 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:45:10.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:45:11.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:11.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:11.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:11.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:11.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:45:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:45:12.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:12.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:12.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:12.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:12.308 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:45:12.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:12.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:12.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:12.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:12.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:12.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:12.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:12.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:12.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:12.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:12.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:12.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:12.773 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:45:12.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:12.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:12.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:12.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:12.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:13.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:45:13.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:45:13.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:45:13.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:45:13.237 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:45:13.702 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:45:14.166 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:45:14.631 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:45:15.095 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:45:15.561 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:45:16.027 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:45:16.493 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:45:16.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:16.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:16.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:16.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:16.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:16.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:16.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:16.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:16.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:16.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:16.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:16.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:16.958 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:45:16.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:16.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:16.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:16.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:17.423 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:45:17.888 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:45:18.354 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:45:18.819 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:45:19.284 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:45:19.754 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:45:20.225 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:45:20.697 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:45:21.167 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:45:21.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:21.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:21.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:21.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:21.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:21.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:21.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:21.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:21.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:21.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:21.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:21.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:21.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:21.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:21.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:21.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:21.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:21.702 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:45:22.174 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:45:22.643 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:45:23.114 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:45:23.584 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:45:24.057 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:45:24.528 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:45:24.998 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:45:25.469 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:45:25.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:25.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:25.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:25.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:25.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:25.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:25.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:25.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:25.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:25.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:25.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:25.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:25.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:25.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:25.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:25.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:25.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:25.941 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:45:26.412 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:45:26.883 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:45:27.353 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:45:27.823 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:45:28.293 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:45:28.761 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:45:29.227 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:45:29.694 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:45:30.160 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:45:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:30.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:30.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:30.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:30.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:30.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:30.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:30.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:30.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:30.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:30.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:30.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:30.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:30.308 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:45:30.308 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:45:30.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:30.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:30.626 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:45:31.091 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:45:31.557 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:45:32.023 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:45:32.490 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:45:32.956 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:45:33.422 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:45:33.888 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:45:34.354 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:45:34.819 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:45:35.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:35.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:35.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:35.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:35.061 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:45:35.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:35.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:35.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:35.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:35.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:35.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:35.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:35.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:35.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:35.129 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:45:35.129 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:45:35.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:35.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:45:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:45:36.216 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:45:36.681 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:45:37.147 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:45:37.613 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:45:38.079 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:45:38.544 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:45:39.010 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:45:39.476 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:45:39.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:39.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:39.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:39.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:39.875 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:45:39.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:39.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:39.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:39.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:39.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:39.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:39.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:39.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:39.941 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:45:39.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:39.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:39.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:39.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:39.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:39.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:40.407 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:45:40.873 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:45:41.338 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:45:41.804 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:45:42.269 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:45:42.735 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:45:43.200 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:45:43.666 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:45:44.132 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:45:44.597 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:45:44.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:44.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:44.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:44.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:44.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:44.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:44.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:44.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:44.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:44.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:44.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:44.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:44.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:44.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:44.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:45.063 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:45:45.528 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:45:45.994 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:45:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:45:46.925 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:45:47.390 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:45:47.856 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:45:48.322 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:45:48.787 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:45:49.253 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:45:49.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:49.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:49.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:49.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:49.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:49.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:49.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:49.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:49.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:49.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:49.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:49.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:49.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:45:49.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:49.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:49.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:49.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:49.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:49.718 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:45:50.184 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:45:50.649 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:45:51.115 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:45:51.580 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:45:52.046 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:45:52.512 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:45:52.977 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:45:53.442 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:45:53.908 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:45:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:54.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:54.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:54.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:54.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:54.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:54.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:54.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:54.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:54.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:54.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:54.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:54.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:54.236 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:45:54.236 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:45:54.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:54.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:54.373 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:45:54.839 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:45:55.304 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:45:55.770 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:45:56.235 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:45:56.701 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:45:57.166 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:45:57.632 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:45:58.097 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:45:58.562 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:45:58.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:58.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:58.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:58.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:58.917 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:45:58.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:45:58.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:45:58.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:45:58.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:58.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:45:58.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:45:58.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:45:58.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:45:58.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:45:58.981 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:45:58.981 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:45:58.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:58.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:45:59.028 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:45:59.493 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:45:59.959 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:46:00.424 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:46:00.889 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:46:01.359 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:46:01.825 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:46:02.291 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:46:02.757 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:46:03.222 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:46:03.687 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:46:04.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:04.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:04.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:04.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:04.293 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:04.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:04.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:04.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:04.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:04.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:04.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:04.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:04.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:04.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:04.360 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:04.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:04.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:04.749 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:46:05.214 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:46:05.680 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:46:06.145 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:46:06.611 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:46:07.076 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:46:07.542 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:46:08.007 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 02:46:08.473 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 02:46:08.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:08.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:08.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:08.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:08.833 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:08.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:08.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:08.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:08.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:08.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:08.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:08.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:08.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:08.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:08.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:08.904 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:08.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:08.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:08.939 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 02:46:09.404 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 02:46:09.870 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 02:46:10.335 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 02:46:10.800 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 02:46:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 02:46:11.731 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 02:46:12.197 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 02:46:12.663 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 02:46:13.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:13.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:13.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:13.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:13.042 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:13.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:13.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:13.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:13.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:13.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:13.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:13.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:13.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:13.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:13.108 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:13.108 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:13.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:13.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:13.128 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 02:46:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 02:46:14.058 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 02:46:14.524 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 02:46:14.990 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 02:46:15.455 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 02:46:15.921 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 02:46:16.387 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 02:46:16.852 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 02:46:17.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:17.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:17.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:17.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:17.252 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:17.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:17.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:17.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:17.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:17.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:17.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:17.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:17.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:17.318 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 02:46:17.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:17.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:17.325 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:17.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:17.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:17.783 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 02:46:18.248 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 02:46:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 02:46:19.180 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 02:46:19.646 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 02:46:20.111 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 02:46:20.577 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 02:46:21.042 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 02:46:21.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:21.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:21.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:21.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:21.456 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:21.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:21.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:21.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:21.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:21.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:21.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:21.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:21.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:21.507 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 02:46:21.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:21.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:21.525 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:21.973 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 02:46:22.438 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 02:46:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 02:46:23.369 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 02:46:23.835 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 02:46:24.300 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 02:46:24.766 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 02:46:25.231 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 02:46:25.697 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 02:46:25.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:25.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:25.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:25.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:25.828 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:25.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:25.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:25.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:25.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:25.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:25.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:25.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:25.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:25.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:25.893 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:25.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:25.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:26.162 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 02:46:26.627 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 02:46:27.092 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 02:46:27.558 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 02:46:28.024 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 02:46:28.489 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 02:46:28.954 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 02:46:29.420 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 02:46:29.885 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 02:46:30.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:30.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:30.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:30.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:30.036 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:30.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:30.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:30.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:30.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:30.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:30.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:30.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:30.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:30.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:30.104 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:30.104 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:30.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:30.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:30.350 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 02:46:30.816 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 02:46:31.282 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 02:46:31.748 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 02:46:32.214 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 02:46:32.680 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 02:46:33.145 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 02:46:33.611 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-02 02:46:34.077 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-02 02:46:34.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:34.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:34.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:34.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:34.241 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:34.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:34.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:34.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:34.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:34.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:34.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:34.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:34.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:34.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:34.316 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:34.316 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:46:34.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:34.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:34.543 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-02 02:46:35.009 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-02 02:46:35.474 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-02 02:46:35.940 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-02 02:46:36.406 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-02 02:46:36.872 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-02 02:46:37.338 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-02 02:46:37.804 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-02 02:46:38.270 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-03-02 02:46:38.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:38.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:38.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:38.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:38.455 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:38.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:38.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:38.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:38.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:38.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:46:38.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:46:38.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:46:38.467 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:46:38.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:46:38.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:46:38.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:46:38.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19629 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:46:38.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19629 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:46:38.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19629 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:46:38.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19629 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:46:38.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19629 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:46:38.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=19629 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:46:43.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:46:43.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:46:43.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:46:43.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:46:43.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:46:43.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:46:43.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:46:43.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:46:43.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:43.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:46:43.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:46:43.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:46:43.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:46:43.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:46:43.481 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:43.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:46:43.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:46:43.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:46:43.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:46:43.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:43.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:46:43.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:46:43.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:46:43.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:46:43.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:46:43.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:46:43.487 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:46:43.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:43.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:46:43.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:46:43.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:46:43.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:43.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:46:43.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:46:43.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:46:43.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:46:43.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:43.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:46:43.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:46:43.500 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:46:43.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:43.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:46:43.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:46:43.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:46:43.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:46:43.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:46:43.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:46:43.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:46:43.505 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:46:48.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:46:48.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:46:48.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:46:48.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:46:48.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:46:48.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:46:48.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:46:48.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:46:48.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:48.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:46:48.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:46:48.524 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:46:48.524 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:46:48.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:46:48.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:48.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:46:48.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:46:48.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:46:48.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:46:48.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:48.529 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:46:48.529 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:46:48.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:46:48.529 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:48.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:46:48.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:46:48.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:46:48.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:46:48.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:48.533 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:46:48.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:46:48.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:46:48.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:46:48.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:46:48.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:46:48.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:46:48.534 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:46:48.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:48.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:46:48.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:46:48.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:46:48.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:46:48.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:46:48.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:46:48.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:46:48.540 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:46:48.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:48.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:46:49.011 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:46:49.070 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:46:49.071 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:46:49.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:49.072 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:46:49.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:49.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:49.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:49.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:49.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:49.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:49.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:49.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:49.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:49.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:49.477 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:46:49.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:49.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:49.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:49.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:49.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:46:50.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:50.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:50.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:50.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:50.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:50.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:50.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:50.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:50.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:50.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:50.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:50.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:50.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:50.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:50.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:50.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:50.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:50.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:46:50.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:50.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:50.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:50.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:50.874 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:46:51.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:46:51.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:51.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:51.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:51.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:51.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:51.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:51.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:51.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:51.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:51.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:51.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:51.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:51.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:51.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:51.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:51.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:51.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:51.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:51.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:51.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:51.806 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:46:52.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:46:52.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:52.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:52.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:52.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:52.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:52.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:52.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:52.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:52.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:52.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:52.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:52.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:52.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:52.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:52.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:52.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:52.738 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:46:52.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:52.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:52.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:52.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:52.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:53.203 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:46:53.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:46:53.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:46:53.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:46:53.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:46:53.668 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:46:54.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:54.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:54.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:54.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:54.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:54.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:54.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:54.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:46:54.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:54.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:54.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:54.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:54.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:54.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:54.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:54.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:54.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:54.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:54.600 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:46:55.067 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:46:55.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:55.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:55.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:55.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:55.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:55.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:55.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:55.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:55.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:55.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:55.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:55.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:55.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:55.251 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:55.251 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:46:55.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:55.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:55.533 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:46:56.000 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:46:56.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:56.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:56.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:56.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:56.196 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:56.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:56.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:56.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:56.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:56.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:56.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:56.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:56.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:56.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:56.259 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:46:56.259 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:46:56.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:56.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:56.466 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:46:56.932 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:46:57.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:57.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:57.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:57.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:57.208 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:46:57.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:57.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:57.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:57.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:57.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:57.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:57.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:57.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:57.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:57.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:57.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:57.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:57.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:57.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:57.398 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:46:57.864 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:46:58.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:58.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:58.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:58.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:58.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:58.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:58.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:58.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:58.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:58.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:58.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:58.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:58.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:58.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:58.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:58.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:58.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:58.330 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:46:58.796 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:46:59.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:59.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:59.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:59.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:59.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:46:59.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:46:59.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:46:59.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:59.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:59.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:59.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:46:59.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:46:59.262 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:46:59.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:46:59.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:46:59.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:46:59.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:46:59.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:59.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:46:59.727 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:47:00.192 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:47:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:00.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:00.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:00.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:00.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:00.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:00.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:00.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:00.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:00.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:00.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:00.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:00.658 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:47:00.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:00.664 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:00.664 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:47:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:01.123 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:47:01.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:01.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:01.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:01.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:01.542 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:01.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:01.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:01.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:01.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:01.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:01.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:01.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:01.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:01.589 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:47:01.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:01.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:01.608 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:47:01.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:01.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:02.054 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:47:02.520 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:47:02.986 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:47:03.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:03.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:03.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:03.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:03.018 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:03.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:03.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:03.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:03.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:03.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:03.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:03.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:03.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:03.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:03.084 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:03.084 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:03.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:03.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:03.451 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:47:03.916 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:47:04.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:04.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:04.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:04.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:04.071 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:04.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:04.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:04.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:04.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:04.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:04.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:04.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:04.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:04.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:04.137 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:04.137 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:04.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:04.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:04.380 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:47:04.845 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:47:05.311 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:47:05.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:05.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:05.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:05.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:05.483 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:05.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:05.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:05.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:05.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:05.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:05.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:05.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:05.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:05.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:05.553 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:05.553 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:05.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:05.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:05.777 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:47:06.243 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:47:06.708 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:47:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:06.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:06.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:06.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:06.900 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:06.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:06.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:06.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:06.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:06.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:06.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:06.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:06.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:06.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:06.965 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:06.965 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:06.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:06.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:07.173 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:47:07.638 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:47:08.105 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:47:08.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:08.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:08.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:08.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:08.312 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:08.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:08.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:08.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:08.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:08.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:08.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:08.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:08.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:08.386 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:08.386 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:08.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:08.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:08.570 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:47:09.036 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:47:09.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:09.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:09.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:09.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:09.425 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:09.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:09.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:09.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:09.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:09.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:09.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:09.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:09.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:09.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:09.492 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:09.492 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:09.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:09.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:09.501 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:47:09.967 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:47:10.432 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:47:10.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:10.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:10.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:10.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:10.842 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:10.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:10.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:10.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:10.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:10.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:10.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:10.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:10.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:10.898 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:47:10.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:10.918 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:10.918 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:10.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:10.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:11.364 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:47:11.829 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:47:12.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:12.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:12.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:12.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:12.254 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:12.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:12.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:12.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:12.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:12.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:12.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:12.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:12.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:12.295 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:47:12.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:12.320 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:12.320 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:12.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:12.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:12.761 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:47:13.227 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:47:13.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:13.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:13.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:13.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:13.671 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:13.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:13.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:13.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:13.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:13.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:13.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:13.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:13.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:13.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:47:13.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:47:13.680 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:47:18.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:47:18.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:47:18.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:18.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:18.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:18.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:18.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:18.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:47:18.693 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:18.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:47:18.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:47:18.696 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:47:18.697 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:47:18.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:47:18.697 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:18.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:18.697 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:47:18.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:47:18.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:47:18.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:18.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:47:18.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:47:18.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:47:18.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:18.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:18.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:47:18.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:47:18.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:47:18.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:18.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:47:18.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:47:18.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:47:18.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:18.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:18.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:47:18.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:47:18.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:47:18.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:18.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:47:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:47:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:47:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:47:18.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:47:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:18.712 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:47:18.712 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:47:18.712 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:47:18.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:47:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:18.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:18.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:47:18.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:47:18.715 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:47:18.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:18.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:18.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:47:23.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:47:23.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:23.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:23.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:23.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:23.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:23.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:47:23.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:23.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:47:23.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:47:23.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:47:23.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:47:23.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:47:23.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:23.734 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:47:23.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:47:23.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:47:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:23.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:47:23.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:47:23.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:47:23.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:23.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:23.738 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:47:23.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:47:23.738 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:47:23.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:23.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:47:23.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:47:23.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:47:23.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:23.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:23.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:47:23.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:47:23.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:47:23.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:23.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:47:23.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:47:23.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:47:23.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:47:23.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:47:23.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:47:23.751 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:47:23.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:23.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:47:24.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:47:24.282 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:47:24.284 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:47:24.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:24.285 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:47:24.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:24.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:24.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:24.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:24.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:24.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:24.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:24.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:24.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:24.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:24.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:24.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:24.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:47:24.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:24.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:24.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:25.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:47:25.620 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:47:25.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:25.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:25.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:26.085 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:47:26.551 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:47:26.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:26.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:26.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:26.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:27.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:47:27.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:27.482 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:47:27.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:27.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:27.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:27.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:27.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:47:28.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:28.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:28.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:28.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:28.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:28.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:28.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:28.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:28.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:28.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:28.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:28.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:28.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:28.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:28.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:28.413 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:47:28.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:28.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:28.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:28.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:28.879 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:47:29.345 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:47:29.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:47:30.277 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:47:30.742 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:47:31.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:31.208 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:47:31.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:47:31.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:31.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:31.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:31.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:31.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:31.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:31.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:31.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:31.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:31.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:31.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:31.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:31.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:31.879 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:31.879 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:47:31.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:31.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:32.139 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:47:32.605 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:47:33.071 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:47:33.536 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:47:34.002 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:47:34.468 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:47:34.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:34.934 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:47:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:35.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:35.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:35.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:35.382 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:35.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:35.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:35.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:35.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:35.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:35.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:35.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:35.400 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:47:35.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:35.400 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:47:35.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:35.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:35.866 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:47:36.331 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:47:36.797 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:47:37.263 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:47:37.729 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:47:38.194 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:47:38.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:38.660 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:47:39.126 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:47:39.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:39.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:39.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:39.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:39.238 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:39.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:39.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:39.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:39.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:39.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:39.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:39.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:39.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:39.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:39.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:39.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:39.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:39.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:39.591 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:47:40.057 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:47:40.523 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:47:40.989 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:47:41.455 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:47:41.920 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:47:42.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:42.386 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:47:42.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:42.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:42.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:42.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:42.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:42.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:42.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:42.852 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:47:42.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:42.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:42.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:42.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:42.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:43.318 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:47:43.784 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:47:44.249 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:47:44.713 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:47:45.179 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:47:45.644 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:47:45.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:46.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:46.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:46.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:46.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:46.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:46.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:46.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:46.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:46.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:46.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:46.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:46.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:46.109 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:47:46.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:46.142 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:46.142 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:46.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:46.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:46.575 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:47:47.040 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:47:47.505 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:47:47.970 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:47:48.436 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:47:48.902 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:47:49.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:49.367 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:47:49.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:49.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:49.754 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:49.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:49.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:49.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:49.782 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:47:49.782 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:47:49.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:49.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:49.832 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:47:50.298 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:47:50.763 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:47:51.229 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:47:51.695 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:47:52.161 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:47:52.627 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:47:53.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:53.092 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:47:53.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:53.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:53.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:53.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:53.483 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:47:53.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:53.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:53.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:53.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:53.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:53.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:53.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:47:53.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:47:53.492 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:47:53.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:53.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:58.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:47:58.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:47:58.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:58.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:58.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:58.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:58.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:47:58.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:47:58.508 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:58.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:47:58.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:47:58.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:47:58.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:47:58.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:47:58.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:58.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:47:58.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:47:58.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:47:58.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:47:58.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:58.517 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:47:58.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:47:58.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:47:58.518 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:58.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:47:58.518 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:47:58.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:47:58.518 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:47:58.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:58.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:47:58.523 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:47:58.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:47:58.523 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:47:58.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:47:58.523 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:47:58.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:47:58.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:47:58.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:58.530 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:47:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:47:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:47:58.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:47:58.530 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:47:58.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:47:58.531 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:47:58.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:47:58.536 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:47:59.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:47:59.064 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:47:59.066 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:47:59.067 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:47:59.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:47:59.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:47:59.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:47:59.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:47:59.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:59.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:59.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:59.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:47:59.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:47:59.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:47:59.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:47:59.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:47:59.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:59.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:47:59.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:47:59.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:47:59.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:47:59.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:47:59.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:47:59.933 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:48:00.399 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:48:00.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:00.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:00.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:00.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:00.864 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:48:01.330 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:48:01.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:01.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:01.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:01.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:48:02.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:02.261 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:48:02.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:02.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:02.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:02.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:02.727 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:48:02.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:02.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:02.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:02.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:02.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:02.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:02.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:02.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:02.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:02.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:02.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:02.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:02.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:02.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:02.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:03.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:48:03.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:03.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:03.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:03.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:03.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:48:04.124 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:48:04.589 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:48:05.054 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:48:05.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:48:05.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:05.983 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:48:06.449 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:48:06.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:06.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:06.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:06.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:06.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:06.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:06.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:06.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:06.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:06.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:06.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:06.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:06.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:06.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:06.914 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:48:07.379 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:48:07.845 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:48:08.310 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:48:08.776 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:48:09.241 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:48:09.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:09.705 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:48:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:48:10.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:10.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:10.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:10.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:10.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:10.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:10.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:10.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:10.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:10.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:10.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:10.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:10.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:10.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:10.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:10.636 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:48:10.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:11.102 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:48:11.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:11.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:11.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:11.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:11.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:11.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:11.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:11.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:11.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:11.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:11.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:11.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:11.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:11.402 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:11.402 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:48:11.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:11.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:11.568 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:48:12.033 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:48:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:48:12.964 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:48:13.429 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:48:13.895 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:48:14.360 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:48:14.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:14.825 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:48:14.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:14.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:14.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:14.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:14.896 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:14.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:14.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:14.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:14.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:14.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:14.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:14.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:14.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:14.916 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:48:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:15.291 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:48:15.756 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:48:16.222 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:48:16.688 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:48:17.153 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:48:17.619 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:48:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:18.085 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:48:18.550 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:48:18.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:18.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:18.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:18.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:18.694 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:18.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:18.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:18.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:18.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:18.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:18.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:18.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:18.732 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:48:18.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:18.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:19.016 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:48:19.481 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:48:19.946 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:48:20.421 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:48:20.885 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:48:21.351 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:48:21.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:21.816 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:48:22.282 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:48:22.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:22.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:22.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:22.501 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:22.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:22.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:22.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:22.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:22.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:22.516 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:22.516 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:48:22.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:22.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:22.748 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:48:22.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:23.213 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:48:23.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:23.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:23.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:23.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:23.452 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:23.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:23.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:23.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:23.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:23.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:23.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:23.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:23.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:23.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:23.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:23.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:23.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:23.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:23.678 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:48:24.142 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:48:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:48:25.070 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:48:25.534 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:48:25.998 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:48:26.462 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:48:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:26.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:26.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:26.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:26.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:26.925 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:48:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:26.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:26.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:26.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:26.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:27.390 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:48:27.855 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:48:28.320 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:48:28.785 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:48:29.251 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:48:29.716 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:48:29.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:30.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:30.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:30.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:30.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:30.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:30.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:30.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:30.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:30.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:30.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:30.181 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:48:30.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:30.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:30.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:30.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:30.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:30.646 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:48:31.110 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:48:31.574 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:48:32.038 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:48:32.502 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:48:32.968 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:48:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:33.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:33.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:33.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:33.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:33.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:33.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:33.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:33.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:33.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:33.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:33.433 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:48:33.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:33.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:33.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:33.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:33.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:33.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:33.898 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:48:34.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:34.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:34.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:34.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:34.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:34.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:34.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:34.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:34.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:34.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:34.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:34.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:34.362 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:48:34.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:34.403 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:34.403 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:48:34.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:34.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:34.826 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:48:35.291 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:48:35.755 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:48:36.219 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:48:36.684 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:48:37.149 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:48:37.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:37.614 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:48:38.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:38.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:38.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:38.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:38.005 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:38.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:38.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:38.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:38.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:38.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:38.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:38.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:38.032 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:38.032 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:48:38.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:38.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:38.079 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:48:38.544 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:48:39.009 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:48:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:48:39.938 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:48:40.404 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:48:40.869 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:48:41.335 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:48:41.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:41.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:41.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:41.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:41.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:41.724 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:41.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:41.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:41.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:41.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:41.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:41.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:41.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:41.752 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:41.752 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:48:41.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:41.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:41.800 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:48:42.265 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:48:42.730 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:48:43.195 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:48:43.660 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:48:44.125 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:48:44.591 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:48:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:45.056 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:48:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:45.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:45.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:45.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:45.445 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:45.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:45.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:45.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:45.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:45.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:45.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:45.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:48:45.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:48:45.472 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:48:45.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:45.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:45.521 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:48:45.986 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:48:46.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:46.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:46.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:46.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:46.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:46.377 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:48:46.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:46.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:46.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:46.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:46.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:48:46.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:48:46.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:48:46.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:48:46.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:48:46.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:48:46.386 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:48:51.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:48:51.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:48:51.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:48:51.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:48:51.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:48:51.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:48:51.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:48:51.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:48:51.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:51.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:48:51.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:48:51.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:48:51.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:48:51.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:48:51.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:51.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:48:51.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:48:51.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:48:51.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:48:51.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:51.408 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:48:51.408 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:48:51.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:48:51.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:51.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:48:51.409 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:48:51.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:48:51.409 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:48:51.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:51.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:48:51.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:48:51.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:48:51.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:51.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:48:51.414 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:48:51.414 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:48:51.414 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:48:51.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:51.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:48:51.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:48:51.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:48:51.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:48:51.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:48:51.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:48:51.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:48:51.421 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:48:51.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:51.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:48:51.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:48:51.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:48:51.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:48:51.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:48:51.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:48:51.426 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:48:56.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:48:56.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:48:56.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:48:56.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:48:56.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:48:56.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:48:56.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:48:56.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:48:56.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:56.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:48:56.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:48:56.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:48:56.451 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:48:56.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:48:56.451 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:56.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:48:56.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:48:56.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:48:56.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:48:56.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:56.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:48:56.455 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:48:56.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:48:56.455 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:56.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:48:56.455 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:48:56.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:48:56.456 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:48:56.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:56.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:48:56.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:48:56.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:48:56.460 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:48:56.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:48:56.460 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:48:56.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:48:56.460 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:48:56.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:56.466 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:48:56.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:48:56.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:48:56.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:48:56.466 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:48:56.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:48:56.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:48:56.467 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.467 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:48:56.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:48:56.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:48:56.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:48:56.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:48:56.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:48:56.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:48:56.995 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:48:56.996 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:48:56.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:48:56.997 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:48:57.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:48:57.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:48:57.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:48:57.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:48:57.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:48:57.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:48:57.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:48:57.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:48:57.403 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:48:57.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:57.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:57.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:57.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:57.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:48:58.334 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:48:58.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:58.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:58.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:58.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:58.799 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:48:59.264 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:48:59.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:48:59.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:48:59.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:48:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:48:59.730 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:49:00.195 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:49:00.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:00.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:00.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:00.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:00.659 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:49:01.124 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:49:01.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:01.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:01.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:01.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:01.588 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:49:02.055 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:49:02.520 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:49:02.983 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:49:03.447 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:49:03.911 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:49:04.376 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:49:04.839 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:49:05.302 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:49:05.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:05.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:05.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:05.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:05.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:05.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:05.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:05.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:05.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:05.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:05.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:05.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:05.664 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:49:05.665 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:05.665 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:05.665 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:05.665 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:05.665 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:10.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:10.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:10.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:10.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:10.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:10.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:10.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:10.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:10.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:10.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:10.676 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:49:10.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:49:10.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:49:10.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:10.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:10.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:10.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:49:10.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:10.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:49:10.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:10.684 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:49:10.684 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:49:10.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:10.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:10.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:10.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:49:10.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:10.685 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:49:10.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:10.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:49:10.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:49:10.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:10.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:10.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:10.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:49:10.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:10.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:49:10.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:49:10.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:49:10.697 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:49:10.697 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:49:10.697 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:49:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:10.702 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:49:11.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:49:11.237 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:11.238 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:49:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:11.239 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:49:11.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:11.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:11.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:11.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:11.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:11.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:11.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:11.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:11.630 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:49:11.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:11.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:11.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:11.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:12.094 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:49:12.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:49:12.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:12.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:12.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:12.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:13.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:49:13.483 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:49:13.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:13.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:13.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:13.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:13.946 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:49:14.409 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:49:14.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:14.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:14.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:14.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:14.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:49:15.336 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:49:15.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:15.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:15.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:15.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:15.800 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:49:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:49:16.726 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:49:17.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:49:17.656 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:49:18.121 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:49:18.586 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:49:19.051 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:49:19.517 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:49:19.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:19.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:19.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:19.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:19.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:19.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:19.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:19.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:19.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:19.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:19.855 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:49:19.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:19.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:24.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:24.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:24.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:24.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:24.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:24.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:24.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:24.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:24.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:24.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:24.867 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:49:24.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:49:24.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:49:24.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:24.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:24.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:24.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:49:24.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:24.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:49:24.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:24.872 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:49:24.872 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:49:24.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:24.872 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:24.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:24.872 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:49:24.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:24.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:49:24.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:24.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:24.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:49:24.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:49:24.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:49:24.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:49:24.882 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:49:24.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:24.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:24.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:49:25.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:49:25.402 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:25.402 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:49:25.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:25.403 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:49:25.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:25.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:25.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:25.813 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:49:25.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:25.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:25.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:25.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:26.276 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:49:26.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:26.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:26.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:26.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:26.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:26.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:49:26.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:26.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:26.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:26.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:27.203 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:49:27.667 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:49:27.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:27.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:27.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:27.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:28.130 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:49:28.594 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:49:28.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:28.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:28.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:28.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:29.057 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:49:29.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:49:29.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:29.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:49:30.449 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:49:30.912 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:49:31.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:49:31.840 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:49:32.304 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:49:32.768 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:49:33.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:49:33.696 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:49:34.160 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:49:34.623 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:49:35.087 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:49:35.550 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:49:36.013 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:49:36.476 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:49:36.939 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:49:37.403 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:49:37.867 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:49:38.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:38.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:38.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:38.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:38.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:38.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:38.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:38.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:38.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:38.135 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:49:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:38.135 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2916 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:43.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:43.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:43.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:43.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:43.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:43.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:43.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:43.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:43.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:43.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:43.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:49:43.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:49:43.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:49:43.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:43.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:43.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:43.158 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:49:43.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:43.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:49:43.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:43.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:49:43.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:49:43.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:43.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:43.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:43.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:49:43.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:43.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:49:43.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:43.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:43.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:49:43.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:43.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:49:43.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:49:43.174 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:49:43.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:43.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:43.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:49:43.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:49:43.699 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:43.700 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:49:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:43.701 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:49:43.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:43.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:43.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:43.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:43.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:43.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:43.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:43.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:44.104 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:49:44.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:44.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:44.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:44.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:44.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:49:44.730 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:45.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:49:45.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:45.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:45.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:45.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:45.236 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:45.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:49:45.743 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:45.957 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:49:46.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:46.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:46.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:46.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:46.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:49:46.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:49:47.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:47.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:47.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:47.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:47.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:49:47.745 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:49:48.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:48.249 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:48.275 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:49:48.739 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:49:48.752 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:49.203 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:49:49.259 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:49.667 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:49:50.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:49:50.595 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:49:51.059 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:49:51.262 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:51.523 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:49:51.987 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:49:52.451 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:49:52.915 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:49:53.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:53.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:53.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:53.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:53.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:53.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:53.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:53.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:53.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:53.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:53.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:53.276 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:49:53.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2221 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2221 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2221 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2221 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:53.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2222 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:49:58.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:49:58.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:49:58.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:58.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:58.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:58.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:58.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:49:58.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:58.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:58.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:49:58.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:49:58.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:49:58.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:49:58.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:58.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:58.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:49:58.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:49:58.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:49:58.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:49:58.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:58.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:49:58.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:49:58.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:58.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:58.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:49:58.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:49:58.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:49:58.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:49:58.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:58.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:49:58.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:49:58.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:58.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:49:58.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:49:58.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:49:58.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:49:58.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:49:58.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:58.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:49:58.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:49:58.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:49:58.298 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:49:58.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:58.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:49:58.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:49:58.814 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:49:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:58.815 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:49:58.816 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:49:58.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:58.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:58.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:58.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:58.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:58.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:58.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:58.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:58.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:58.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:58.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:58.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:58.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:58.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:58.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:58.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:58.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:58.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:58.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:58.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:58.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:58.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:58.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:58.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:58.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:58.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:58.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:58.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:58.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:58.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:58.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:58.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:58.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:58.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:58.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.230 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:49:59.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:49:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:49:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:49:59.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:49:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:49:59.556 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:49:59.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.563 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:49:59.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.601 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:49:59.602 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:49:59.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.617 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:49:59.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:59.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:49:59.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:49:59.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.781 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:49:59.781 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:49:59.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.789 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:49:59.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.829 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:49:59.829 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:49:59.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.836 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:49:59.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:49:59.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:49:59.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:49:59.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:49:59.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:49:59.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:49:59.874 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:49:59.874 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:49:59.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:49:59.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:49:59.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:49:59.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:49:59.992 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:00.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:00.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:00.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:00.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:00.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:00.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:00.016 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:00.016 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:00.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.156 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:50:00.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:00.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:00.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:00.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:00.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:00.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.473 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:00.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:00.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:00.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:00.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:00.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:00.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:00.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:00.528 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:00.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:50:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:00.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.726 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:00.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:00.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:00.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:00.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:00.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:00.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:00.755 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:00.756 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:00.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:00.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.971 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:00.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:00.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:00.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:00.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:00.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:00.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:00.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:00.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:00.992 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:00.992 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:00.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:00.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:50:01.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.216 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:01.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:01.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:01.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:01.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:01.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:01.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:01.263 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:01.263 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:01.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:01.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:01.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:01.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:01.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.470 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:01.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:01.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:01.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:01.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:01.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:01.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:01.499 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:01.499 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:01.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.544 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:50:01.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.728 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:01.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:01.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:01.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:01.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:01.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:01.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:01.780 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:50:01.780 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:50:01.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:01.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:01.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:01.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:01.973 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:50:01.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:01.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:01.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:01.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:01.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:01.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:01.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:01.980 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:50:01.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:01.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:01.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:01.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=810 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:06.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:06.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:06.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:06.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:06.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:06.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:06.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:06.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:06.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:06.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:06.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:50:06.994 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:50:06.994 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:50:06.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:06.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:06.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:06.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:50:06.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:06.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:50:06.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:06.998 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:06.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:50:06.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:07.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:50:07.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:50:07.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:07.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:07.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:07.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:50:07.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:07.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:50:07.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:50:07.009 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:50:07.009 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:50:07.009 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:07.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:07.014 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:50:07.476 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:50:07.536 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:50:07.538 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:50:07.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:07.539 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:50:07.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:07.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:07.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:07.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:07.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:07.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:07.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:07.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:07.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 02:50:07.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:07.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:07.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:07.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:07.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:07.939 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:50:08.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:08.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:08.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:08.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:08.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:50:08.866 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:50:09.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:09.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:09.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:09.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:09.329 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:50:09.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:09.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:09.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:09.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:09.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:09.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:09.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:09.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:09.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:09.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:09.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:09.640 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:50:09.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:09.641 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=579 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:09.641 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=579 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:09.641 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=579 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:09.641 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=579 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:14.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:14.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:14.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:14.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:14.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:14.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:14.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:14.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:14.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:14.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:14.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:50:14.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:50:14.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:50:14.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:14.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:14.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:14.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:50:14.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:14.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:50:14.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:14.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:14.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:50:14.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:14.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:50:14.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:50:14.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:14.664 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:14.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:14.664 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:50:14.664 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:14.664 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:50:14.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:14.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:50:14.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:50:14.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:50:14.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:50:14.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:50:14.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:50:14.670 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:50:14.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:14.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:14.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:14.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:14.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:14.674 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:50:19.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:19.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:19.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:19.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:19.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:19.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:19.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:19.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:19.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:19.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:19.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:19.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:19.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:50:19.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:19.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:50:19.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:50:19.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:19.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:19.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:19.696 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:50:19.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:19.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:50:19.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:19.699 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:50:19.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:50:19.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:19.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:19.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:19.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:50:19.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:19.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:50:19.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:19.704 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:50:19.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:50:19.706 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:50:19.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:19.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:50:20.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:50:20.228 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:50:20.230 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:50:20.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:20.230 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:50:20.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:50:20.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:20.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:20.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:20.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:21.101 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:50:21.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:50:21.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:21.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:21.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:21.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:22.029 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:50:22.491 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:50:22.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:22.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:22.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:22.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:22.954 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:50:23.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:50:23.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:23.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:23.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:23.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:23.879 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:50:24.342 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:50:24.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:24.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:24.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:24.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:24.806 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:50:25.269 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:50:25.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:25.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:25.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:25.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:25.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:25.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:25.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:25.719 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:50:25.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:25.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:25.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:25.720 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:30.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:30.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:30.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:30.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:30.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:30.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:30.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:30.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:30.730 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:30.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:30.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:50:30.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:50:30.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:50:30.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:30.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:30.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:30.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:50:30.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:30.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:50:30.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:30.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:50:30.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:50:30.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:30.739 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:30.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:30.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:50:30.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:30.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:50:30.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:30.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:50:30.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:50:30.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:30.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:30.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:30.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:50:30.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:30.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:50:30.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:30.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:50:30.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:50:30.752 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:50:30.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:30.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:50:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:50:31.275 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:50:31.276 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:50:31.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:31.277 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:50:31.687 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:50:31.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:31.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:31.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:31.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:32.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:50:32.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:50:32.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:32.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:32.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:32.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:33.082 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:50:33.547 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:50:33.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:33.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:33.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:33.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:34.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:50:34.474 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:50:34.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:34.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:34.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:34.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:34.936 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:50:35.399 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:50:35.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:35.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:35.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:35.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:35.862 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:50:36.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:36.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:36.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:36.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:36.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:36.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:36.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:36.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:36.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:36.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:36.285 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:36.285 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1216 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:50:41.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:41.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:41.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:41.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:41.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:41.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:41.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:41.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:41.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:41.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:41.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:50:41.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:50:41.296 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:50:41.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:41.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:41.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:41.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:50:41.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:41.297 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:50:41.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:41.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:41.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:50:41.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:41.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:50:41.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:50:41.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:41.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:41.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:41.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:50:41.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:41.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:50:41.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:50:41.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:50:41.305 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:50:41.306 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:41.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:41.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:41.308 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:50:46.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:50:46.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:50:46.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:46.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:46.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:46.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:46.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:50:46.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:46.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:46.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:50:46.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:50:46.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:50:46.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:50:46.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:46.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:46.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:50:46.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:50:46.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:50:46.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:50:46.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:46.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:50:46.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:50:46.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:46.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:46.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:50:46.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:50:46.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:50:46.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:50:46.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:46.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:50:46.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:50:46.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:46.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:50:46.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:50:46.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:50:46.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:50:46.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:50:46.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:46.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:50:46.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:50:46.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:50:46.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:50:46.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:50:46.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:50:46.326 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:50:46.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:50:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:50:46.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:50:46.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:50:46.838 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:50:46.839 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:50:46.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:50:46.839 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:50:46.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:50:46.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:50:46.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:50:47.256 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:50:47.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:47.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:47.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:47.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:47.718 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:50:47.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:50:47.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:50:47.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:50:47.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:50:47.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:50:48.181 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:50:48.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:48.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:48.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:48.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:48.644 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:50:49.107 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:50:49.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:49.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:49.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:49.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:49.570 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:50:50.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:50:50.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:50.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:50.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:50.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:50.496 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:50:50.958 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:50:51.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:50:51.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:50:51.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:50:51.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:50:51.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:50:51.884 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:50:52.347 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:50:52.810 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:50:53.273 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:50:53.736 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:50:54.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:50:54.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:50:55.123 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:50:55.586 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:50:56.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:50:56.511 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:50:56.974 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:50:57.436 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:50:57.899 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:50:58.362 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:50:58.824 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:50:59.287 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:50:59.749 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:51:00.212 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:51:00.674 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:51:01.136 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:51:01.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:01.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:01.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:01.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:01.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:01.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:01.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:01.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:01.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:01.430 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:51:01.430 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3330 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:01.430 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3330 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:01.430 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3330 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:01.430 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3330 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:01.430 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3330 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:01.430 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3330 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:06.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:06.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:06.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:06.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:06.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:06.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:06.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:06.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:06.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:06.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:06.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:51:06.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:51:06.443 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:51:06.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:06.443 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:06.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:06.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:51:06.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:06.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:51:06.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:06.445 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:51:06.445 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:51:06.445 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:06.445 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:06.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:06.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:51:06.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:06.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:51:06.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:06.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:51:06.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:51:06.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:06.448 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:06.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:51:06.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:06.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:51:06.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:06.451 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:51:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:51:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:51:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.452 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:51:06.452 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:51:06.452 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:51:06.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:06.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:06.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:06.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:06.457 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:51:06.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:51:06.965 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:06.966 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:06.966 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:51:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:06.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:06.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:06.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:51:06.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:06.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:06.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:06.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:51:06.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:51:07.009 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:07.010 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:07.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:07.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:07.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:07.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:07.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:07.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:51:07.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:07.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:07.846 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:51:08.309 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:51:08.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:08.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:08.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:08.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:08.771 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:51:09.234 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:51:09.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:09.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:09.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:09.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:09.699 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:51:10.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:51:10.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:10.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:51:11.090 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:51:11.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:11.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:11.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:11.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:11.553 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:51:12.016 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:51:12.478 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:51:12.941 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:51:13.404 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:51:13.866 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:51:14.329 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:51:14.791 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:51:15.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:15.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:15.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:15.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:15.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:15.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:15.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:15.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:15.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:15.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:15.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:15.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:15.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:15.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:15.022 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:51:15.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1888 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:15.022 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1888 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:20.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:20.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:20.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:20.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:20.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:20.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:20.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:20.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:20.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:20.032 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:51:20.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:20.034 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:51:20.034 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:51:20.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:20.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:20.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:20.035 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:51:20.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:20.035 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:51:20.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:20.036 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:51:20.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:51:20.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:20.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:20.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:20.037 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:51:20.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:20.037 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:51:20.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:20.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:51:20.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:51:20.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:51:20.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:51:20.039 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:51:20.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:51:20.040 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:51:20.040 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:20.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:51:20.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:51:20.552 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:20.553 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:20.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:20.553 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:51:20.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:20.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:20.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:51:20.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:20.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:20.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:20.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:51:20.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:51:20.597 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:20.598 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:20.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:20.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:20.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:20.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:20.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:20.971 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:51:21.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:21.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:21.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:21.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:21.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:51:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:51:22.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:22.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:22.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:22.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:22.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:51:22.827 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:51:23.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:23.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:23.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:23.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:23.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:51:23.754 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:51:24.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:24.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:24.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:24.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:24.217 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:51:24.680 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:51:25.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:25.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:25.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:25.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:25.143 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:51:25.619 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:51:26.082 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:51:26.545 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:51:27.008 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:51:27.471 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:51:27.934 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:51:28.397 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:51:28.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:28.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:28.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:28.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:28.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:28.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:28.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:28.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:28.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:28.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:28.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:28.611 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:51:28.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:28.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:28.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:28.611 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1885 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:33.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:33.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:33.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:33.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:33.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:33.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:33.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:33.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:33.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:33.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:33.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:51:33.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:51:33.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:51:33.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:33.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:33.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:33.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:51:33.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:33.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:51:33.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:33.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:51:33.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:51:33.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:33.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:33.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:33.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:51:33.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:33.622 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:51:33.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:33.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:51:33.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:51:33.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:33.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:33.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:33.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:51:33.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:33.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:51:33.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:33.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:51:33.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:51:33.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:51:33.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:51:33.626 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:51:33.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:51:33.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:51:33.627 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:51:33.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:33.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:33.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:51:34.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:51:34.140 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:34.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:34.141 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:34.142 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:51:34.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:34.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:34.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:51:34.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:34.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:34.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:34.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:51:34.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:51:34.184 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:34.185 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:34.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:34.189 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:51:34.189 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:51:34.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:34.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:51:34.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:34.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:34.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:34.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:34.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:34.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:34.744 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:51:34.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:34.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:34.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:34.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:34.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:34.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:34.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:34.749 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:51:34.749 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:34.749 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:34.749 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:34.749 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:39.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:39.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:39.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:39.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:39.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:39.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:39.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:39.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:51:39.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:51:39.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:51:39.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:39.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:39.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:39.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:51:39.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:39.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:51:39.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:39.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:51:39.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:51:39.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:39.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:39.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:39.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:51:39.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:39.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:51:39.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:39.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:51:39.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:51:39.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:39.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:39.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:39.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:51:39.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:39.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:51:39.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:39.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:51:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:51:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:51:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:51:39.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:51:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:51:39.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:51:39.771 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:51:39.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:39.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:39.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:39.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:51:40.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:51:40.284 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:40.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:40.284 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:40.285 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:51:40.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:40.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:40.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:51:40.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:40.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:40.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:40.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:51:40.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:51:40.328 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:40.328 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:40.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:40.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:51:40.333 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:51:40.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:40.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:40.701 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:51:40.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:40.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:40.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:40.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:40.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:40.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:40.894 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:51:40.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:40.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:40.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:40.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:40.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:40.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:40.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:40.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:40.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:40.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:40.912 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:51:40.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.914 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.914 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.914 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.914 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.914 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:40.914 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:45.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:45.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:45.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:45.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:45.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:45.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:45.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:45.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:45.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:45.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:45.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:51:45.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:51:45.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:51:45.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:45.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:45.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:45.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:51:45.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:45.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:51:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:45.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:51:45.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:51:45.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:45.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:45.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:45.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:51:45.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:45.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:51:45.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:45.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:45.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:51:45.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:51:45.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:51:45.921 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:45.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:45.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:45.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:51:46.388 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:51:46.432 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:46.432 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:46.433 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:51:46.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:46.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:46.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:46.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:51:46.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:46.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:46.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:46.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:51:46.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:51:46.487 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:46.488 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:46.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:46.493 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:51:46.493 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:51:46.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:46.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:46.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:51:46.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:46.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:46.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:46.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:47.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:47.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:47.039 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:51:47.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:47.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:47.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:47.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:47.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:47.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:47.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:47.052 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:47.053 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=249 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:51:52.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:51:52.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:51:52.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:52.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:52.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:52.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:52.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:51:52.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:52.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:52.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:51:52.067 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:51:52.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:51:52.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:51:52.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:52.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:52.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:51:52.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:51:52.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:51:52.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:51:52.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:52.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:51:52.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:51:52.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:52.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:51:52.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:51:52.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:52.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:51:52.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:51:52.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:51:52.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:51:52.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:51:52.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:51:52.080 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:51:52.080 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:51:52.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:51:52.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:51:52.549 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:51:52.599 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:52.600 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:52.601 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:51:52.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:52.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:51:52.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:51:52.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:51:52.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:52.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:52.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:52.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:51:52.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:51:52.641 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:51:52.644 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:51:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:51:52.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:51:52.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:51:52.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:52.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:51:53.013 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:51:53.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:53.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:51:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:51:54.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:54.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:54.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:54.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:51:54.877 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:51:55.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:55.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:55.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:55.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:55.343 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:51:55.807 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:51:56.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:56.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:56.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:56.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:56.272 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:51:56.741 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:51:57.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:51:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:51:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:51:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:51:57.207 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:51:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:51:58.141 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:51:58.606 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:51:59.072 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:51:59.536 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:52:00.001 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:52:00.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:52:00.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:00.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:00.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:00.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:00.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:00.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:00.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:00.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:00.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:00.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:00.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:00.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:00.697 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:00.697 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:00.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:00.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:52:00.701 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:52:00.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:00.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:00.929 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:52:01.394 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:52:01.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:01.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:01.626 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:52:01.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:01.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:01.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:01.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:01.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:01.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:01.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:01.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:01.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:01.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:01.642 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:52:01.642 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2095 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:01.642 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2095 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:01.642 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2095 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:01.642 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2095 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:01.642 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2095 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:01.643 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2095 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:06.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:06.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:06.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:06.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:06.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:06.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:06.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:06.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:06.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:06.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:06.639 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:06.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:06.641 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:52:06.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:06.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:52:06.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:52:06.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:06.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:06.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:06.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:52:06.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:06.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:52:06.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:06.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:06.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:52:06.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.648 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:52:06.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:52:06.649 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:52:06.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:06.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:52:07.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:52:07.172 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:07.173 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:07.174 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:52:07.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:07.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:07.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:07.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:07.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:07.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:07.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:07.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:07.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:07.211 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:07.213 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:07.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:07.224 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:52:07.224 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:52:07.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:07.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:07.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:52:07.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:07.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:07.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:07.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:07.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:07.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:07.833 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:52:07.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:07.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:07.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:07.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:07.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:07.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:07.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:07.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:07.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:07.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:07.839 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:52:12.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:12.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:12.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:12.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:12.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:12.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:12.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:12.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:12.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:12.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:12.846 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:52:12.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:52:12.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:52:12.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:12.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:12.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:12.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:52:12.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:12.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:52:12.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:12.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:52:12.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:52:12.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:12.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:12.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:12.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:52:12.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:12.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:52:12.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:12.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:12.852 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:52:12.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:52:12.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:52:12.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:52:12.857 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:52:12.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:12.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:12.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:52:13.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:52:13.370 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:13.371 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:13.371 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:52:13.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:13.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:13.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:13.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:13.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:13.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:13.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:13.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:13.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:13.416 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:13.417 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:13.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:13.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:13.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:13.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:13.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:13.790 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:52:13.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:13.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:13.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:13.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:14.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:52:14.717 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:52:14.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:14.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:14.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:14.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:15.182 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:52:15.645 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:52:15.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:15.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:15.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:15.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:16.110 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:52:16.575 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:52:16.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:17.038 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:52:17.504 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:52:17.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:17.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:17.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:17.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:17.967 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:52:18.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:52:18.899 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:52:19.362 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:52:19.825 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:52:20.292 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:52:20.756 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:52:21.221 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:52:21.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:21.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:21.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:21.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:21.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:21.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:21.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:21.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:21.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:21.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:21.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:21.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:21.451 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:21.452 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:21.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:21.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:21.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:21.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:21.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:21.684 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:52:22.148 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:52:22.614 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:52:23.083 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:52:23.546 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:52:24.011 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:52:24.476 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:52:24.939 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:52:25.403 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:52:25.868 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:52:26.334 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:52:26.800 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:52:27.266 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:52:27.730 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:52:28.194 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:52:28.662 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:52:29.129 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:52:29.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:29.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:29.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:29.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:29.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:29.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:29.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:29.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:29.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:29.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:29.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:29.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:29.496 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:29.497 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:29.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:29.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:29.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:29.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:29.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:29.593 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:52:30.063 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:52:30.528 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:52:30.993 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:52:31.462 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:52:31.929 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:52:32.397 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:52:32.865 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:52:33.328 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:52:33.790 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:52:34.254 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:52:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:52:35.179 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:52:35.642 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:52:36.104 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:52:36.566 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:52:37.029 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:52:37.492 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:52:37.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:37.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:37.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:37.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:37.503 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=5411 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:37.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:37.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:37.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:37.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:37.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:37.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:37.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:37.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:37.532 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:37.532 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:37.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:37.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:37.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:37.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:37.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:37.954 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:52:38.416 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:52:38.879 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:52:39.341 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:52:39.803 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:52:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:52:40.728 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:52:41.190 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:52:41.652 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:52:42.114 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:52:42.577 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:52:43.039 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:52:43.501 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:52:43.964 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:52:44.426 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:52:44.889 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:52:45.351 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:52:45.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:45.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:45.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:45.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:45.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:45.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:45.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:45.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:45.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:45.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:45.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:45.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:45.542 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:52:45.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:45.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:50.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:50.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:50.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:50.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:50.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:50.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:50.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:50.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:50.550 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:50.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:50.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:52:50.551 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:52:50.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:52:50.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:50.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:50.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:50.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:52:50.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:50.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:52:50.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:50.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:52:50.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:52:50.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:50.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:50.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:50.554 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:52:50.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:50.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:52:50.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:50.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:52:50.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:52:50.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:50.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:50.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:50.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:52:50.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:50.556 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:52:50.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:50.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:52:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:52:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:52:50.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:52:50.559 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:52:50.559 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:52:50.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:50.564 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:52:51.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:52:51.071 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:51.071 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:51.072 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:52:51.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:51.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:51.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:51.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:51.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:51.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:51.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:51.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:51.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:51.116 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:51.117 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:51.121 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:52:51.121 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:52:51.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:51.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:51.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:52:51.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:51.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:51.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:51.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:51.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:52:52.416 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:52:52.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:52.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:52.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:52.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:52.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:52.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:52.636 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:52:52.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:52.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:52.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:52.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:52.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:52.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:52.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:52.640 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:52:52.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:52.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:52.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:52.640 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:52.640 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:52.640 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:52.640 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:52.640 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:52.640 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:57.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:57.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:57.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:57.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:57.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:57.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:57.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:57.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:57.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:57.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:52:57.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:57.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:52:57.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:52:57.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:57.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:52:57.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:52:57.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:57.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:57.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:57.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:52:57.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:52:57.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:52:57.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:57.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:52:57.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:52:57.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:57.654 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:52:57.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:57.654 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:52:57.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:52:57.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:52:57.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.659 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:52:57.659 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:52:57.659 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:52:57.660 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:52:57.664 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:52:58.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:52:58.173 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:58.173 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:58.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:58.174 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:52:58.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:58.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:58.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:52:58.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:58.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:52:58.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:52:58.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:52:58.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:52:58.217 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:52:58.218 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:52:58.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:52:58.223 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:52:58.223 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:52:58.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:58.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:52:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:52:58.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:58.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:58.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:58.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:58.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:52:58.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:52:58.777 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:52:58.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:52:58.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:52:58.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:52:58.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:52:58.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:52:58.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:52:58.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:52:58.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:52:58.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:52:58.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:52:58.781 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:52:58.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:58.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:58.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:58.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:52:58.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=247 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:03.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:03.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:03.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:03.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:03.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:03.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:03.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:03.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:03.788 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:03.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:03.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:53:03.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:53:03.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:53:03.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:03.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:03.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:03.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:53:03.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:03.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:53:03.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:03.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:53:03.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:53:03.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:03.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:03.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:03.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:53:03.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:03.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:53:03.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:03.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:53:03.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:53:03.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:03.795 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:03.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:03.795 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:53:03.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:03.796 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:53:03.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:53:03.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:53:03.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:53:03.799 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:03.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:03.804 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:53:04.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:53:04.314 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:53:04.315 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:53:04.316 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:53:04.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:04.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:04.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:04.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:53:04.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:04.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:53:04.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:53:04.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:53:04.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:53:04.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:04.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:53:04.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:53:04.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:04.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:04.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:53:04.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:04.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:04.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:04.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:05.191 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:53:05.655 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:53:05.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:05.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:05.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:05.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:06.117 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:53:06.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:53:06.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:06.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:06.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:06.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:07.042 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:53:07.505 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:53:07.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:07.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:07.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:07.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:07.969 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:53:08.432 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:53:08.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:08.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:08.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:08.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:08.895 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:53:09.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:53:09.821 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:53:10.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:53:10.746 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:53:11.208 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:53:11.672 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:53:12.134 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:53:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:12.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:12.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:12.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:12.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:12.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:12.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:12.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:12.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:12.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:12.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:12.370 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:53:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:17.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:17.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:17.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:17.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:17.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:17.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:17.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:17.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:17.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:17.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:17.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:53:17.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:53:17.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:53:17.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:17.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:17.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:17.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:53:17.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:17.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:53:17.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:17.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:53:17.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:53:17.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:17.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:17.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:17.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:53:17.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:17.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:53:17.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:17.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:53:17.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:53:17.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:17.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:17.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:17.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:53:17.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:17.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:53:17.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:53:17.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:53:17.388 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:53:17.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:17.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:17.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:17.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:53:17.858 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:53:17.900 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:53:17.901 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:53:17.901 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:53:17.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:17.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:17.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:17.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:53:17.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:17.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:53:17.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:53:17.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:53:17.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:53:17.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:17.950 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:53:17.950 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:53:17.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:17.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:18.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:53:18.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:18.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:18.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:18.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:18.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:53:19.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:53:19.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:19.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:19.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:19.708 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:53:20.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:53:20.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:20.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:20.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:20.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:20.633 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:53:21.095 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:53:21.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:21.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:21.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:21.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:21.558 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:53:22.020 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:53:22.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:22.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:22.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:22.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:22.483 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:53:22.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:53:23.407 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:53:23.870 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:53:24.332 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:53:24.794 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:53:25.256 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:53:25.719 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:53:25.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:25.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:25.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:25.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:25.952 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:53:25.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:25.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:25.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:25.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:25.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:25.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:25.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:25.960 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:53:30.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:30.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:30.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:30.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:30.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:30.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:30.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:30.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:30.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:30.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:30.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:53:30.969 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:53:30.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:53:30.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:30.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:30.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:30.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:53:30.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:30.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:53:30.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:30.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:30.971 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:53:30.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:30.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:30.974 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:53:30.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:30.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:53:30.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:53:30.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:53:30.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:53:30.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:53:30.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:53:30.979 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:53:30.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:30.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:53:31.446 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:53:31.493 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:53:31.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:31.494 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:53:31.495 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:53:31.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:31.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:31.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:53:31.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:31.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:53:31.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:53:31.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:53:31.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:53:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:53:31.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:31.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:31.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:31.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:32.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:53:32.836 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:53:32.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:32.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:32.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:32.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:33.300 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:53:33.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:53:33.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:33.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:33.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:33.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:34.229 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:53:34.692 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:53:34.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:34.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:34.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:34.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:35.154 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:53:35.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:53:35.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:35.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:35.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:35.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:36.083 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:53:36.547 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:53:37.010 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:53:37.473 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:53:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:53:38.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:38.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:38.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:38.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:38.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:38.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:38.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:38.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:38.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:38.101 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:53:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:43.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:43.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:43.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:43.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:43.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:43.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:43.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:43.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:43.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:43.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:43.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:43.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:43.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:53:43.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:43.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:43.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:53:43.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:43.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:43.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:53:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:43.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:53:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:53:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:53:43.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:53:43.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:53:43.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:53:43.125 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:53:43.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:43.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:53:43.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:53:43.643 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:53:43.644 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:53:43.645 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:53:43.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:43.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:43.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:43.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:53:43.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:43.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:53:43.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:53:43.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:53:43.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:53:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:53:44.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:44.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:44.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:44.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:44.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:53:44.987 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:53:45.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:45.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:45.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:45.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:45.450 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:53:45.913 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:53:46.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:46.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:46.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:46.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:46.377 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:53:46.841 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:53:47.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:47.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:47.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:47.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:47.304 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:53:47.768 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:53:48.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:48.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:48.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:48.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:48.232 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:53:48.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:48.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:48.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:48.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:48.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:48.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:48.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:48.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:48.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:48.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:48.256 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:48.256 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:48.256 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:48.256 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:48.256 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:48.256 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:53:48.695 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:53:49.158 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:53:49.622 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:53:50.085 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:53:50.548 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:53:51.012 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:53:51.474 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:53:51.938 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:53:52.403 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:53:52.870 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:53:53.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:53.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:53.252 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:53:53.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:53.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:53.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:53.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:53.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:53.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:53.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:53.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:53.266 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:53.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:53.266 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:53:53.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:53:53.268 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:53:53.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:53.268 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:53.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:53.268 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:53:53.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:53.268 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:53:53.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:53.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:53.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:53:53.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:53.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:53:53.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:53:53.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:53.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:53.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:53.274 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:53:53.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:53.274 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:53:53.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:53.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:53:53.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:53:53.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:53:53.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:53:53.277 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:53:53.277 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:53:53.277 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:53.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:53.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:53.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:53.279 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:53.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:53:58.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:53:58.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:58.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:58.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:58.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:58.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:53:58.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:58.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:58.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:53:58.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:53:58.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:53:58.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:53:58.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:58.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:58.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:53:58.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:53:58.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:53:58.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:53:58.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:58.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:53:58.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:53:58.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:58.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:58.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:53:58.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:53:58.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:53:58.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:53:58.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:58.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:53:58.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:53:58.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:58.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:53:58.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:53:58.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:53:58.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:53:58.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:53:58.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:58.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:53:58.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:53:58.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:53:58.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:53:58.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:53:58.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:53:58.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:53:58.297 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:53:58.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:53:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:53:58.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:53:58.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:53:58.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:53:58.810 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:53:58.810 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:53:58.810 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:53:58.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:53:58.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:53:58.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:53:58.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:53:58.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:53:58.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:53:58.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:53:58.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:53:58.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:53:59.227 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:53:59.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:53:59.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:53:59.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:53:59.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:53:59.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:54:00.151 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:54:00.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:00.615 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:54:01.077 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:54:01.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:01.540 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:54:02.002 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:54:02.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:02.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:02.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:02.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:02.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:54:02.927 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:54:03.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:03.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:03.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:03.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:03.390 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:54:03.862 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:54:04.325 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:54:04.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:04.788 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:54:05.250 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:54:05.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:05.713 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:54:06.176 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:54:06.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:06.639 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:54:07.101 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:54:07.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:07.564 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:54:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:54:08.489 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:54:08.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:08.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:08.952 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:54:09.415 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:54:09.878 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:54:10.341 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:54:10.804 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:54:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:54:11.729 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:54:12.192 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:54:12.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:12.656 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:54:13.119 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:54:13.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:13.582 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:54:14.045 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:54:14.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:54:14.972 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:54:15.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:15.435 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:54:15.900 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:54:16.363 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:54:16.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:16.826 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:54:17.290 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:54:17.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:17.753 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:54:18.216 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:54:18.679 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:54:19.142 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:54:19.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:19.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:19.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:19.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:19.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:19.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:19.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:19.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:19.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:54:19.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:54:19.543 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:54:19.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:19.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:24.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:54:24.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:54:24.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:24.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:24.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:24.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:24.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:24.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:54:24.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:24.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:54:24.551 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:54:24.553 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:54:24.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:54:24.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:54:24.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:24.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:54:24.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:54:24.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:54:24.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:24.556 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:54:24.556 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:54:24.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:54:24.556 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:24.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:24.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:54:24.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:54:24.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:54:24.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:24.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:54:24.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:54:24.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:54:24.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:24.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:24.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:54:24.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:54:24.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:54:24.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:54:24.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:54:24.563 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:24.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:24.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:54:25.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:54:25.080 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:54:25.080 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:54:25.081 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:54:25.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:54:25.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:25.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:25.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:54:25.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:25.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:25.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:25.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:54:25.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:54:25.119 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:54:25.120 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:54:25.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:54:25.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:25.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:25.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:25.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:25.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:54:25.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:25.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:25.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:25.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:25.954 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:54:26.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:54:26.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:26.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:26.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:26.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:26.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:26.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:26.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:26.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:26.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:26.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:54:26.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:54:26.399 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:54:26.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:26.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:26.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:54:26.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:54:26.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:54:26.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:54:26.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:54:31.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:54:31.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:54:31.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:31.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:31.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:31.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:31.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:31.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:54:31.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:31.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:54:31.408 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:54:31.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:54:31.410 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:54:31.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:54:31.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:31.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:31.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:54:31.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:54:31.411 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:54:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:54:31.413 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:54:31.413 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:54:31.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:31.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:54:31.416 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:54:31.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:54:31.416 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:31.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:31.416 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:54:31.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:54:31.416 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:54:31.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:54:31.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:54:31.420 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:54:31.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:31.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:31.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:31.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:54:31.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:54:31.935 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:54:31.935 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:54:31.936 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:54:31.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:54:31.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:31.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:31.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:54:31.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:31.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:31.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:31.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:54:31.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:54:31.976 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:54:31.977 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:54:31.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:54:31.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:31.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:31.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:31.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:32.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:54:32.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:32.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:32.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:32.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:32.813 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:54:33.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 02:54:33.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:33.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:33.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:33.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:33.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:33.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:33.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:33.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:33.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:33.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:54:33.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:54:33.253 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:54:33.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:33.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:38.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:54:38.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:54:38.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:38.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:38.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:38.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:38.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:54:38.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:54:38.265 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:38.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:54:38.265 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:54:38.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:54:38.268 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:54:38.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:54:38.268 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:38.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:54:38.269 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:54:38.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:54:38.269 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:54:38.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:38.272 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:54:38.272 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:54:38.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:54:38.272 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:38.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:54:38.272 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:54:38.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:54:38.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:54:38.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:38.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:54:38.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:54:38.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:54:38.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:54:38.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:54:38.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:54:38.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:54:38.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:54:38.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:54:38.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:54:38.282 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:54:38.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:54:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:54:38.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:54:38.750 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:54:38.800 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:54:38.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:54:38.801 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:54:38.801 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:54:38.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:38.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:38.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:54:38.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:38.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:38.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:38.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:54:38.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:54:38.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:54:38.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:38.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:38.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:38.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:39.213 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:54:39.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:39.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:39.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:39.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:39.676 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:54:40.139 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:54:40.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:40.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:40.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:40.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:40.602 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:54:41.064 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:54:41.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:41.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:41.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:41.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:41.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:54:41.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:54:42.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:42.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:42.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:42.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:42.452 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:54:42.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:54:43.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:54:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:54:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:54:43.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:54:43.378 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:54:43.841 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:54:44.304 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:54:44.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:54:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:54:45.692 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:54:46.155 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:54:46.617 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:54:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:54:47.543 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:54:48.005 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:54:48.469 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:54:48.932 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:54:49.395 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:54:49.858 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:54:50.321 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:54:50.783 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:54:51.246 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:54:51.709 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:54:52.171 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:54:52.635 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:54:53.097 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:54:53.560 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:54:53.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:53.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:53.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:53.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:54:53.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:54:53.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:54:53.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:53.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:54:53.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:54:53.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:54:53.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:54:53.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:54:53.884 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:54:53.884 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 02:54:53.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:53.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:54:54.023 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:54:54.486 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:54:54.948 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:54:55.411 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:54:55.874 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:54:56.337 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:54:56.801 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:54:57.264 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:54:57.727 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:54:58.190 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:54:58.654 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:54:59.116 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:54:59.579 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:55:00.042 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:55:00.504 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:55:00.967 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:55:01.430 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:55:01.893 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:55:02.356 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:55:02.819 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:55:03.282 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 02:55:03.745 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 02:55:04.208 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 02:55:04.671 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 02:55:05.133 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 02:55:05.596 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 02:55:06.059 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 02:55:06.521 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 02:55:06.984 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 02:55:07.447 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 02:55:07.910 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 02:55:08.372 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 02:55:08.835 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 02:55:09.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:09.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:09.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:55:09.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:55:09.011 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:55:09.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:55:09.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:55:09.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:55:09.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:09.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:55:09.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:55:09.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:55:09.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:55:09.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:09.070 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:55:09.070 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 02:55:09.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:09.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:09.298 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 02:55:09.761 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 02:55:10.224 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 02:55:10.687 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 02:55:11.150 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 02:55:11.613 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 02:55:12.076 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 02:55:12.539 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 02:55:13.002 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 02:55:13.465 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 02:55:13.928 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 02:55:14.392 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 02:55:14.855 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 02:55:15.317 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 02:55:15.780 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 02:55:16.242 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 02:55:16.705 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 02:55:17.168 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 02:55:17.630 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 02:55:18.094 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 02:55:18.559 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 02:55:19.023 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 02:55:19.486 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 02:55:19.948 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 02:55:20.411 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 02:55:20.874 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 02:55:21.337 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 02:55:21.799 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 02:55:22.262 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 02:55:22.725 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 02:55:23.188 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 02:55:23.651 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 02:55:24.114 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 02:55:24.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:24.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:24.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:55:24.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:55:24.172 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:55:24.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:55:24.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:55:24.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:55:24.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:24.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:55:24.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:55:24.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:55:24.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:55:24.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:24.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:24.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:55:24.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:55:24.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:24.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:24.576 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 02:55:25.039 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 02:55:25.502 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 02:55:25.965 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 02:55:26.427 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 02:55:26.890 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 02:55:27.353 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 02:55:27.815 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 02:55:28.278 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 02:55:28.741 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 02:55:29.204 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 02:55:29.667 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 02:55:30.130 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 02:55:30.594 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 02:55:31.057 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 02:55:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 02:55:31.982 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 02:55:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 02:55:32.909 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 02:55:33.371 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 02:55:33.834 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 02:55:34.298 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 02:55:34.761 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 02:55:35.224 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 02:55:35.687 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 02:55:36.149 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 02:55:36.612 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 02:55:37.075 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 02:55:37.538 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 02:55:38.001 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 02:55:38.463 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 02:55:38.926 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 02:55:39.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:39.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:39.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:55:39.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:55:39.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:39.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:39.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:39.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:39.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:55:39.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:55:39.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:55:39.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:55:39.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:55:39.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:55:39.350 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:39.351 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=13456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:55:44.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:55:44.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:55:44.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:55:44.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:55:44.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:55:44.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:55:44.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:55:44.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:55:44.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:44.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:55:44.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:55:44.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:55:44.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:55:44.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:55:44.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:44.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:55:44.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:55:44.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:55:44.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:55:44.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:44.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:55:44.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:55:44.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:55:44.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:44.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:55:44.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:55:44.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:55:44.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:55:44.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:55:44.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:55:44.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:55:44.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:44.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:55:44.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:55:44.370 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:55:44.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:55:44.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:55:44.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:55:44.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:55:44.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:55:44.372 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:55:49.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:55:49.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:55:49.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:55:49.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:55:49.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:55:49.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:55:49.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:55:49.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:55:49.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:49.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:55:49.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:55:49.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:55:49.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:55:49.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:55:49.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:49.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:55:49.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:55:49.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:55:49.385 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:55:49.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:49.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:55:49.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:55:49.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:55:49.386 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:49.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:55:49.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:55:49.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:55:49.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:55:49.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:49.389 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:55:49.389 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:55:49.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:55:49.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:55:49.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:55:49.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:55:49.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:55:49.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:55:49.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:49.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:55:49.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:55:49.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:55:49.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:55:49.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:55:49.394 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:55:49.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:55:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:55:49.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:55:49.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:55:49.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:55:49.912 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:55:49.912 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:55:49.913 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:55:49.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:49.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:55:49.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:55:49.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:55:49.925 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:55:49.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:49.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:55:49.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:55:49.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:55:49.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:55:49.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:55:49.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:55:49.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:55:49.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:49.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:55:50.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:55:50.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:50.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:50.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:50.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:50.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:55:51.252 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:55:51.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:51.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:51.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:51.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:51.715 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:55:52.179 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:55:52.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:52.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:52.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:52.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:52.642 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:55:53.105 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:55:53.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:53.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:53.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:53.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:53.568 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:55:54.031 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:55:54.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:55:54.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:55:54.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:55:54.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:55:54.494 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:55:54.957 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:55:55.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:55:55.882 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:55:56.345 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:55:56.808 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:55:57.270 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:55:57.733 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:55:58.196 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:55:58.659 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:55:59.122 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:55:59.586 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:56:00.048 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:56:00.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:00.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:00.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:00.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:00.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:00.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:00.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:00.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:00.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:00.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:00.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:00.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:00.339 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:56:00.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:00.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:05.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:05.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:05.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:05.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:05.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:05.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:05.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:05.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:56:05.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:05.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:56:05.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:56:05.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:56:05.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:56:05.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:56:05.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:05.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:05.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:56:05.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:56:05.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:56:05.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:05.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:56:05.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:56:05.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:56:05.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:05.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:05.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:56:05.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:56:05.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:56:05.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:05.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:56:05.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:56:05.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:56:05.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:05.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:56:05.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:05.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:56:05.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:56:05.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:05.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:56:05.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:56:05.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:56:05.373 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:56:05.373 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:56:05.373 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:05.377 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:56:05.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:56:05.899 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:56:05.901 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:56:05.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:05.902 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:56:05.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:05.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:05.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:56:05.924 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:56:05.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:05.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:56:05.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:56:05.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:56:05.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:56:05.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:05.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:56:05.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:56:05.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:05.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:06.305 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:56:06.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:06.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:06.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:06.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:06.769 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:56:07.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:56:07.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:07.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:07.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:07.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:56:08.160 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:56:08.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:08.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:08.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:08.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:08.625 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:56:09.088 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:56:09.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:09.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:09.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:09.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:09.552 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:56:10.017 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:56:10.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:10.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:10.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:10.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:56:10.946 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:56:11.410 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:56:11.876 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:56:12.342 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:56:12.808 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:56:13.273 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:56:13.739 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:56:14.204 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:56:14.670 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:56:15.135 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:56:15.601 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:56:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:56:16.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:16.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:16.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:16.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:16.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:16.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:16.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:16.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:16.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:16.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:16.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:16.324 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:56:16.324 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:16.324 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:16.324 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:16.324 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:16.325 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:16.325 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:21.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:21.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:21.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:21.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:21.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:21.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:21.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:21.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:56:21.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:21.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:56:21.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:56:21.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:56:21.336 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:56:21.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:56:21.336 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:21.336 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:56:21.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:56:21.336 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:56:21.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:21.340 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:56:21.340 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:56:21.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:56:21.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:21.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:21.341 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:56:21.341 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:56:21.341 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:56:21.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:21.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:56:21.344 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:56:21.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:56:21.344 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:21.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:21.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:56:21.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:56:21.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:56:21.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:56:21.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:56:21.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:56:21.352 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:56:21.352 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:21.357 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:56:21.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:56:21.881 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:56:21.882 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:56:21.882 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:56:21.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:21.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:21.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:21.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:56:21.905 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:56:21.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:21.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:56:21.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:56:21.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:56:21.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:56:21.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:21.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:56:21.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:56:21.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:21.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:22.287 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:56:22.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:22.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:22.750 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:56:22.764 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:23.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:56:23.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:23.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:23.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:23.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:23.676 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:56:24.139 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:56:24.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:24.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:24.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:24.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:24.602 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:56:25.067 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:56:25.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:25.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:25.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:25.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:25.532 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:56:25.997 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:56:26.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:26.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:26.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:26.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:26.461 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:56:26.926 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:56:27.391 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:56:27.854 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:56:28.318 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:56:28.780 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:56:29.243 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:56:29.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:56:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:56:30.634 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:56:31.098 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:56:31.562 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:56:32.025 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:56:32.487 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:56:32.951 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:56:33.415 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:56:33.879 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:56:34.342 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:56:34.806 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:56:35.270 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:56:35.733 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:56:36.196 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:56:36.660 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:56:37.123 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:56:37.587 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:56:38.050 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:56:38.513 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:56:38.977 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:56:39.439 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:56:39.901 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:56:40.364 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:56:40.826 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:56:41.289 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:56:41.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:41.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:41.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:41.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:41.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:41.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:41.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:41.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:41.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:41.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:41.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:41.499 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:56:41.499 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4434 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:41.499 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4434 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:41.499 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4434 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:41.499 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4434 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:41.500 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4434 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:41.500 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4434 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:46.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:46.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:46.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:46.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:46.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:46.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:46.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:46.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:56:46.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:46.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:56:46.509 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:56:46.511 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:56:46.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:56:46.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:56:46.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:46.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:46.512 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:56:46.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:56:46.512 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:56:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:46.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:56:46.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:56:46.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:56:46.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:46.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:46.515 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:56:46.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:56:46.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:56:46.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:46.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:56:46.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:56:46.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:56:46.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:56:46.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:46.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:56:46.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:56:46.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:56:46.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:46.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:56:46.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:56:46.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:56:46.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.524 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:56:46.524 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:56:46.524 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:56:46.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:56:46.529 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:56:46.992 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:56:47.040 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:56:47.040 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:56:47.041 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:56:47.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:47.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:47.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:47.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:56:47.055 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:56:47.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:47.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:56:47.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:56:47.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:56:47.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:56:47.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:47.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:56:47.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:56:47.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:47.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:47.454 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:56:47.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:47.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:47.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:47.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:47.917 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:56:47.929 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:48.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:56:48.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:48.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:48.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:48.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:48.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:56:48.875 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:49.305 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:56:49.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:49.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:49.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:49.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:49.768 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:56:49.817 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:50.231 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:56:50.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:50.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:50.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:50.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:50.694 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:56:50.763 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:51.156 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:56:51.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:51.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:51.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:51.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:51.619 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:56:51.705 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:52.082 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:56:52.545 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:56:52.651 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:53.007 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:56:53.470 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:56:53.592 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:53.932 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:56:54.395 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:56:54.538 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:56:55.320 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:56:55.480 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:55.783 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:56:56.245 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:56:56.421 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:56.709 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:56:57.172 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:56:57.368 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:56:57.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:56:57.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:56:57.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:56:57.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:56:57.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:56:57.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:56:57.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:56:57.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:56:57.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:56:57.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:56:57.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:56:57.470 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:56:57.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:56:57.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:56:57.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:56:57.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:57.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:57.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:57.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:57.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:56:57.470 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:57:02.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:02.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:02.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:02.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:02.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:02.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:02.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:02.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:02.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:02.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:02.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:57:02.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:57:02.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:57:02.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:02.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:02.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:02.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:57:02.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:02.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:57:02.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:02.481 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:57:02.481 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:57:02.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:02.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:02.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:02.482 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:57:02.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:02.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:57:02.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:02.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:02.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:57:02.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:57:02.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:57:02.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:57:02.488 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:57:02.956 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:57:03.006 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:57:03.007 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:03.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:03.008 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:57:03.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:03.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:03.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:03.022 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:57:03.022 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:03.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:03.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:03.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:03.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:03.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:03.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:03.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:03.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:03.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:03.051 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:03.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:57:03.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:03.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:03.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:03.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:03.881 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:57:03.893 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:57:04.343 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:57:04.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:04.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:04.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:04.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:04.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:57:05.270 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:57:05.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:05.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:05.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:05.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:05.733 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:57:06.196 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:57:06.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:06.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:06.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:06.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:06.659 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:57:07.123 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:57:07.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:07.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:07.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:07.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:07.587 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:57:08.051 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:57:08.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:57:08.982 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:57:09.447 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:57:09.912 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:57:10.376 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:57:10.842 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:57:11.306 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:57:11.769 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:57:12.232 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:57:12.696 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:57:13.160 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:57:13.356 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:13.624 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:57:14.087 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:57:14.551 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:57:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:57:15.477 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:57:15.940 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:57:16.404 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:57:16.869 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:57:17.334 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:57:17.799 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:57:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:57:18.726 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:57:19.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:19.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:19.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:19.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:19.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:19.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:19.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:19.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:19.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:19.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:19.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:19.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:19.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:19.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:19.039 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:57:24.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:24.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:24.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:24.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:24.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:24.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:24.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:24.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:24.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:24.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:24.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:57:24.050 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:57:24.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:57:24.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:24.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:24.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:24.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:57:24.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:24.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:57:24.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:24.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:57:24.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:57:24.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:24.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:24.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:24.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:57:24.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:24.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:57:24.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:24.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:57:24.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:57:24.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:24.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:24.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:24.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:57:24.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:24.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:57:24.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:24.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:57:24.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:57:24.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:57:24.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:57:24.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:57:24.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:57:24.060 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:57:24.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:24.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:24.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:24.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:24.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:57:24.528 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:57:24.575 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:57:24.575 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:24.576 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:57:24.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:24.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:24.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:24.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:24.586 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:24.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:24.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:24.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:24.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:24.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:24.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:24.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:24.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:24.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:24.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:57:25.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:25.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:25.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:25.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:25.455 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:57:25.467 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:57:25.918 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:57:26.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:26.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:26.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:26.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:26.382 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:57:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:57:27.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:27.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:27.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:27.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:27.310 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:57:27.774 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:57:28.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:28.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:57:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:57:29.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:29.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:29.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:29.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:29.164 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:57:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:57:30.090 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:57:30.554 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:57:31.017 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:57:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:57:31.968 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:57:32.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:57:32.894 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:57:33.357 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:57:33.819 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:57:34.283 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:57:34.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:34.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:34.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:34.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:34.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:34.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:34.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:34.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:34.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:34.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:34.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:34.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:34.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:34.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:34.632 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:57:34.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:57:34.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:57:34.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:57:34.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:57:34.632 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:57:39.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:39.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:39.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:39.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:39.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:39.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:39.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:39.638 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:39.638 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:39.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:39.639 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:57:39.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:57:39.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:57:39.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:39.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:39.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:39.642 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:57:39.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:39.642 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:57:39.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:39.644 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:39.644 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:57:39.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:39.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:57:39.647 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:57:39.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:39.647 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:39.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:39.647 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:57:39.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:39.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:57:39.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:57:39.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:57:39.652 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:57:39.652 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:57:39.652 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:39.657 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:57:40.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:57:40.167 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:57:40.168 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:40.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:40.168 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:57:40.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:40.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:40.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:40.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:40.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:40.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:40.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:40.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:40.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:40.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:57:40.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:40.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:40.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:40.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:40.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:40.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:40.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:40.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:40.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:40.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:40.628 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:57:40.628 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:57:40.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:40.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:40.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:40.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:40.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:41.047 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:57:41.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:41.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:41.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:41.300 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:57:41.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:41.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:41.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:41.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:41.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:41.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:41.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:41.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:41.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:41.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:41.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:41.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:41.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:41.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:41.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:41.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:41.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:41.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:41.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:41.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:41.510 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:57:41.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:41.517 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:57:41.517 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:57:41.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:41.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:41.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:41.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:41.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:41.974 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:57:42.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:42.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:42.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:42.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:42.029 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:57:42.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:42.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:42.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:42.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:42.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:42.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:42.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:42.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:42.035 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:57:42.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:42.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:47.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:47.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:47.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:47.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:47.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:47.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:47.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:47.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:47.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:47.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:47.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:47.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:47.044 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:57:47.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:47.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:57:47.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:57:47.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:47.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:47.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:47.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:57:47.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:47.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:57:47.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:47.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:57:47.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:57:47.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:47.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:47.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:47.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:57:47.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:47.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:57:47.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:57:47.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:57:47.052 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:57:47.052 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:57:47.052 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:47.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:47.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:57:47.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:57:47.567 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:57:47.567 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:47.568 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:57:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:47.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:47.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:47.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:47.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:47.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:47.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:47.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:47.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:47.608 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:57:47.610 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 02:57:47.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:47.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:47.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:47.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:47.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:47.982 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:57:47.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:47.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:47.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:47.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:47.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:47.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:47.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:47.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:47.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:47.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:47.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:47.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:47.994 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:57:47.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:47.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:52.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:57:52.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:57:52.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:52.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:52.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:52.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:53.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:57:53.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:53.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:53.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:57:53.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:53.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:57:53.006 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:57:53.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:53.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:57:53.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:57:53.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:53.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:53.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:57:53.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:57:53.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:57:53.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:57:53.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:53.013 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:57:53.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:57:53.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:57:53.019 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:57:53.019 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:57:53.019 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:57:53.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:57:53.023 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:57:53.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:57:53.534 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:57:53.535 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:57:53.535 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:57:53.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:53.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:53.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:53.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:53.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:53.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:53.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:53.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:53.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:53.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:53.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:53.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:53.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:53.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:53.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:53.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:57:54.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:54.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:54.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:54.413 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:57:54.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:57:55.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:55.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:55.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:55.340 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:57:55.803 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:57:56.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:56.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:56.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:56.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:56.266 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:57:56.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:56.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:56.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:56.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:56.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:56.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:56.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:56.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:56.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:56.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:56.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:56.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:56.730 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:57:56.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:56.734 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:57:56.734 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 02:57:56.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:56.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:56.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:57.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:57.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:57.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:57.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:57.193 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:57:57.656 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:57:58.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:57:58.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:57:58.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:57:58.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:57:58.119 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:57:58.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:57:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:57:59.508 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:57:59.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:59.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:59.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:59.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:59.889 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:57:59.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:57:59.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:57:59.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:57:59.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:59.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:59.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:59.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:57:59.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:57:59.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:57:59.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:57:59.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:57:59.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:59.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:57:59.970 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:58:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:00.434 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:58:00.897 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:58:01.360 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:58:01.827 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:58:02.296 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:58:02.762 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:58:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:03.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:03.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:03.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:03.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:03.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:03.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:58:03.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:03.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:58:03.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:58:03.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:58:03.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:58:03.228 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:58:03.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:03.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:58:03.232 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:58:03.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:03.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:03.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:03.693 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:58:04.158 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:58:04.623 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:58:05.086 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:58:05.549 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:58:06.011 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:58:06.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:06.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:06.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:06.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:06.380 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:58:06.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:06.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:06.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:06.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:06.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:06.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:06.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:58:06.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:58:06.387 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:58:06.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:06.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:11.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:58:11.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:58:11.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:11.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:11.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:11.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:11.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:11.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:58:11.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:11.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:58:11.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:58:11.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:58:11.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:58:11.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:58:11.395 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:11.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:11.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:58:11.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:58:11.396 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:58:11.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:11.397 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:58:11.397 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:58:11.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:58:11.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:11.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:11.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:58:11.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:58:11.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:58:11.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:11.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:58:11.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:58:11.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:58:11.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:11.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:11.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:58:11.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:58:11.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:58:11.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:58:11.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:58:11.404 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:58:11.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:11.408 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:58:11.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:58:11.916 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:58:11.916 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:58:11.916 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:11.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:58:11.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:58:11.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:58:12.335 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:58:12.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:12.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:12.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:12.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:12.797 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:58:13.260 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:58:13.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:13.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:13.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:13.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:13.722 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:58:14.185 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:58:14.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:14.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:14.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:14.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:14.647 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:58:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:58:15.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:15.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:15.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:15.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:15.572 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:58:16.035 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:58:16.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:16.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:16.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:16.498 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:58:16.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:58:17.422 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:58:17.885 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:58:18.347 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:58:18.810 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:58:19.272 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:58:19.734 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:58:20.196 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:58:20.658 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:58:21.121 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:58:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:58:22.046 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:58:22.508 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:58:22.971 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:58:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:58:23.896 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:58:24.358 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:58:24.821 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:58:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:58:25.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:25.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:25.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:25.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:25.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:25.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:25.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:25.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:25.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:25.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:58:25.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:58:25.564 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:58:25.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:25.564 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:25.564 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:30.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:58:30.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:58:30.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:30.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:30.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:30.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:30.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:30.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:58:30.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:30.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:58:30.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:58:30.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:58:30.573 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:58:30.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:58:30.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:30.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:58:30.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:58:30.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:58:30.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:58:30.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:58:30.575 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:58:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:58:30.577 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:58:30.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:58:30.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:58:30.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:58:30.581 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:58:30.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:58:30.585 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:58:31.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:58:31.095 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:58:31.096 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:58:31.096 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:58:31.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:31.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:31.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:31.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:58:31.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:31.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:58:31.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:58:31.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:58:31.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:58:31.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:31.142 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 02:58:31.142 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 02:58:31.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:31.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:31.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:58:31.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:31.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:31.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:31.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:31.973 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:58:32.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:58:32.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:32.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:32.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:32.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:32.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:58:33.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:33.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:33.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:33.142 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 02:58:33.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:58:33.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:58:33.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:58:33.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:58:33.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:58:33.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:58:33.359 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:58:33.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:33.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:33.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:33.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:33.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:58:34.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:58:34.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:34.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:34.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:34.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:34.746 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:58:35.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:58:35.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:35.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:35.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:35.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:35.671 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:58:36.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:58:36.596 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:58:37.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:58:37.521 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:58:37.983 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:58:38.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:58:38.907 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:58:39.369 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:58:39.832 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:58:40.294 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:58:40.756 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:58:41.219 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:58:41.681 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:58:42.144 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:58:42.606 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:58:43.069 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:58:43.531 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:58:43.994 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:58:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:58:44.919 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:58:45.381 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:58:45.844 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:58:46.307 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:58:46.769 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:58:47.232 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:58:47.694 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:58:48.156 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:58:48.618 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:58:49.080 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:58:49.543 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:58:50.005 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:58:50.468 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:58:50.930 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:58:51.394 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:58:51.856 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:58:52.319 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:58:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 02:58:53.245 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 02:58:53.707 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 02:58:54.169 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 02:58:54.632 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 02:58:55.094 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 02:58:55.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:58:55.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:58:55.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:58:55.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:58:55.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:58:55.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:58:55.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:58:55.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:58:55.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:58:55.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:58:55.367 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:58:55.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:58:55.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:58:55.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:58:55.368 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:00.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:59:00.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:59:00.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:00.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:00.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:00.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:00.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:00.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:59:00.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:00.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:59:00.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:59:00.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:59:00.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:59:00.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:59:00.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:00.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:00.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:59:00.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:59:00.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:59:00.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:00.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:59:00.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:59:00.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:59:00.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:00.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:00.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:59:00.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:59:00.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:59:00.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:00.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:59:00.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:59:00.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:59:00.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:00.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:00.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:59:00.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:59:00.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:59:00.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:59:00.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:59:00.384 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:59:00.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:00.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:59:00.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:59:00.898 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:59:00.899 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:59:00.899 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:59:00.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:59:00.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:59:00.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:59:00.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:59:00.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:59:00.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:59:00.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:59:00.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:59:00.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:59:01.314 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:59:01.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:01.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:01.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:01.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:01.777 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:59:02.240 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:59:02.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:02.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:02.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:02.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:02.705 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:59:03.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:59:03.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:03.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:03.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:03.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:03.632 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:59:04.096 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:59:04.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:04.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:04.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:04.560 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:59:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:59:05.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:05.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:05.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:05.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:05.485 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:59:05.947 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:59:06.410 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:59:06.873 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:59:07.336 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:59:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:59:08.262 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:59:08.725 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:59:09.188 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:59:09.651 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:59:10.114 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:59:10.577 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:59:11.041 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:59:11.504 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:59:11.969 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:59:12.434 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:59:12.899 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:59:13.363 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:59:13.827 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:59:14.291 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:59:14.757 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:59:15.222 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:59:15.687 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:59:16.152 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:59:16.617 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:59:17.082 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:59:17.547 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:59:18.012 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:59:18.477 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:59:18.941 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:59:19.405 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:59:19.868 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:59:20.332 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:59:20.796 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:59:21.259 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:59:21.723 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:59:22.186 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:59:22.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:59:22.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:59:22.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:22.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:22.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:22.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:22.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:22.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:22.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:22.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:59:22.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:59:22.404 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:59:22.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:22.404 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:22.404 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:22.404 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:27.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:59:27.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:59:27.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:27.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:27.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:27.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:27.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:27.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:59:27.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:27.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:59:27.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:59:27.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:59:27.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:59:27.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:59:27.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:27.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:27.420 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:59:27.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:59:27.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:59:27.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:27.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:59:27.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:59:27.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:59:27.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:27.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:27.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:59:27.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:59:27.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:59:27.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:27.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:59:27.429 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:59:27.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:59:27.429 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:27.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:27.429 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:59:27.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:59:27.429 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:59:27.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:59:27.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:59:27.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:59:27.436 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:59:27.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:27.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:27.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:27.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:59:27.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:59:27.960 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:59:27.961 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:59:27.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:59:27.962 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:59:27.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:59:27.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:59:27.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:59:27.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:59:27.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:59:27.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:59:27.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:59:27.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:59:28.368 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:59:28.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:28.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:28.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:28.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:28.831 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:59:29.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:59:29.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:29.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:29.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:29.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:29.757 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:59:30.219 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:59:30.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:30.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:30.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:30.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:30.682 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:59:31.144 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:59:31.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:31.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:31.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:31.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:31.607 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:59:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:59:32.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:32.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:32.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:32.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:32.532 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 02:59:32.995 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 02:59:33.458 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 02:59:33.922 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 02:59:34.385 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 02:59:34.848 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 02:59:35.311 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 02:59:35.774 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 02:59:36.237 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 02:59:36.701 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 02:59:37.163 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 02:59:37.627 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 02:59:38.089 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 02:59:38.551 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 02:59:39.014 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 02:59:39.476 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 02:59:39.938 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 02:59:40.402 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 02:59:40.864 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 02:59:41.328 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 02:59:41.793 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 02:59:42.257 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 02:59:42.720 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 02:59:43.183 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 02:59:43.646 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 02:59:44.109 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 02:59:44.572 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 02:59:45.035 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 02:59:45.498 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 02:59:45.961 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 02:59:46.424 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 02:59:46.887 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 02:59:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 02:59:47.813 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 02:59:48.276 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 02:59:48.740 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 02:59:49.203 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 02:59:49.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:59:49.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:59:49.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:49.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:49.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:49.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:49.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:49.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:59:49.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:59:49.456 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 02:59:49.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:49.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:49.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:49.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 02:59:54.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 02:59:54.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 02:59:54.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:54.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:54.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:54.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:54.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 02:59:54.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:59:54.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:54.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 02:59:54.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 02:59:54.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 02:59:54.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 02:59:54.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:59:54.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:54.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 02:59:54.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 02:59:54.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 02:59:54.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 02:59:54.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:54.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 02:59:54.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 02:59:54.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:59:54.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:54.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 02:59:54.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 02:59:54.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 02:59:54.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 02:59:54.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:54.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 02:59:54.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 02:59:54.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:59:54.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 02:59:54.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 02:59:54.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 02:59:54.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 02:59:54.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 02:59:54.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:54.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 02:59:54.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 02:59:54.479 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 02:59:54.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 02:59:54.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 02:59:54.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 02:59:54.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 02:59:54.993 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 02:59:54.993 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 02:59:54.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 02:59:54.994 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 02:59:54.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 02:59:54.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 02:59:54.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 02:59:54.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 02:59:54.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 02:59:54.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 02:59:54.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 02:59:54.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 02:59:55.410 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 02:59:55.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:55.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:55.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:55.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:55.873 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 02:59:56.335 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 02:59:56.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:56.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:56.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:56.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:56.798 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 02:59:57.260 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 02:59:57.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:57.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:57.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:57.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:57.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 02:59:58.185 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 02:59:58.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:58.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:58.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:58.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:58.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 02:59:59.110 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 02:59:59.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 02:59:59.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 02:59:59.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 02:59:59.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 02:59:59.573 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:00:00.036 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:00:00.498 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:00:00.961 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:00:01.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:00:01.886 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:00:02.348 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:00:02.813 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:00:03.277 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:00:03.739 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:00:04.201 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:00:04.664 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:00:05.126 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:00:05.588 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:00:06.051 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:00:06.514 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:00:06.976 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:00:07.438 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:00:07.900 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:00:08.365 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:00:08.828 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:00:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:00:09.753 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:00:10.216 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:00:10.678 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:00:11.141 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:00:11.603 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:00:12.066 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:00:12.528 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:00:12.991 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:00:13.454 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:00:13.918 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:00:14.381 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:00:14.843 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:00:15.305 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:00:15.768 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:00:16.231 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:00:16.693 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:00:17.156 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:00:17.619 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:00:18.082 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:00:18.546 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:00:19.011 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:00:19.475 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:00:19.938 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:00:20.401 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:00:20.864 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:00:21.327 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:00:21.790 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:00:22.254 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:00:22.717 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:00:23.180 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:00:23.643 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:00:24.105 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:00:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:00:25.031 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:00:25.494 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:00:25.956 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:00:26.419 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:00:26.881 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:00:27.343 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:00:27.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:00:27.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:00:27.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:27.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:27.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:27.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:27.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:00:27.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:00:27.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:00:27.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:00:27.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:00:27.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:00:27.500 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:00:32.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:00:32.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:00:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:00:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:00:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:00:32.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:00:32.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:00:32.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:00:32.507 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:00:32.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:00:32.507 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:00:32.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:00:32.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:00:32.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:32.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:00:32.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:00:32.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:00:32.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:00:32.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:00:32.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:00:32.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:00:32.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:00:32.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:32.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:00:32.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:00:32.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:00:32.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:00:32.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:00:32.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:00:32.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:00:32.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:00:32.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:32.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:00:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:00:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:00:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:00:32.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:00:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:00:32.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:00:32.517 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:00:32.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:00:32.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:00:32.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:00:33.029 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:00:33.030 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:00:33.030 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:00:33.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:00:33.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:00:33.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:00:33.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:00:33.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:00:33.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:00:33.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:00:33.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:00:33.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:00:33.447 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:00:33.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:33.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:33.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:33.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:33.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:00:34.372 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:00:34.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:34.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:34.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:34.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:34.835 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:00:35.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:00:35.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:35.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:35.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:35.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:00:36.222 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:00:36.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:36.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:36.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:36.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:36.685 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:00:37.148 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:00:37.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:00:37.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:00:37.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:00:37.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:00:37.611 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:00:38.073 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:00:38.536 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:00:38.999 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:00:39.463 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:00:39.925 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:00:40.388 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:00:40.850 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:00:41.314 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:00:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:00:42.239 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:00:42.702 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:00:43.164 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:00:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:00:44.090 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:00:44.554 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:00:45.018 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:00:45.482 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:00:45.945 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:00:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:00:46.870 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:00:47.333 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:00:47.795 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:00:48.258 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:00:48.724 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:00:49.187 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:00:49.661 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:00:50.124 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:00:50.590 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:00:51.054 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:00:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:00:51.980 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:00:52.444 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:00:52.907 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:00:53.370 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:00:53.834 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:00:54.297 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:00:54.760 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:00:55.223 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:00:55.685 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:00:56.148 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:00:56.611 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:00:57.074 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:00:57.537 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:00:58.000 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:00:58.462 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:00:58.926 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:00:59.390 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:00:59.853 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:01:00.318 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:01:00.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:00.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:00.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:00.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:00.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:00.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:00.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:00.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:00.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:00.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:00.535 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:00.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:00.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:05.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:05.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:05.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:05.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:05.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:05.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:05.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:05.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:05.542 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:05.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:05.543 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:05.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:05.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:01:05.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:05.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:01:05.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:01:05.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:05.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:05.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:05.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:01:05.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:05.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:01:05.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:05.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:01:05.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:01:05.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:05.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:05.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:05.549 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:01:05.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:05.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:01:05.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:01:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:01:05.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:01:05.553 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:05.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:05.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:05.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:01:06.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:01:06.065 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:01:06.066 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:01:06.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:01:06.066 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:01:06.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:06.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:06.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:06.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:06.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:06.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:06.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:06.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:06.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:06.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:06.113 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:06.113 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:11.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:11.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:11.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:11.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:11.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:11.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:11.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:11.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:11.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:11.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:11.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:01:11.121 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:01:11.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:01:11.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:11.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:11.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:11.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:01:11.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:11.122 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:01:11.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:11.124 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:01:11.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:01:11.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:11.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:11.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:11.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:01:11.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:11.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:01:11.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:11.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:11.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:01:11.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:11.131 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:01:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:01:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:01:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:01:11.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:01:11.132 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:01:11.132 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:01:11.132 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:11.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:11.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:11.137 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:01:11.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:01:11.645 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:01:11.646 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:01:11.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:01:11.647 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:01:11.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:11.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:11.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:11.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:11.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:11.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:11.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:11.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:11.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:11.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:11.695 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:11.695 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:11.695 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:11.695 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:11.695 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:11.695 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:16.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:16.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:16.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:16.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:16.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:16.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:16.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:16.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:16.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:16.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:16.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:01:16.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:01:16.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:01:16.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:16.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:16.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:16.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:01:16.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:16.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:01:16.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:16.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:01:16.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:01:16.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:16.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:16.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:16.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:01:16.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:16.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:01:16.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:16.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:01:16.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:01:16.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:16.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:16.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:16.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:01:16.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:16.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:01:16.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:01:16.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:01:16.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:01:16.711 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:01:16.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:16.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:16.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:01:17.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:01:17.227 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:01:17.228 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:01:17.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:01:17.229 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:01:17.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:17.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:17.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:17.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:17.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:17.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:17.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:17.279 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:17.279 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:17.279 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:17.279 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:22.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:22.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:22.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:22.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:22.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:22.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:22.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:22.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:22.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:22.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:22.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:01:22.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:01:22.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:01:22.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:22.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:22.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:22.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:01:22.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:22.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:01:22.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:22.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:01:22.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:01:22.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:22.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:22.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:22.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:01:22.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:22.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:01:22.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:22.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:01:22.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:01:22.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:22.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:22.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:22.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:01:22.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:22.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:01:22.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:01:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:01:22.306 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:01:22.306 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:01:22.306 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:22.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:01:22.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:01:22.828 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:01:22.829 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:01:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:01:22.829 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:01:22.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:22.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:22.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:01:22.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:01:22.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:01:22.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:01:22.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:01:22.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:01:23.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:01:23.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:23.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:23.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:23.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:23.699 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:01:24.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:01:24.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:24.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:24.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:24.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:24.624 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:01:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:01:25.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:25.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:25.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:25.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:01:26.013 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:01:26.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:26.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:26.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:26.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:26.476 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:01:26.939 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:01:27.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:27.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:27.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:27.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:27.402 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:01:27.864 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:01:28.327 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:01:28.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:01:29.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:01:29.715 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:01:30.177 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:01:30.639 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:01:30.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:30.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:30.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:30.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:30.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:30.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:30.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:30.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:30.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:30.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:30.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:30.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:30.868 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:35.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:35.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:35.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:35.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:35.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:35.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:35.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:35.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:35.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:35.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:35.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:01:35.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:01:35.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:01:35.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:35.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:35.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:35.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:01:35.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:35.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:01:35.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:35.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:01:35.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:01:35.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:35.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:35.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:35.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:01:35.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:35.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:01:35.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:35.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:01:35.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:01:35.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:35.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:35.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:35.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:01:35.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:35.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:01:35.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:01:35.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:01:35.895 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:01:35.895 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:01:35.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:35.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:35.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:35.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:35.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:01:36.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:01:36.412 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:01:36.413 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:01:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:01:36.414 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:01:36.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:36.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:36.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:01:36.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:01:36.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:01:36.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:01:36.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:01:36.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:01:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:01:36.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:36.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:36.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:36.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:37.287 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:01:37.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:01:37.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:37.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:37.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:37.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:38.212 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:01:38.676 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:01:38.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:38.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:38.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:38.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:01:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:01:39.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:39.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:39.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:39.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:40.068 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:01:40.530 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:01:40.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:40.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:40.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:40.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:40.993 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:01:41.458 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:01:41.922 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:01:42.385 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:01:42.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:01:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:01:43.773 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:01:44.235 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:01:44.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:44.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:44.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:44.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:44.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:44.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:44.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:44.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:44.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:44.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:44.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:44.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:44.459 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:44.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1887 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:44.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1887 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:44.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1887 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:44.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1887 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:44.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1887 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:44.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1887 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:01:49.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:49.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:49.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:49.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:49.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:49.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:49.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:49.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:49.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:49.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:01:49.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:01:49.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:01:49.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:01:49.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:49.472 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:49.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:49.472 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:01:49.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:01:49.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:01:49.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:49.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:01:49.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:01:49.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:49.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:49.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:49.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:01:49.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:01:49.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:01:49.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:49.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:01:49.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:01:49.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:49.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:01:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:01:49.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:01:49.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:01:49.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:01:49.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:01:49.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:01:49.484 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:01:49.484 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:01:49.484 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:01:49.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:01:49.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:01:49.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:01:49.489 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:01:49.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:01:50.001 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:01:50.002 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:01:50.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:01:50.003 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:01:50.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:50.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:50.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:01:50.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:01:50.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:01:50.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:01:50.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:01:50.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:01:50.413 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:01:50.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:50.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:50.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:50.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:50.876 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:01:51.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:01:51.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:51.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:51.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:51.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:51.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:01:52.264 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:01:52.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:52.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:52.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:52.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:52.727 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:01:53.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:01:53.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:53.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:53.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:53.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:53.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:01:54.115 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:01:54.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:54.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:54.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:54.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:54.578 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:01:55.040 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:01:55.503 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:01:55.966 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:01:56.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:01:56.894 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:01:57.357 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:01:57.820 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:01:58.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:01:58.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:01:58.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:01:58.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:01:58.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:01:58.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:01:58.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:01:58.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:01:58.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:01:58.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:01:58.046 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:01:58.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:01:58.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:03.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:03.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:03.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:03.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:03.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:03.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:03.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:03.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:03.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:03.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:03.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:02:03.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:02:03.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:02:03.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:03.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:03.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:03.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:02:03.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:03.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:02:03.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:03.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:03.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:02:03.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:03.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:02:03.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:02:03.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:03.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:03.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:03.065 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:02:03.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:03.065 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:02:03.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:03.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:02:03.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:02:03.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:02:03.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:02:03.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:02:03.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:02:03.070 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:02:03.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:03.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:02:03.540 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:02:03.594 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:02:03.595 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:02:03.596 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:02:03.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:02:03.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:03.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:03.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:02:03.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:02:03.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:02:03.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:02:03.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:02:03.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:02:04.005 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:02:04.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:04.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:04.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:04.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:04.470 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:02:04.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:02:05.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:05.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:05.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:05.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:05.397 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:02:05.861 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:02:06.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:06.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:06.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:06.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:06.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:02:06.788 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:02:07.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:07.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:07.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:02:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:02:08.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:08.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:08.178 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:02:08.641 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:02:09.103 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:02:09.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:02:10.028 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:02:10.491 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:02:10.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:02:11.418 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:02:11.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:11.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:11.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:11.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:11.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:11.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:11.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:11.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:11.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:11.636 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:02:11.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:11.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:11.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:11.636 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1886 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:11.636 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1886 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:11.636 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1886 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:11.636 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1886 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:11.636 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1886 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:11.636 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1886 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:16.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:16.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:16.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:16.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:16.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:16.642 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:16.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:16.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:02:16.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:02:16.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:02:16.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:16.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:16.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:16.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:02:16.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:16.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:02:16.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:16.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:02:16.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:02:16.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:16.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:16.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:16.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:02:16.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:16.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:02:16.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:16.649 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:16.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:02:16.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:02:16.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:02:16.653 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:02:16.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:16.657 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:02:17.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:02:17.165 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:02:17.165 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:02:17.166 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:02:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:02:17.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:17.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:17.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:02:17.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:02:17.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:02:17.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:02:17.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:02:17.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:02:17.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:02:17.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:17.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:17.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:17.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:18.050 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:02:18.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:02:18.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:18.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:18.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:18.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:18.976 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:02:19.439 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:02:19.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:19.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:19.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:19.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:19.902 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:02:20.364 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:02:20.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:20.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:20.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:20.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:20.827 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:02:21.289 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:02:21.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:21.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:21.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:21.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:21.752 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:02:22.214 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:02:22.677 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:02:23.139 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:02:23.604 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:02:24.067 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:02:24.531 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:02:24.997 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:02:25.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:25.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:25.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:25.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:25.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:25.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:25.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:25.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:25.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:25.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:25.215 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:02:25.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:25.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:30.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:30.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:30.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:30.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:30.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:30.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:30.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:30.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:30.226 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:30.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:30.226 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:02:30.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:02:30.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:02:30.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:30.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:30.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:30.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:02:30.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:30.228 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:02:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:30.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:30.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:02:30.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:30.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:02:30.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:02:30.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:30.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:30.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:30.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:02:30.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:30.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:02:30.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:02:30.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:02:30.239 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:30.244 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:02:30.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:02:30.757 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:02:30.758 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:02:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:02:30.758 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:02:30.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:30.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:30.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:02:30.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:02:30.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:02:30.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:02:30.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:02:30.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:02:31.171 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:02:31.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:31.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:31.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:02:32.096 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:02:32.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:32.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:32.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:32.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:32.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:02:33.022 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:02:33.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:33.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:33.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:33.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:33.485 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:02:33.952 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:02:34.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:34.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:34.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:34.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:34.416 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:02:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:02:35.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:35.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:35.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:35.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:35.343 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:02:35.805 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:02:36.268 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:02:36.731 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:02:37.194 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:02:37.659 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:02:38.125 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:02:38.591 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:02:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:02:39.522 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:02:39.987 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:02:40.450 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:02:40.913 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:02:41.377 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:02:41.840 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:02:42.303 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:02:42.767 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:02:43.230 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:02:43.693 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:02:44.157 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:02:44.620 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:02:45.084 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:02:45.547 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:02:46.012 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:02:46.475 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:02:46.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:46.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:46.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:46.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:46.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:46.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:46.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:46.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:46.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:46.803 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:02:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:46.803 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:46.803 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:46.803 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:46.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:46.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:46.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:46.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3643 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:02:51.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:02:51.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:02:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:51.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:51.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:02:51.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:51.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:51.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:02:51.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:51.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:02:51.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:02:51.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:51.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:02:51.820 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:02:51.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:51.820 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:51.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:02:51.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:02:51.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:02:51.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:02:51.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:51.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:02:51.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:02:51.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:51.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:02:51.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:02:51.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:02:51.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:02:51.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:02:51.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:51.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:02:51.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:02:51.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:02:51.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:02:51.826 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:02:51.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:02:51.827 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:02:51.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:02:52.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:02:52.344 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:02:52.345 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:02:52.346 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:02:52.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:02:52.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:02:52.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:02:52.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:02:52.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:02:52.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:02:52.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:02:52.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:02:52.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:02:52.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:02:52.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:52.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:52.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:52.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:53.222 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:02:53.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:02:53.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:53.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:53.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:53.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:54.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:02:54.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:02:54.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:54.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:54.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:54.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:55.080 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:02:55.542 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:02:55.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:55.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:55.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:55.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:56.006 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:02:56.470 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:02:56.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:02:56.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:02:56.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:02:56.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:02:56.935 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:02:57.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:02:57.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:02:58.325 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:02:58.789 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:02:59.255 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:02:59.719 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:03:00.185 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:03:00.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:00.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:00.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:00.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:00.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:00.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:00.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:00.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:00.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:00.392 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:00.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:00.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:00.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:00.392 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1883 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:00.393 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1883 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:00.393 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1883 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:00.393 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1883 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:00.393 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1883 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:00.393 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1883 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:05.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:05.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:05.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:05.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:05.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:05.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:05.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:05.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:05.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:05.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:05.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:05.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:05.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:05.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:05.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:05.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:05.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:05.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:05.402 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:05.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:05.403 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:05.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:05.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:05.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:05.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:05.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:05.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:05.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:05.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:05.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:05.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:05.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:05.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:05.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:05.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:05.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:05.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:05.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:05.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:05.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:05.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:05.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:05.409 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:05.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:05.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:05.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:05.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:05.921 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:05.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:05.922 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:05.923 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:05.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:05.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:05.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:05.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:03:05.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:03:05.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:03:05.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:03:05.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:03:06.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:03:06.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:06.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:06.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:06.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:06.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:03:07.273 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:03:07.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:07.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:07.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:07.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:07.736 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:03:08.201 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:03:08.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:08.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:08.666 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:03:09.132 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:03:09.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:09.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:09.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:09.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:09.596 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:03:10.063 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:03:10.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:10.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:10.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:10.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:10.526 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:03:10.990 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:03:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:03:11.918 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:03:12.381 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:03:12.846 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:03:13.312 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:03:13.777 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:03:14.240 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:03:14.703 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:03:15.166 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:03:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:03:16.094 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:03:16.559 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:03:17.023 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:03:17.487 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:03:17.951 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:03:18.414 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:03:18.878 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:03:19.342 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:03:19.805 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:03:20.269 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:03:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:03:21.195 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:03:21.657 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:03:21.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:21.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:21.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:21.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:21.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:21.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:21.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:21.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:21.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:21.980 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:21.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3642 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:21.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3642 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:21.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3642 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:21.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3642 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:21.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3642 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:21.980 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3642 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:26.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:26.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:26.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:26.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:26.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:26.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:26.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:26.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:26.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:26.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:26.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:26.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:26.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:26.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:26.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:26.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:26.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:26.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:26.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:26.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:26.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:26.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:26.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:26.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:26.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:26.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:26.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:26.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:26.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:26.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:26.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:26.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:26.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:27.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:27.000 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:27.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:27.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:27.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:27.512 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:27.512 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:27.513 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:27.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:27.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:27.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:27.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:27.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:27.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:27.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:27.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:27.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:27.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:27.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:27.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:27.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:27.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:27.561 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:27.561 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:27.561 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:27.561 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:27.561 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:32.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:32.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:32.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:32.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:32.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:32.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:32.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:32.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:32.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:32.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:32.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:32.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:32.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:32.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:32.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:32.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:32.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:32.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:32.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:32.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:32.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:32.574 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:32.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:32.574 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:32.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:32.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:32.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:32.575 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:32.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:32.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:32.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:32.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:32.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:32.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:32.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:32.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:32.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:32.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:32.580 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:32.580 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:32.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:32.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:32.585 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:33.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:33.092 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:33.093 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:33.093 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:33.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:33.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:33.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:33.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:33.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:33.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:33.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:33.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:33.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:33.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:33.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:33.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:33.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:33.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:33.151 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:33.151 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:33.151 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:33.151 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:33.151 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:38.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:38.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:38.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:38.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:38.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:38.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:38.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:38.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:38.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:38.161 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:38.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:38.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:38.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:38.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:38.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:38.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:38.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:38.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:38.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:38.163 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:38.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:38.165 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:38.165 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:38.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:38.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:38.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:38.168 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:38.169 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:38.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:38.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:38.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:38.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:38.681 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:38.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:38.682 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:38.683 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:38.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:38.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:38.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:38.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:38.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:38.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:38.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:38.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:38.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:38.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:38.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:38.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:38.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:38.732 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:38.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:43.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:43.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:43.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:43.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:43.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:43.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:43.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:43.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:43.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:43.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:43.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:43.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:43.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:43.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:43.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:43.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:43.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:43.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:43.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:43.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:43.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:43.749 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:43.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:43.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:44.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:44.261 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:44.261 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:44.262 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:44.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:44.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:44.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:44.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:44.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:44.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:44.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:44.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:44.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:44.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:44.313 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:44.313 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:44.313 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:44.313 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:44.313 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:49.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:49.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:49.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:49.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:49.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:49.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:49.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:49.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:49.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:49.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:49.331 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:49.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:49.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:49.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:49.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:49.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:49.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:49.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:49.338 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:49.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:49.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:49.341 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:49.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:49.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:49.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:49.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:49.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:49.342 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:49.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:49.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:49.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:49.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:49.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:49.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:49.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:49.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:49.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:49.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:49.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:49.349 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:49.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:49.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:49.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:49.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:49.818 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:49.864 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:49.864 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:49.865 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:49.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:49.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:49.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:49.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:49.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:49.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:49.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:49.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:49.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:49.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:49.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:49.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:49.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:49.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:49.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:49.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:49.923 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:49.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:49.923 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:54.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:54.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:54.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:54.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:54.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:54.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:54.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:54.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:54.930 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:54.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:03:54.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:03:54.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:03:54.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:03:54.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:54.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:54.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:54.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:03:54.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:03:54.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:03:54.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:54.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:03:54.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:03:54.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:54.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:03:54.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:03:54.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:54.938 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:03:54.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:03:54.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:03:54.939 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:03:54.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:03:55.411 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:03:55.455 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:03:55.456 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:03:55.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:03:55.457 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:03:55.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:55.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:55.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:03:55.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:03:55.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:03:55.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:03:55.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:03:55.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:03:55.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:03:55.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:03:55.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:03:55.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:03:55.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:03:55.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:03:55.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:03:55.484 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.485 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:03:55.486 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:00.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:00.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:00.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:00.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:00.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:00.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:00.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:00.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:00.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:00.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:00.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:04:00.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:04:00.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:04:00.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:00.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:00.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:00.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:04:00.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:00.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:04:00.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:00.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:04:00.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:04:00.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:00.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:00.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:00.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:04:00.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:00.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:04:00.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:00.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:04:00.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:04:00.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:00.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:00.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:00.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:04:00.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:00.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:04:00.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:04:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:04:00.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:04:00.515 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:04:00.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:00.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:00.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:04:00.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:04:01.029 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:04:01.030 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:04:01.030 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:04:01.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:04:01.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:04:01.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:04:01.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:04:01.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:04:01.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:04:01.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:04:01.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:04:01.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:04:01.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:04:01.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:01.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:01.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:01.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:01.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:04:02.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:04:02.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:02.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:02.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:02.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:02.885 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:04:03.358 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:04:03.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:03.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:03.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:03.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:03.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:04:04.301 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:04:04.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:04.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:04.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:04.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:04.774 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:04:05.247 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:04:05.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:05.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:05.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:05.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:05.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:04:06.192 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:04:06.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:04:07.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:04:07.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:04:08.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:04:08.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:04:09.026 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:04:09.497 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:04:09.970 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:04:10.443 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:04:10.915 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:04:11.386 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:04:11.860 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:04:12.332 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:04:12.804 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:04:13.275 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:04:13.748 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:04:14.221 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:04:14.693 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:04:15.164 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:04:15.635 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:04:16.108 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:04:16.581 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:04:17.053 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:04:17.524 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:04:17.997 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:04:18.470 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:04:18.942 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:04:19.413 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:04:19.884 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:04:20.357 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:04:20.830 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:04:21.302 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:04:21.773 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:04:22.244 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:04:22.717 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:04:23.189 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:04:23.661 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:04:24.132 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:04:24.605 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:04:25.078 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:04:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:04:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:04:26.494 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:04:26.966 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:04:27.438 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:04:27.910 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:04:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:04:28.855 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:04:29.327 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:04:29.798 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:04:30.271 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:04:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:04:31.216 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:04:31.687 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:04:32.158 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:04:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:04:33.104 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:04:33.576 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:04:34.047 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:04:34.520 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:04:34.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:04:34.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:04:34.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:34.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:34.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:34.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:34.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:34.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:34.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:34.544 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:04:34.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:34.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:34.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:34.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:34.544 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:34.545 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:34.545 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:34.545 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:34.545 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:34.545 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=7352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:39.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:39.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:39.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:39.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:39.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:39.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:39.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:39.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:39.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:39.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:39.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:04:39.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:04:39.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:04:39.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:39.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:39.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:39.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:04:39.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:39.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:04:39.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:39.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:04:39.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:04:39.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:39.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:39.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:39.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:04:39.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:39.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:04:39.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:39.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:04:39.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:04:39.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:39.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:39.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:39.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:04:39.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:39.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:04:39.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:04:39.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:04:39.579 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:04:39.579 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:39.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:39.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:39.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:39.583 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:04:40.061 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:04:40.091 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:04:40.092 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:04:40.093 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:04:40.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:04:40.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:04:40.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:40.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:40.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:40.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:40.989 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:04:41.452 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:04:41.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:41.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:41.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:41.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:41.915 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:04:42.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:04:42.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:42.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:42.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:42.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:42.842 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:04:43.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:04:43.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:43.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:43.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:43.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:43.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:43.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:43.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:43.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:43.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:43.111 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:04:43.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:43.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:48.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:48.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:48.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:48.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:48.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:48.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:48.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:48.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:48.127 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:48.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:48.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:04:48.132 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:04:48.132 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:04:48.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:48.133 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:48.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:48.133 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:04:48.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:48.133 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:04:48.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:48.136 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:04:48.137 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:04:48.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:48.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:48.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:48.137 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:04:48.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:48.137 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:04:48.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:48.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:04:48.140 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:04:48.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:48.140 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:48.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:48.140 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:04:48.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:48.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:04:48.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:48.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:04:48.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:04:48.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:04:48.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:04:48.145 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:04:48.145 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:04:48.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:48.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:04:48.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:04:48.657 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:04:48.658 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:04:48.658 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:04:48.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:04:49.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:04:49.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:49.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:49.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:04:50.046 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:04:50.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:50.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:50.518 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:04:50.991 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:04:51.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:51.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:51.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:51.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:51.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:04:51.936 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:04:52.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:52.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:52.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:52.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:52.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:04:52.878 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:04:53.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:53.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:53.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:53.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:53.348 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:04:53.819 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:04:54.293 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:04:54.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:54.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:54.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:54.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:54.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:54.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:54.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:54.673 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:04:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:54.673 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:54.673 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:54.673 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:54.673 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:54.673 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:54.673 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:04:59.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:04:59.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:04:59.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:59.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:59.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:59.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:59.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:04:59.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:59.690 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:59.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:04:59.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:04:59.696 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:04:59.696 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:04:59.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:59.697 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:59.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:04:59.697 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:04:59.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:04:59.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:04:59.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:04:59.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:04:59.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:04:59.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:59.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:59.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:04:59.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:04:59.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:04:59.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:04:59.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:04:59.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:04:59.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:04:59.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:59.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:04:59.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:04:59.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:04:59.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:04:59.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:04:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:04:59.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:04:59.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:04:59.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:04:59.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:04:59.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:04:59.708 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:04:59.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:04:59.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:00.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:00.226 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:00.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:00.228 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:00.229 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:00.663 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:05:00.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:01.138 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:05:01.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:05:01.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:01.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:01.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:01.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:02.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:05:02.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:05:02.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:02.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:02.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:02.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:03.028 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:05:03.502 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:05:03.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:03.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:03.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:03.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:03.974 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:05:04.446 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:05:04.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:04.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:04.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:04.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:04.917 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:05:05.391 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:05:05.863 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:05:06.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:06.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:06.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:06.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:06.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:06.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:06.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:06.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:06.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:06.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:06.243 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:06.243 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:11.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:11.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:11.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:11.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:11.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:11.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:11.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:11.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:11.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:11.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:11.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:05:11.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:05:11.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:05:11.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:11.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:11.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:11.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:05:11.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:11.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:05:11.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:11.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:05:11.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:05:11.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:11.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:11.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:11.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:05:11.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:11.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:05:11.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:11.279 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:05:11.279 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:05:11.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:11.279 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:11.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:11.280 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:05:11.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:11.280 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:05:11.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:05:11.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:05:11.284 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:05:11.284 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:05:11.284 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:11.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:11.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:11.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:11.289 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:11.766 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:11.800 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:11.801 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:11.802 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:11.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:12.230 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:05:12.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:12.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:05:13.157 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:05:13.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:13.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:13.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:13.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:13.620 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:05:14.083 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:05:14.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:14.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:14.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:14.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:14.547 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:05:15.012 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:05:15.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:15.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:15.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:15.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:15.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:05:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:05:16.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:16.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:16.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:16.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:05:16.901 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:05:17.364 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:05:17.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:17.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:17.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:17.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:17.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:17.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:17.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:17.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:17.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:17.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:17.816 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:17.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1426 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:17.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1426 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:17.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1426 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:17.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1426 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:17.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1426 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:17.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1426 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:22.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:22.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:22.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:22.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:22.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:22.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:22.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:22.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:22.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:22.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:22.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:05:22.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:05:22.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:05:22.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:22.838 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:22.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:22.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:05:22.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:22.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:05:22.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:22.842 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:05:22.842 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:05:22.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:22.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:22.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:22.843 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:05:22.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:22.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:05:22.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:22.845 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:05:22.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:05:22.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:22.846 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:22.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:22.846 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:05:22.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:22.846 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:05:22.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:05:22.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:05:22.850 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:05:22.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:05:22.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:22.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:22.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:22.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:23.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:23.365 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:23.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:23.367 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:23.369 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:23.806 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:05:23.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:23.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:23.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:23.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:24.280 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:05:24.753 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:05:24.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:24.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:24.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:24.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:25.225 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:05:25.695 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:05:25.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:25.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:25.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:25.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:26.169 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:05:26.642 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:05:26.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:26.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:26.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:26.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:27.114 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:05:27.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:27.583 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:05:27.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:05:28.509 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:05:28.973 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:05:29.436 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:05:29.899 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:05:30.363 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:05:30.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:05:31.289 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:05:31.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:31.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:31.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:31.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:31.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:31.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:31.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:31.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:31.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:31.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:31.404 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:36.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:36.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:36.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:36.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:36.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:36.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:36.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:36.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:36.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:36.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:36.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:05:36.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:05:36.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:05:36.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:36.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:36.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:36.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:05:36.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:36.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:05:36.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:36.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:05:36.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:05:36.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:36.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:36.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:36.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:05:36.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:36.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:05:36.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:36.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:36.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:05:36.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:05:36.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:05:36.430 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:05:36.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:36.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:36.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:36.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:36.943 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:36.944 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:36.944 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:36.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:37.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:05:37.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:37.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:37.841 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:05:38.304 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:05:38.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:38.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:38.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:38.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:38.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:05:39.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:05:39.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:39.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:39.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:39.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:39.707 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:05:40.181 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:05:40.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:40.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:40.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:40.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:40.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:05:40.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:40.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:40.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:40.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:40.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:40.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:40.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:40.957 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:45.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:45.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:45.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:45.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:45.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:45.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:45.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:45.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:45.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:45.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:45.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:05:45.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:05:45.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:05:45.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:45.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:45.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:45.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:05:45.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:45.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:05:45.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:45.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:05:45.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:05:45.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:45.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:45.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:45.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:05:45.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:45.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:05:45.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:45.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:05:45.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:05:45.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:45.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:45.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:45.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:05:45.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:45.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:05:45.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:05:45.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:05:45.991 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:05:45.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:45.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:46.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:46.508 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:46.509 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:46.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:46.510 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:46.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:46.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:46.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:46.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:46.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:46.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:46.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:46.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:46.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:46.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:46.563 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:46.563 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:46.563 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:46.563 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:46.563 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:46.563 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:46.563 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:51.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:51.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:51.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:51.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:51.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:51.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:51.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:51.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:51.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:51.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:51.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:05:51.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:05:51.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:05:51.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:51.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:51.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:51.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:05:51.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:51.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:05:51.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:51.593 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:05:51.593 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:05:51.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:51.594 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:51.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:51.594 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:05:51.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:51.595 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:05:51.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:51.596 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:05:51.596 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:05:51.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:51.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:51.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:51.597 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:05:51.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:51.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:05:51.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:05:51.601 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:05:51.601 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:05:51.601 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:51.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:51.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:52.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:52.116 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:52.117 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:52.118 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:52.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:52.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:52.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:52.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:52.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:52.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:52.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:52.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:52.176 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:52.176 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:57.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:57.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:57.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:57.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:57.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:57.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:57.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:57.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:57.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:05:57.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:05:57.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:05:57.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:05:57.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:57.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:57.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:57.200 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:05:57.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:05:57.200 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:05:57.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:57.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:05:57.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:05:57.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:57.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:57.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:05:57.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:05:57.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:05:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:57.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:05:57.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:05:57.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:57.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:05:57.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:57.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:05:57.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:05:57.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:05:57.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:57.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:05:57.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:05:57.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:05:57.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:05:57.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:05:57.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:05:57.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:05:57.211 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:05:57.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:05:57.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:05:57.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:05:57.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:05:57.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:05:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:05:57.731 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:05:57.732 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:05:57.733 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:05:57.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:05:57.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:05:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:05:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:05:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:05:57.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:05:57.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:05:57.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:05:57.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:05:57.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:05:57.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:05:57.788 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:05:57.788 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:02.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:02.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:02.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:02.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:02.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:02.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:02.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:02.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:02.807 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:02.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:02.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:06:02.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:06:02.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:06:02.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:02.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:02.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:02.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:06:02.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:02.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:06:02.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:02.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:06:02.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:06:02.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:02.818 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:02.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:02.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:06:02.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:02.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:06:02.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:02.821 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:06:02.821 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:06:02.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:02.821 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:02.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:02.821 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:06:02.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:02.822 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:06:02.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:02.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:06:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:06:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:06:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:06:02.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:06:02.825 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:06:02.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:02.830 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:06:03.307 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:06:03.340 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:06:03.341 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:06:03.341 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:06:03.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:03.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:03.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:03.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:06:03.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:03.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:06:03.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:06:03.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:06:03.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:06:03.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:06:03.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:03.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:03.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:03.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:04.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:06:04.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:06:04.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:04.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:04.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:04.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:05.195 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:06:05.668 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:06:05.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:05.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:05.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:05.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:06.140 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:06:06.364 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:06:06.364 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:06:06.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:06.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:06.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:06.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:06.410 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:06:06.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:06.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:06.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:06.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:06.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:06.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:06.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:06.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:06.426 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:06:06.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:06.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:06.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:06.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.427 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=777 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.428 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:06.429 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=778 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:11.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:11.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:11.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:11.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:11.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:11.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:11.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:11.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:11.452 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:11.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:11.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:06:11.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:06:11.464 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:06:11.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:11.465 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:11.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:11.466 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:06:11.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:11.467 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:06:11.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:11.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:06:11.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:06:11.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:11.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:11.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:11.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:06:11.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:11.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:06:11.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:11.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:06:11.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:06:11.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:11.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:11.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:11.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:06:11.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:11.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:06:11.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:11.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:06:11.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:06:11.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:06:11.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:06:11.484 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:06:11.484 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:06:11.484 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:11.488 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:06:11.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:06:11.997 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:06:11.997 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:06:11.998 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:06:11.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:12.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:12.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:12.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:06:12.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:12.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:06:12.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:06:12.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:06:12.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:06:12.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:06:12.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:12.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:12.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:12.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:12.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:06:13.383 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:06:13.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:13.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:13.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:13.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:06:14.329 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:06:14.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:14.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:14.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:14.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:14.801 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:06:15.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:06:15.025 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:06:15.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:15.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:15.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:06:15.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:15.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:15.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:15.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:15.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:06:15.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:15.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:15.753 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:06:15.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:15.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:15.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:15.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:15.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:15.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:15.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:15.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:15.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:15.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:15.763 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:06:15.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:15.763 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:15.763 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:15.763 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:15.763 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:20.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:20.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:20.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:20.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:20.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:20.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:20.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:20.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:20.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:20.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:20.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:06:20.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:06:20.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:06:20.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:20.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:20.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:20.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:06:20.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:20.791 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:06:20.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:20.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:06:20.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:06:20.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:20.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:20.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:20.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:06:20.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:20.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:06:20.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:20.796 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:06:20.796 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:06:20.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:20.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:20.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:20.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:06:20.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:20.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:06:20.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:20.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:06:20.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:06:20.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:06:20.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:06:20.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:06:20.800 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:06:20.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:20.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:20.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:20.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:06:21.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:06:21.316 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:06:21.317 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:06:21.318 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:06:21.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:21.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:21.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:21.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:06:21.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:21.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:06:21.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:06:21.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:06:21.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:06:21.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:06:21.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:22.226 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:06:22.699 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:06:22.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:22.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:22.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:22.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:23.172 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:06:23.644 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:06:23.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:23.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:23.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:23.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:24.115 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:06:24.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:06:24.339 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:06:24.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:24.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:24.588 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:06:24.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:24.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:24.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:24.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:25.061 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:06:25.533 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:06:25.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:26.007 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:06:26.479 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:06:26.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:06:27.423 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:06:27.896 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:06:28.368 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:06:28.841 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:06:29.314 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:06:29.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:29.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:29.342 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:06:29.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:29.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:29.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:29.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:29.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:29.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:29.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:29.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:29.363 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:06:29.363 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:29.364 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:34.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:34.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:34.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:34.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:34.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:34.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:34.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:34.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:06:34.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:06:34.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:06:34.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:34.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:34.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:34.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:06:34.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:34.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:06:34.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:34.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:06:34.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:06:34.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:34.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:34.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:34.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:06:34.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:34.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:06:34.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:34.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:06:34.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:06:34.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:34.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:34.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:34.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:06:34.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:34.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:06:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:34.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:06:34.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:06:34.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:06:34.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:06:34.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:06:34.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:06:34.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:06:34.399 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:06:34.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:34.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:34.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:34.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:34.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:06:34.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:06:34.915 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:06:34.917 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:06:34.917 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:06:34.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:34.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:34.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:34.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:06:34.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:34.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:06:34.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:06:34.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:06:34.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:06:35.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:06:35.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:35.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:35.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:35.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:35.825 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:06:36.298 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:06:36.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:36.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:36.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:36.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:06:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:06:37.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:37.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:37.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:37.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:37.714 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:06:37.937 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:06:37.937 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:06:37.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:37.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:38.187 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:06:38.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:38.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:38.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:38.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:38.660 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:06:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:06:39.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:39.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:39.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:39.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:06:40.078 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:06:40.551 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:06:41.024 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:06:41.497 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:06:41.969 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:06:42.441 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:06:42.915 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:06:42.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:42.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:42.941 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:06:42.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:42.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:42.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:42.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:42.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:42.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:42.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:42.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:42.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:42.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:42.962 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:06:42.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:42.962 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:47.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:47.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:47.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:47.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:47.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:47.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:47.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:47.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:47.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:47.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:06:47.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:06:47.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:06:47.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:06:47.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:47.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:47.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:47.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:06:47.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:06:47.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:06:47.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:47.995 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:06:47.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:06:47.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:47.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:47.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:47.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:06:47.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:06:47.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:06:47.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:47.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:06:48.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:06:48.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:48.000 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:06:48.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:48.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:06:48.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:06:48.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:06:48.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:06:48.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:06:48.005 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:06:48.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:06:48.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:06:48.010 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:06:48.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:06:48.517 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:06:48.518 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:06:48.518 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:06:48.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:48.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:48.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:48.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:06:48.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:48.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:06:48.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:06:48.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:06:48.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:06:48.961 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:06:49.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:49.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:49.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:49.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:49.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:06:49.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:06:50.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:50.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:50.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:50.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:50.378 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:06:50.850 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:06:51.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:51.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:51.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:51.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:51.322 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:06:51.545 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:06:51.545 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:06:51.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:51.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:06:51.795 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:06:52.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:52.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:52.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:52.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:52.267 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:06:52.740 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:06:53.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:53.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:53.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:53.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:53.212 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:06:53.686 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:06:54.159 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:06:54.633 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:06:55.105 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:06:55.579 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:06:56.052 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:06:56.525 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:06:56.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:06:56.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:06:56.549 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:06:56.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:06:56.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:06:56.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:06:56.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:06:56.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:06:56.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:06:56.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:06:56.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:06:56.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:06:56.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:06:56.570 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:06:56.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:06:56.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:56.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:56.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:56.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:56.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:06:56.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:01.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:01.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:01.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:01.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:01.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:01.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:01.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:01.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:01.587 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:01.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:01.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:01.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:01.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:01.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:01.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:01.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:01.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:01.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:01.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:01.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:01.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:01.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:01.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:01.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:01.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:01.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:01.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:01.605 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:01.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:01.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:01.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:01.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:01.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:01.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:01.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:01.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:01.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:01.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.612 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:01.612 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:01.612 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:01.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:01.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:01.617 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:02.093 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:02.129 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:02.130 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:02.131 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:02.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:02.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:02.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:02.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:02.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:02.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:02.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:02.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:02.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:02.183 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:07:02.184 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:07:02.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:02.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:02.564 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:07:02.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:02.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:02.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:02.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:03.036 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:07:03.507 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:07:03.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:03.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:03.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:03.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:03.981 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:07:04.453 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:07:04.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:04.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:04.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:04.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:04.924 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:07:05.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:07:05.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:05.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:05.870 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:07:06.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:07:06.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:06.814 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:07:07.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:07.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:07.186 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:07:07.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:07.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:07.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:07.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:07.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:07.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:07.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:07.201 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:07:12.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:12.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:12.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:12.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:12.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:12.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:12.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:12.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:12.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:12.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:12.218 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:12.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:12.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:12.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:12.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:12.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:12.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:12.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:12.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:12.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:12.229 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:12.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:12.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:12.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:12.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:12.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:12.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:12.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:12.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:12.233 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:12.233 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:12.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:12.233 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:12.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:12.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:12.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:12.234 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:12.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:12.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:12.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:12.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.238 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:12.238 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:12.238 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:12.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:12.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:12.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:12.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:12.243 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:12.722 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:12.752 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:12.753 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:12.754 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:12.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:12.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:12.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:12.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:12.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:12.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:12.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:12.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:12.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:13.194 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:07:13.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:13.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:13.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:13.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:07:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:07:14.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:14.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:14.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:14.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:07:15.083 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:07:15.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:15.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:15.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:15.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:15.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:07:15.778 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:07:15.778 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:07:15.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:15.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:16.028 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:07:16.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:16.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:16.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:16.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:16.501 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:07:16.973 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:07:17.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:17.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:17.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:17.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:17.446 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:07:17.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:17.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:17.780 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:07:17.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:17.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:17.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:17.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:17.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:17.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:17.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:17.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:17.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:17.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:17.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:17.793 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:07:17.793 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1199 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:17.793 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1199 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:17.793 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1199 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:17.793 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1199 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:17.793 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1199 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:22.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:22.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:22.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:22.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:22.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:22.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:22.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:22.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:22.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:22.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:22.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:22.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:22.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:22.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:22.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:22.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:22.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:22.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:22.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:22.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:22.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:22.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:22.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:22.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:22.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:22.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:22.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:22.820 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:22.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:22.821 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:22.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:22.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:22.822 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:22.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:22.822 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:22.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:22.822 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:22.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:22.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:22.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:22.826 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:22.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:22.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:22.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:23.310 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:23.360 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:23.362 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:23.364 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:23.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:23.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:23.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:23.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:23.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:23.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:23.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:23.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:23.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:23.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:07:23.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:23.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:23.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:23.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:24.253 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:07:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:07:24.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:24.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:24.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:24.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:25.197 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:07:25.670 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:07:25.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:25.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:25.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:25.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:26.142 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:07:26.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:26.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:26.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:26.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:26.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:26.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:26.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:26.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:26.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:26.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:26.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:26.466 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:07:26.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:26.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:31.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:31.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:31.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:31.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:31.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:31.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:31.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:31.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:31.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:31.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:31.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:31.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:31.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:31.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:31.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:31.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:31.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:31.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:31.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:31.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:31.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:31.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:31.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:31.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:31.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:31.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:31.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:31.492 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:31.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:31.495 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:31.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:31.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:31.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:31.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:31.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:31.496 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:31.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:31.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:31.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:31.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:31.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:31.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:31.499 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:31.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:31.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:31.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:31.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:31.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:32.013 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:32.014 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:32.015 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:32.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:32.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:32.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:32.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:32.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:32.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:32.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:32.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:32.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:07:32.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:32.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:32.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:32.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:32.927 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:07:33.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:07:33.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:33.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:33.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:33.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:33.872 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:07:34.344 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:07:34.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:34.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:34.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:34.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:34.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:07:35.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:35.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:35.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:35.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:35.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:35.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:35.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:35.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:35.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:35.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:35.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:35.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:35.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:35.139 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:07:35.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:35.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:35.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:35.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:35.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:35.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:40.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:40.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:40.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:40.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:40.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:40.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:40.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:40.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:40.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:40.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:40.161 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:40.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:40.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:40.162 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:40.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:40.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:40.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:40.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:40.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:40.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:40.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:40.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:40.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:40.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:40.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:40.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:40.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:40.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:40.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:40.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:40.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:40.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:40.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:40.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:40.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:40.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:40.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:40.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:40.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:40.174 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:40.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:40.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:40.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:40.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:40.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:40.688 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:40.689 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:40.690 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:40.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:40.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:40.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:40.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:40.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:40.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:40.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:40.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:40.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:40.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:40.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:40.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:40.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:40.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:40.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:40.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:40.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:40.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:40.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:40.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:40.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:40.982 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=173 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:40.982 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:45.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:45.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:45.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:45.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:45.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:45.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:45.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:45.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:45.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:45.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:45.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:46.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:46.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:46.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:46.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:46.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:46.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:46.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:46.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:46.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:46.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:46.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:46.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:46.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:46.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:46.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:46.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:46.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:46.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:46.013 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:46.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:46.013 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:46.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:46.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:46.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:46.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:46.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:46.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:46.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:46.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:46.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:46.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:46.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:46.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:46.017 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:46.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:46.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:46.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:46.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:46.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:46.530 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:46.531 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:46.532 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:46.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:46.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:46.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:46.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:46.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:46.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:46.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:46.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:46.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:46.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:46.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:46.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:46.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:46.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:46.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:46.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:46.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:46.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:46.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:46.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:46.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:46.591 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:46.591 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:07:51.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:07:51.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:07:51.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:51.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:51.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:51.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:51.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:07:51.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:51.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:51.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:07:51.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:07:51.613 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:07:51.613 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:07:51.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:51.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:51.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:07:51.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:07:51.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:07:51.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:07:51.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:51.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:07:51.617 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:07:51.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:51.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:51.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:07:51.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:07:51.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:07:51.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:07:51.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:51.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:07:51.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:07:51.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:51.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:07:51.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:07:51.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:07:51.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:07:51.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:07:51.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:07:51.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:07:51.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:07:51.625 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:07:51.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:07:51.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:07:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:07:52.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:07:52.139 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:07:52.140 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:07:52.141 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:07:52.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:07:52.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:07:52.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:07:52.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:07:52.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:07:52.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:07:52.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:07:52.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:07:52.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:07:52.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:07:52.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:52.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:52.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:52.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:53.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:07:53.522 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:07:53.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:53.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:53.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:53.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:53.993 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:07:54.464 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:07:54.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:54.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:54.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:54.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:54.937 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:07:55.409 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:07:55.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:55.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:55.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:55.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:55.882 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:07:56.353 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:07:56.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:07:56.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:07:56.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:07:56.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:07:56.826 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:07:57.298 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:07:57.771 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:07:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:07:58.712 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:07:59.183 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:07:59.654 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:08:00.125 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:08:00.596 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:08:00.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:08:00.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:08:00.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:00.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:00.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:00.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:00.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:00.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:00.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:00.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:00.938 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:08:00.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:00.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:05.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:05.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:05.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:05.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:05.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:05.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:05.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:05.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:05.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:05.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:05.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:08:05.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:08:05.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:08:05.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:05.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:05.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:05.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:08:05.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:05.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:08:05.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:05.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:08:05.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:08:05.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:05.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:05.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:05.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:08:05.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:05.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:08:05.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:05.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:08:05.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:08:05.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:05.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:05.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:05.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:08:05.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:05.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:08:05.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:08:05.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:08:05.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:08:05.970 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:08:05.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:05.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:05.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:05.975 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:08:06.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:08:06.486 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:08:06.487 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:08:06.488 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:08:06.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:06.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:08:06.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:08:06.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:08:06.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:08:06.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:08:06.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:08:06.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:08:06.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:08:06.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:08:06.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:06.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:06.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:06.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:07.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:08:07.866 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:08:07.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:07.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:07.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:07.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:08.339 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:08:08.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:08:08.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:08.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:08.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:08.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:09.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:08:09.758 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:08:09.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:09.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:09.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:09.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:10.230 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:08:10.702 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:08:10.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:10.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:10.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:10.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:11.173 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:08:11.644 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:08:12.115 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:08:12.586 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:08:13.056 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:08:13.530 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:08:14.002 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:08:14.475 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:08:14.946 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:08:15.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:08:15.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:08:15.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:15.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:15.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:15.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:15.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:15.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:15.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:15.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:15.293 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:08:15.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:15.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:20.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:20.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:20.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:20.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:20.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:20.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:20.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:20.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:20.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:20.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:20.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:08:20.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:08:20.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:08:20.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:20.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:20.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:20.314 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:08:20.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:20.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:08:20.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:20.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:08:20.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:08:20.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:20.317 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:20.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:20.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:08:20.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:20.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:08:20.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:20.321 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:08:20.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:08:20.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:20.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:20.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:20.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:08:20.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:20.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:08:20.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:20.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:20.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:08:20.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:08:20.327 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:08:20.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:20.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:08:20.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:08:20.843 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:08:20.844 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:08:20.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:20.845 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:08:20.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:08:20.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:08:20.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:08:20.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:08:20.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:08:20.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:08:20.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:08:20.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:08:21.281 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:08:21.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:21.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:21.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:21.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:21.753 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:08:22.226 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:08:22.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:22.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:22.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:22.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:08:23.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:08:23.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:23.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:23.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:23.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:23.642 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:08:23.865 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:08:23.865 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-02 03:08:23.866 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:08:23.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:08:23.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:08:24.115 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:08:24.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:24.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:24.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:24.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:24.588 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:08:24.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:08:24.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:08:24.901 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:08:24.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:24.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:24.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:24.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:24.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:24.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:24.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:24.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:24.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:24.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:24.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:24.920 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.921 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.922 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.922 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.922 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:24.922 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:29.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:29.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:29.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:29.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:29.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:29.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:29.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:29.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:29.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:29.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:29.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:08:29.933 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:08:29.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:08:29.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:29.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:29.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:29.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:08:29.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:29.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:08:29.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:29.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:08:29.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:08:29.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:29.938 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:29.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:29.938 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:08:29.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:29.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:08:29.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:29.941 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:08:29.941 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:08:29.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:29.941 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:29.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:29.941 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:08:29.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:29.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:08:29.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:29.944 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:08:29.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:08:29.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.945 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:08:29.945 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:08:29.945 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:08:29.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:29.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:29.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:08:30.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:08:30.459 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:08:30.460 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:08:30.461 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:08:30.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:30.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:30.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:30.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:30.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:30.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:30.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:30.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:30.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:30.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:30.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:30.866 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:08:30.866 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.866 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.866 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.866 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.866 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.866 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:30.867 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:35.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:35.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:35.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:35.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:35.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:35.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:35.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:35.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:35.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:35.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:35.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:08:35.891 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:08:35.892 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:08:35.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:35.892 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:35.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:35.893 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:08:35.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:35.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:08:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:35.897 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:08:35.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:08:35.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:35.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:35.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:35.899 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:08:35.899 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:35.899 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:08:35.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:35.901 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:08:35.902 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:08:35.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:35.902 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:35.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:35.902 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:08:35.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:35.903 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:08:35.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:08:35.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:08:35.907 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:08:35.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:35.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:35.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:35.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:08:36.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:08:36.422 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:08:36.424 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:08:36.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:36.425 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:08:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:08:36.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:36.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:36.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:36.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:08:37.779 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:08:37.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:37.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:37.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:37.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:38.243 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:08:38.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:08:38.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:38.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:38.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:38.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:39.170 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:08:39.633 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:08:39.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:39.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:39.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:39.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:08:40.559 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:08:40.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:41.023 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:08:41.486 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:08:41.949 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:08:42.413 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:08:42.876 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:08:43.339 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:08:43.803 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:08:44.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:08:44.729 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:08:45.192 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:08:45.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:45.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:45.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:45.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:45.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:45.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:45.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:45.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:45.481 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:08:45.481 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2104 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:45.481 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2104 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:45.481 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2104 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:45.481 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2104 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:45.481 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2104 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:45.481 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2104 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:08:50.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:08:50.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:08:50.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:50.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:50.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:50.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:50.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:08:50.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:50.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:50.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:08:50.486 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:08:50.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:08:50.494 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:08:50.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:50.494 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:50.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:08:50.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:08:50.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:08:50.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:08:50.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:50.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:08:50.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:08:50.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:50.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:50.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:08:50.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:08:50.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:08:50.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:08:50.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:50.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:08:50.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:08:50.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:50.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:08:50.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:08:50.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:08:50.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:08:50.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:08:50.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:50.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:08:50.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:08:50.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:08:50.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:08:50.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:08:50.505 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:08:50.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:08:50.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:08:50.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:08:50.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:08:51.021 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:08:51.022 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:08:51.023 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:08:51.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:08:51.460 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:08:51.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:51.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:51.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:51.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:51.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:08:52.402 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:08:52.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:52.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:52.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:52.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:52.865 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:08:53.328 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:08:53.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:53.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:53.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:53.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:53.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:08:54.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:08:54.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:54.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:54.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:54.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:54.719 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:08:55.182 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:08:55.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:08:55.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:08:55.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:08:55.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:08:55.645 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:08:56.109 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:08:56.572 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:08:57.035 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:08:57.498 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:08:57.962 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:08:58.425 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:08:58.889 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:08:59.352 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:08:59.816 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:09:00.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:00.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:00.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:00.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:00.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:00.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:00.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:00.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:00.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:00.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:00.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:00.041 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:05.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:05.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:05.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:05.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:05.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:05.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:05.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:05.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:05.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:05.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:05.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:05.050 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:05.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:05.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:05.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:05.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:05.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:05.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:05.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:05.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:05.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:05.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:05.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:05.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:05.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:05.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:05.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:05.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:05.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:05.054 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:05.054 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:05.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:05.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:05.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:05.058 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:05.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:05.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:05.529 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:05.569 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:05.569 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:05.570 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:05.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:05.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:06.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:06.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:06.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:06.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:06.462 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:09:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:09:07.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:07.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:07.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:07.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:07.388 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:09:07.850 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:09:08.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:08.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:08.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:08.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:08.315 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:09:08.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:08.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:08.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:08.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:08.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:08.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:08.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:08.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:08.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:08.604 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:08.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:08.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:08.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:08.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:13.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:13.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:13.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:13.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:13.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:13.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:13.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:13.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:13.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:13.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:13.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:13.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:13.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:13.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:13.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:13.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:13.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:13.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:13.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:13.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:13.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:13.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:13.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:13.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:13.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:13.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:13.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:13.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:13.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:13.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:13.632 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:13.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:13.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:13.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:13.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:13.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:13.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:13.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:13.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:13.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:13.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:13.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:13.637 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:13.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:13.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:13.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:13.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:14.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:14.160 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:14.161 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:14.162 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:14.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:14.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:14.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:14.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:09:14.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:14.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:09:14.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:09:14.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:09:14.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:09:14.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:14.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:09:14.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:09:14.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:14.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:14.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:14.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:14.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:14.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:14.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:14.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:14.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:14.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:14.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:14.603 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:14.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:14.604 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:19.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:19.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:19.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:19.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:19.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:19.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:19.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:19.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:19.622 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:19.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:19.622 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:19.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:19.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:19.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:19.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:19.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:19.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:19.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:19.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:19.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:19.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:19.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:19.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:19.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:19.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:19.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:19.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:19.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:19.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:19.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:19.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:19.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:19.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:19.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:19.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:19.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:19.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:19.639 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:19.639 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:19.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:19.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:20.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:20.155 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:20.156 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:20.156 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:20.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:20.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:20.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:20.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:20.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:20.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:20.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:20.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:20.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:20.166 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:20.166 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:20.166 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:20.166 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:20.166 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:20.166 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:25.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:25.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:25.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:25.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:25.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:25.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:25.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:25.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:25.185 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:25.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:25.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:25.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:25.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:25.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:25.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:25.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:25.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:25.190 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:25.190 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:25.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:25.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:25.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:25.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:25.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:25.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:25.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:25.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:25.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:25.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:25.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:25.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:25.194 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:25.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:25.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:25.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:25.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:25.200 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:25.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:25.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:25.672 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:25.720 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:25.721 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:25.722 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:25.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:26.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:26.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:26.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:26.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:26.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:26.600 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:09:27.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:09:27.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:27.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:27.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:27.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:27.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:09:27.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:27.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:27.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:27.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:27.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:27.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:27.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:27.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:27.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:27.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:27.732 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:27.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=557 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:27.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=557 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:27.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=557 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:27.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=557 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:27.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=557 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:27.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=557 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:32.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:32.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:32.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:32.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:32.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:32.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:32.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:32.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:32.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:32.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:32.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:32.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:32.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:32.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:32.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:32.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:32.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:32.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:32.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:32.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:32.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:32.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:32.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:32.760 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:32.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:32.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:32.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:32.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:32.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:32.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:32.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:32.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:32.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:32.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:32.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:32.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:32.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:32.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:32.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:32.770 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:32.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:32.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:32.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:33.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:33.284 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:33.285 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:33.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:33.286 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:33.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:33.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:09:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:33.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:09:33.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:09:33.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:09:33.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:09:33.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:33.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:33.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:33.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:33.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:34.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:09:34.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:09:34.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:34.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:34.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:34.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:09:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:09:35.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:35.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:35.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:35.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:36.028 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:09:36.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:36.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:36.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:36.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:36.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:36.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:36.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:36.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:36.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:36.045 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:36.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:36.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:36.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:36.045 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:41.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:41.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:41.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:41.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:41.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:41.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:41.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:41.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:41.063 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:41.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:41.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:41.071 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:41.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:41.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:41.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:41.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:41.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:41.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:41.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:41.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:41.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:41.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:41.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:41.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:41.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:41.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:41.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:41.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:41.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:41.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:41.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:41.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:41.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:41.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:41.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:41.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:41.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:41.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:41.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:41.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:41.086 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:41.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:41.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:41.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:41.569 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:41.600 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:41.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:41.602 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:41.603 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:41.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:41.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:41.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:09:41.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:41.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:09:41.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:09:41.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:09:41.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:09:42.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:42.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:42.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:42.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:42.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:09:42.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:09:43.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:43.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:43.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:43.458 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:09:43.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:43.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:43.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:43.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:43.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:43.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:43.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:43.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:43.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:43.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:43.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:43.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:43.718 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:43.718 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:43.718 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:43.718 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:43.718 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:43.718 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:43.718 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:09:48.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:48.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:48.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:48.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:48.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:48.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:48.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:48.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:48.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:48.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:48.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:48.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:48.744 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:48.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:48.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:48.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:48.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:48.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:48.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:48.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:48.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:48.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:48.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:48.750 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:48.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:48.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:48.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:48.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:48.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:48.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:48.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:48.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:48.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:48.754 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:48.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:48.754 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:48.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:48.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:48.757 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:48.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:48.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:48.758 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:48.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:48.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:48.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:49.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:49.273 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:49.273 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:49.274 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:49.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:49.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:49.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:49.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:09:49.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:49.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:09:49.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:09:49.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:09:49.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:09:49.713 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:49.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:49.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:49.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:49.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:50.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:09:50.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:09:50.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:50.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:50.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:50.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:51.128 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:09:51.601 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:09:51.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:51.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:51.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:51.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:52.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:09:52.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:52.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:52.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:52.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:52.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:52.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:52.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:52.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:52.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:52.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:52.104 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:52.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:52.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:57.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:57.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:57.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:57.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:57.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:57.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:57.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:57.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:57.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:57.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:09:57.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:09:57.130 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:09:57.131 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:09:57.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:57.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:57.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:57.132 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:09:57.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:09:57.133 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:09:57.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:57.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:09:57.136 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:09:57.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:57.136 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:57.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:57.137 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:09:57.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:09:57.137 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:09:57.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:57.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:09:57.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:09:57.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:57.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:09:57.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:57.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:09:57.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:09:57.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:09:57.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:09:57.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:09:57.144 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:09:57.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:09:57.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:09:57.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:09:57.656 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:09:57.657 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:09:57.658 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:09:57.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:09:57.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:57.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:57.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:09:57.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:09:57.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:09:57.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:09:57.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:09:57.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:09:58.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:09:58.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:58.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:58.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:58.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:58.571 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:09:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:09:59.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:59.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:59.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:59.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:59.517 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:09:59.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:09:59.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:09:59.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:09:59.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:09:59.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:09:59.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:09:59.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:09:59.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:09:59.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:09:59.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:09:59.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:09:59.785 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:09:59.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:09:59.785 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:04.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:04.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:04.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:04.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:04.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:04.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:04.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:04.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:04.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:04.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:04.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:04.806 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:04.806 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:04.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:04.807 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:04.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:04.807 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:04.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:04.808 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:04.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:04.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:04.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:04.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:04.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:04.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:04.811 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:04.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:04.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:04.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:04.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:04.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:04.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:04.814 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:04.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:04.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:04.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:04.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:04.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:04.817 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:04.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:04.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:04.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:04.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:04.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:04.818 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:04.818 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:04.818 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:04.823 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:05.302 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:05.332 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:05.332 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:05.333 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:05.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:05.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:05.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:05.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:10:05.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:10:05.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:10:05.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:10:05.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:10:05.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:10:05.774 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:10:05.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:05.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:05.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:05.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:06.262 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:10:06.734 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:10:06.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:06.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:06.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:06.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:07.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:10:07.679 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:10:07.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:07.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:07.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:07.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:08.151 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:10:08.623 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:10:08.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:08.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:08.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:08.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:09.094 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:10:09.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:09.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:09.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:09.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:09.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:09.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:09.123 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:09.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:09.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:09.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:09.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:09.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:09.123 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:14.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:14.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:14.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:14.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:14.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:14.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:14.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:14.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:14.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:14.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:14.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:14.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:14.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:14.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:14.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:14.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:14.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:14.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:14.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:14.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:14.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:14.151 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:14.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:14.151 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:14.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:14.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:14.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:14.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:14.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:14.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:14.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:14.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:14.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:14.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:14.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:14.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:14.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:14.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:14.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:14.159 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:14.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:14.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:14.164 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:14.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:14.673 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:14.674 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:14.675 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:14.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:14.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:14.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:10:14.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:10:14.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:10:14.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:10:14.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:10:14.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:10:15.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:10:15.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:15.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:15.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:15.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:15.585 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:10:16.056 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:10:16.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:16.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:16.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:16.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:16.530 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:10:17.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:10:17.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:17.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:17.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:17.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:17.474 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:10:17.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:17.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:17.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:17.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:17.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:17.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:17.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:17.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:17.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:17.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:17.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:17.734 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:17.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:17.734 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:17.734 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:17.734 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:17.734 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:22.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:22.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:22.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:22.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:22.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:22.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:22.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:22.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:22.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:22.771 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:22.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:22.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:22.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:22.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:22.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:22.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:22.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:22.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:22.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:22.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:22.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:22.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:22.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:22.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:22.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:22.780 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:22.780 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:22.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:22.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:22.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:22.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:22.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:22.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:22.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:22.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:22.785 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:22.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:22.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:22.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:22.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:23.267 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:23.298 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:23.299 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:23.300 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:23.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:23.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:10:23.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:23.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:23.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:23.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:24.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:10:24.658 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:10:24.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:24.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:24.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:24.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:25.121 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:10:25.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:25.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:25.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:25.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:25.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:25.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:25.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:25.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:25.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:25.325 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:25.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:25.325 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=555 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.326 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:25.327 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=556 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:30.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:30.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:30.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:30.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:30.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:30.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:30.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:30.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:30.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:30.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:30.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:30.344 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:30.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:30.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:30.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:30.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:30.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:30.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:30.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:30.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:30.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:30.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:30.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:30.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:30.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:30.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:30.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:30.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:30.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:30.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:30.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:30.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:30.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:30.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:30.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:30.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:30.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:30.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:30.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:30.358 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:30.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:30.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:30.875 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:30.876 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:30.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:30.877 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:30.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:30.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:30.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:10:30.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:30.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:31.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:10:31.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:31.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:31.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:31.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:31.786 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:10:32.259 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:10:32.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:32.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:32.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:32.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:32.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:10:33.201 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:10:33.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:33.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:33.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:33.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:33.664 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:10:33.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:33.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:33.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:33.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:33.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:33.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:33.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:33.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:33.954 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:33.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:33.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:33.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:33.954 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:38.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:38.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:38.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:38.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:38.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:38.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:38.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:38.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:38.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:38.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:38.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:38.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:38.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:38.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:38.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:38.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:38.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:38.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:38.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:38.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:38.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:38.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:38.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:38.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:38.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:38.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:38.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:38.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:38.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:38.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:38.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:38.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:38.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:38.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:38.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:38.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:38.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:38.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:38.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:38.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:38.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:38.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:38.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:38.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:38.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:38.991 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:38.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:38.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:38.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:38.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:38.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:39.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:39.505 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:39.506 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:39.507 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:39.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:39.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:39.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:10:39.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:39.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:39.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:39.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:39.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:39.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:39.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:39.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:39.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:39.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:39.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:39.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:39.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:39.570 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:39.570 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:44.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:44.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:44.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:44.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:44.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:44.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:44.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:44.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:44.590 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:44.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:44.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:44.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:44.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:44.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:44.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:44.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:44.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:44.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:44.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:44.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:44.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:44.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:44.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:44.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:44.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:44.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:44.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:44.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:44.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:44.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:44.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:44.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:44.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:44.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:44.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:44.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:44.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:44.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:44.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:44.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:44.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:44.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:44.608 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:44.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:44.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:44.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:44.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:45.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:45.122 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:45.123 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:45.124 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:45.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:45.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:45.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:45.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:10:45.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:45.563 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:10:45.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:45.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:45.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:45.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:46.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:10:46.498 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:10:46.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:46.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:46.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:46.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:46.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:10:47.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:10:47.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:47.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:47.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:47.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:47.888 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:10:48.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:48.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:48.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:48.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:48.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:48.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:48.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:48.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:48.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:48.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:48.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:48.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:48.198 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=782 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=782 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=782 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=782 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:48.198 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=783 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:53.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:53.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:53.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:53.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:53.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:53.216 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:53.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:53.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:53.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:53.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:53.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:53.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:53.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:53.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:53.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:53.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:53.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:53.225 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:53.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:53.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:53.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:53.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:53.227 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:53.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:53.227 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:53.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:53.229 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:53.229 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:53.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:53.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:53.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:53.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:53.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:53.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:53.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:53.233 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:53.233 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:53.233 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:53.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.238 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:53.715 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:53.746 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:53.747 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:53.747 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:53.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:53.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:10:53.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:10:53.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:10:53.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:53.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:53.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:53.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:53.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:53.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:53.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:53.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:53.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:53.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:53.829 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:53.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:53.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:53.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:53.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:53.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:53.829 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:58.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:58.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:58.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:58.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:58.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:58.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:58.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:58.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:58.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:58.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:10:58.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:10:58.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:10:58.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:10:58.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:58.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:58.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:58.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:10:58.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:10:58.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:10:58.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:58.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:10:58.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:10:58.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:58.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:58.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:58.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:10:58.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:10:58.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:10:58.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:58.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:10:58.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:10:58.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:58.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:10:58.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:58.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:10:58.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:10:58.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:10:58.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:58.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:10:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:10:58.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:10:58.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:10:58.868 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:10:58.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:10:58.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:10:58.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:10:58.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:10:58.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:10:59.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:10:59.381 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:10:59.382 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:10:59.383 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:10:59.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:10:59.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:10:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:10:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:10:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:10:59.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:10:59.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:10:59.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:10:59.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:10:59.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:10:59.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:10:59.395 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:10:59.395 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:04.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:04.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:04.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:04.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:04.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:04.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:04.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:04.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:04.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:04.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:04.413 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:04.413 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:04.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:04.413 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:04.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:04.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:04.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:04.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:04.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:04.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:04.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:04.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:04.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:04.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:04.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:04.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:04.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:04.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:04.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:04.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:04.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:04.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:04.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:04.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:04.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:04.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:04.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:04.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:04.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:04.424 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:04.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:04.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:04.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:04.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:04.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:04.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:04.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:04.941 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:04.942 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:04.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:04.943 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:04.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:04.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:04.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:04.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:04.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:04.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:04.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:04.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:04.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:04.956 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:04.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:04.956 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.956 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.956 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:04.957 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:09.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:09.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:09.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:09.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:09.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:09.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:09.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:09.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:09.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:09.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:09.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:09.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:09.991 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:09.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:09.992 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:09.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:09.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:09.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:09.993 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:09.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:09.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:09.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:09.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:09.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:09.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:09.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:09.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:09.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:09.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:10.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:10.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:10.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:10.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:10.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:10.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:10.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:10.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:10.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:10.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:10.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:10.006 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:10.006 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:10.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:10.488 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:10.521 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:10.522 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:10.522 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:10.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:10.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:10.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:10.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:10.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:10.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:10.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:10.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:10.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:10.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:10.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:10.535 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.535 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:10.536 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:15.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:15.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:15.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:15.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:15.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:15.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:15.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:15.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:15.560 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:15.561 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:15.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:15.561 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:15.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:15.562 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:15.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:15.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:15.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:15.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:15.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:15.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:15.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:15.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:15.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:15.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:15.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:15.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:15.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:15.570 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:15.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:15.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:15.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:15.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:15.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:15.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:15.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:15.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:15.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:15.575 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:15.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:15.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:16.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:16.091 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:16.092 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:16.093 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:16.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:16.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:16.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:16.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:16.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:16.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:16.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:16.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:16.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:16.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:16.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:16.110 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:16.111 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:21.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:21.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:21.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:21.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:21.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:21.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:21.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:21.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:21.126 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:21.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:21.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:21.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:21.136 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:21.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:21.136 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:21.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:21.137 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:21.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:21.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:21.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:21.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:21.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:21.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:21.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:21.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:21.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:21.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:21.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:21.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:21.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:21.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:21.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:21.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:21.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:21.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:21.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:21.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:21.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:21.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:21.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:21.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:21.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:21.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:21.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:21.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:21.152 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:21.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:21.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:21.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:21.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:21.666 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:21.666 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:21.667 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:21.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:22.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:11:22.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:22.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:22.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:22.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:22.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:11:23.026 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:11:23.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:23.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:23.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:23.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:23.489 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:11:23.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:11:24.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:24.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:24.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:24.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:24.416 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:11:24.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:11:24.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:11:24.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:11:24.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:11:24.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:11:24.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:11:24.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:11:24.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:11:24.882 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:11:25.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:25.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:25.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:25.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:25.355 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:11:25.828 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:11:26.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:26.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:26.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:26.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:26.300 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:11:26.771 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:11:26.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:11:26.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:11:26.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:26.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:26.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:26.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:26.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:26.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:26.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:26.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:26.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:26.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:26.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:26.912 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:26.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:26.912 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:26.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:26.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:26.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:26.913 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:31.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:31.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:31.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:31.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:31.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:31.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:31.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:31.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:31.920 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:31.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:31.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:31.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:31.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:31.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:31.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:31.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:31.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:31.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:31.927 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:31.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:31.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:31.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:31.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:31.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:31.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:31.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:31.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:31.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:31.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:31.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:31.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:31.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:31.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:31.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:31.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:31.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:31.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:31.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:31.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:31.938 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:31.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:31.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:32.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:32.454 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:32.455 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:32.456 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:32.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:32.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:11:32.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:11:32.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:11:32.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:32.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:32.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:32.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:32.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:32.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:32.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:32.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:32.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:32.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:32.493 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:32.494 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:37.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:37.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:37.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:37.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:37.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:37.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:37.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:37.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:37.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:37.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:37.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:37.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:37.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:37.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:37.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:37.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:37.521 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:37.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:37.521 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:37.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:37.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:37.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:37.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:37.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:37.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:37.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:37.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:37.525 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:37.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:37.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:37.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:37.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:37.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:37.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:37.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:37.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:37.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:37.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:37.530 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:37.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:37.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:37.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:37.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:37.531 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:37.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:37.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:37.536 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:38.013 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:38.047 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:38.048 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:38.049 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:38.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:38.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:11:38.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:11:38.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:11:38.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:38.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:38.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:38.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:38.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:38.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:38.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:38.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:38.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:38.110 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:43.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:43.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:43.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:43.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:43.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:43.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:43.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:43.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:43.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:43.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:43.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:43.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:43.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:43.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:43.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:43.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:43.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:43.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:43.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:43.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:43.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:43.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:43.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:43.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:43.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:43.147 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:43.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:43.147 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:43.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:43.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:43.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:43.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:43.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:43.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:43.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:43.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:43.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:43.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:43.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:43.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:43.159 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:43.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:43.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.164 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:43.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:43.674 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:43.674 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:43.675 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:43.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:43.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:11:43.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:11:43.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:11:43.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:43.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:43.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:43.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:43.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:43.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:43.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:43.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:43.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:43.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:43.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:43.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:43.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:43.742 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:43.742 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:48.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:48.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:48.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:48.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:48.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:48.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:48.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:48.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:48.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:48.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:48.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:48.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:48.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:48.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:48.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:48.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:48.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:48.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:48.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:48.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:48.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:48.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:48.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:48.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:48.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:48.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:48.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:48.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:48.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:48.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:48.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:48.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:48.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:48.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:48.772 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:48.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:48.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:48.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:48.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:48.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:48.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:48.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:48.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:48.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:48.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:48.776 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:48.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:48.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:48.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:48.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:49.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:49.293 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.295 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:49.296 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:49.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:11:49.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:11:49.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:11:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:49.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:49.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:49.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:49.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:49.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:49.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:49.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:49.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:49.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:49.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:49.372 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.372 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.373 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.373 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:49.373 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:11:54.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:54.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:54.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:54.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:54.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:54.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:54.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:54.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:54.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:54.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:11:54.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:11:54.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:11:54.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:11:54.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:54.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:54.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:54.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:11:54.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:11:54.394 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:11:54.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:54.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:11:54.397 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:11:54.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:54.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:54.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:54.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:11:54.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:11:54.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:11:54.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:54.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:11:54.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:11:54.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:54.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:11:54.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:54.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:11:54.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:11:54.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:11:54.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:54.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:11:54.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:11:54.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:11:54.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:11:54.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:11:54.404 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:11:54.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:11:54.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:11:54.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:11:54.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:11:54.918 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:11:54.919 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:11:54.919 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:11:54.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:54.920 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 03:11:54.920 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 200
2026-03-02 03:11:54.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 03:11:55.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:11:55.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:55.359 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:11:55.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:55.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:55.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:55.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:55.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:55.832 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:11:56.305 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:11:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:56.559 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 03:11:56.559 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 0
2026-03-02 03:11:56.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 03:11:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:56.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:11:56.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:11:56.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:11:56.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:11:56.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:11:56.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:11:56.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:11:56.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:11:56.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:11:56.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:11:56.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:11:56.568 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:12:01.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:01.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:01.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:01.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:01.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:01.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:01.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:01.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:01.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:01.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:01.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:12:01.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:12:01.590 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:12:01.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:01.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:01.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:01.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:12:01.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:01.590 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:12:01.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:01.593 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:12:01.593 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:12:01.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:01.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:01.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:01.594 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:12:01.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:01.594 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:12:01.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:01.596 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:12:01.596 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:12:01.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:01.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:01.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:01.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:12:01.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:01.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:12:01.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:01.599 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:12:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:12:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:12:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:12:01.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:12:01.600 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:12:01.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:01.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:12:02.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:12:02.114 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:12:02.115 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:12:02.116 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:12:02.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:02.117 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 03:12:02.117 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 200
2026-03-02 03:12:02.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 03:12:02.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:02.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:02.548 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:12:02.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:02.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:02.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:02.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.021 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:12:03.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.495 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:12:03.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.753 [DEBUG] fake_trx.py:382 (BTS@172.18.244.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-02 03:12:03.753 [INFO] fake_trx.py:385 (BTS@172.18.244.20:5700) Artificial TRXC delay set to 0
2026-03-02 03:12:03.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-02 03:12:03.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:03.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:03.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:03.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:03.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:03.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:03.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:03.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:03.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:03.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:03.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:03.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:03.764 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:12:03.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:03.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:08.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:08.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:08.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:08.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:08.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:08.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:08.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:08.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:08.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:08.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:08.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:12:08.785 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:12:08.785 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:12:08.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:08.785 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:08.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:08.786 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:12:08.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:08.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:12:08.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:08.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:12:08.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:12:08.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:08.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:08.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:08.790 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:12:08.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:08.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:12:08.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:08.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:12:08.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:12:08.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:08.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:08.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:08.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:12:08.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:08.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:12:08.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:08.797 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:12:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:12:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:12:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:12:08.797 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:12:08.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:12:08.798 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:12:08.798 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:12:08.798 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:08.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:12:09.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:12:09.315 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:12:09.316 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:12:09.317 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:12:09.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:09.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:09.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:09.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:09.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:09.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:09.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:09.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:09.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:09.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:09.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:09.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:09.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:09.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:09.399 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.399 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:09.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:14.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:14.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:14.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:14.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:14.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:14.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:14.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:14.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:14.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:14.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:14.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:12:14.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:12:14.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:12:14.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:14.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:14.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:14.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:12:14.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:14.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:12:14.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:14.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:12:14.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:12:14.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:14.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:14.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:14.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:12:14.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:14.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:12:14.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:14.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:12:14.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:12:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:14.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:14.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:12:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:14.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:12:14.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:12:14.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:12:14.432 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:12:14.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:14.436 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:12:14.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:12:14.947 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:12:14.948 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:12:14.949 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:12:14.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:14.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:14.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:14.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:14.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:15.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:15.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:15.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:15.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:15.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:15.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:15.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:15.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:15.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:15.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:15.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:15.028 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:15.028 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:12:20.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:12:20.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:12:20.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:20.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:20.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:20.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:20.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:12:20.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:20.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:20.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:12:20.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:12:20.048 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:12:20.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:12:20.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:20.049 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:20.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:12:20.049 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:12:20.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:12:20.050 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:12:20.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:20.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:12:20.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:12:20.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:20.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:20.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:12:20.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:12:20.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:12:20.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:12:20.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:20.057 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:12:20.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:12:20.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:20.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:12:20.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:12:20.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:12:20.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:12:20.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:12:20.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:12:20.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:12:20.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:12:20.062 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:12:20.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:12:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:12:20.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:12:20.545 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:12:20.577 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:12:20.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:20.579 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:12:20.581 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:12:20.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:20.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:20.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:20.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:20.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:20.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:20.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:20.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:20.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:20.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:20.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:20.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:20.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:20.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:20.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:20.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:20.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:20.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:20.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:20.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:20.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:20.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:20.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:20.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:20.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:20.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:20.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:20.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:20.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:21.016 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:12:21.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:21.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:21.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:21.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:12:21.961 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:12:22.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:22.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:22.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:22.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:22.434 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:12:22.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:12:23.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:23.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:23.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:23.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:12:23.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:23.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:23.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:23.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:23.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:23.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:23.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:23.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:23.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:23.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:23.850 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:12:23.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:23.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:23.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:23.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:23.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:23.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:23.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:23.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:23.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:23.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:23.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:23.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:23.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:23.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:23.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:23.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:23.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:23.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:24.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:24.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:24.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:24.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:24.321 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:12:24.792 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:12:25.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:12:25.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:12:25.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:12:25.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:12:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:12:25.738 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:12:26.210 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:12:26.681 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:12:26.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:26.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:26.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:26.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:26.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:26.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:26.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:26.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:26.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:26.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:26.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:26.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:27.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:27.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:27.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:27.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:27.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:27.154 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:12:27.627 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:12:28.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:12:28.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:12:29.041 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:12:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:12:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:12:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:30.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:30.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:30.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:30.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:30.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:30.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:30.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:30.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:30.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:30.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:30.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:30.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:30.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:30.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:30.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:30.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:30.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:30.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:30.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:30.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:30.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:30.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:30.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:30.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:30.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:30.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:30.454 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:12:30.925 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:12:31.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:31.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:31.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:31.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:31.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:31.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:31.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:31.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:31.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:31.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:31.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:31.157 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:31.157 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:31.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:31.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:31.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:31.232 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:31.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:31.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:31.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:31.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:31.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:31.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:31.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:31.300 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:31.300 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:31.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:31.397 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:12:31.869 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:12:32.342 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:12:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:12:33.289 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:12:33.761 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:12:34.235 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:12:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:34.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:34.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:34.308 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:34.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:34.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:34.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:34.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:34.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:34.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:34.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:34.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:34.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:34.379 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:34.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:34.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:34.440 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:34.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:34.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:34.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:34.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:34.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:34.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:34.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:34.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:34.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:34.464 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:34.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:34.706 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:12:35.178 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:12:35.651 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:12:36.125 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:12:36.598 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:12:37.072 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:12:37.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:37.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:37.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:37.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:37.473 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:37.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:37.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:37.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:37.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:37.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:37.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:37.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:37.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:37.544 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:12:37.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:37.550 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:37.550 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:37.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:37.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:38.016 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:12:38.489 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:12:38.962 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:12:39.435 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:12:39.908 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:12:40.381 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:12:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:40.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:40.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:40.558 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:40.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:40.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:40.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:40.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:40.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:40.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:40.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:40.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:40.621 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:40.621 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:40.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:40.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:40.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:40.710 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:40.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:40.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:40.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:40.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:40.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:40.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:40.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:40.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:40.764 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:40.764 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:12:40.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:40.851 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:12:41.325 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:12:41.796 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:12:41.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:41.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:41.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:41.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:41.981 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:42.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:42.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:42.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:42.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:42.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:42.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:42.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:42.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:42.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:42.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:42.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:42.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:42.269 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:12:42.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:42.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:42.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:42.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:42.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:42.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:42.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:42.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:42.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:42.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:42.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:42.740 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:12:43.211 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:12:43.684 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:12:44.157 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:12:44.629 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:12:45.100 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:12:45.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:45.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:45.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:45.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:45.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:45.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:45.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:45.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:45.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:45.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:45.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:45.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:45.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:45.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:45.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:45.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:45.573 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:12:45.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:45.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:45.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:45.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:45.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:45.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:45.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:45.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:45.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:45.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:45.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:45.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:46.045 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:12:46.518 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:12:46.989 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:12:47.462 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:12:47.935 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:12:48.407 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:12:48.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:48.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:48.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:48.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:48.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:48.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:48.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:48.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:48.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:48.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:48.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:48.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:48.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:48.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:48.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:48.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:48.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:48.878 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:12:49.349 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:12:49.819 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:12:50.290 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:12:50.763 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:12:51.236 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:12:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:51.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:51.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:51.708 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:12:51.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:51.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:51.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:51.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:51.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:51.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:51.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:51.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:51.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:51.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:51.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:51.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:51.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:51.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:51.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:51.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:51.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:51.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:51.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:51.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:51.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:51.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:51.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:51.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.179 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:12:52.650 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:12:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:52.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:52.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:52.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:52.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:52.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:52.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:52.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:52.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:52.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:52.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:52.751 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:52.751 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:12:52.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:52.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:52.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:52.808 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:52.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:52.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:52.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:52.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:52.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:52.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:52.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:52.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:52.889 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:52.889 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:12:52.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:52.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:53.122 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:12:53.596 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:12:54.068 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:12:54.540 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:12:55.014 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:12:55.487 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:12:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:55.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:55.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:55.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:55.897 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:55.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:55.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:55.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:55.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:55.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:55.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:55.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:55.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:55.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:55.960 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:12:55.966 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:55.966 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:12:55.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:55.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:56.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:56.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:56.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:56.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:56.350 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:56.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:56.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:56.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:56.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:56.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:56.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:56.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:56.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:56.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:56.374 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:56.374 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:12:56.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:56.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:56.432 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:12:56.904 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 03:12:57.375 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 03:12:57.849 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 03:12:58.322 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 03:12:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 03:12:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 03:12:59.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:59.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:59.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:59.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:59.382 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:12:59.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:12:59.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:12:59.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:12:59.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:59.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:12:59.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:12:59.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:12:59.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:12:59.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:12:59.406 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:12:59.406 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:12:59.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:59.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:12:59.741 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 03:13:00.214 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 03:13:00.687 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 03:13:01.160 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 03:13:01.633 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 03:13:02.106 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 03:13:02.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:02.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:02.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:02.414 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:02.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:02.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:02.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:02.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:02.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:02.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:02.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:02.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:02.433 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:02.433 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:02.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:02.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:02.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:02.501 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:02.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:02.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:02.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:02.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:02.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:02.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:02.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:02.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:02.526 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:02.526 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:02.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:02.579 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 03:13:03.051 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 03:13:03.524 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 03:13:03.997 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 03:13:04.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:04.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:04.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:04.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:04.455 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:04.469 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 03:13:04.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:04.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:04.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:04.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:04.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:04.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:04.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:04.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:04.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:04.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:04.473 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9590 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9590 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9590 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9590 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9590 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9591 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:04.473 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=9592 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:09.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:09.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:09.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:09.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:09.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:09.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:09.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:09.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:09.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:09.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:09.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:13:09.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:13:09.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:13:09.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:09.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:09.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:09.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:13:09.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:09.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:13:09.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:09.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:13:09.497 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:13:09.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:09.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:09.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:09.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:13:09.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:09.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:13:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:09.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:13:09.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:13:09.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:09.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:09.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:13:09.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:09.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:13:09.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:09.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:13:09.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:13:09.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:13:09.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:13:09.504 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:13:09.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:13:09.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:13:09.505 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:13:09.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:09.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:09.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:13:09.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:13:10.019 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:13:10.019 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:13:10.020 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:13:10.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:10.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:10.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:10.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:10.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:10.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:10.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:10.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:10.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:10.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:10.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:10.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:10.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.231 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:10.231 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:13:10.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.312 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:10.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:10.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:10.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:10.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:10.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:10.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:10.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:10.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:13:10.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:10.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:10.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:10.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:10.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:10.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:10.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:10.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:10.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:10.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.700 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:10.701 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:10.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:10.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:10.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:10.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:10.779 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:10.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:10.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:10.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:10.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:10.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:10.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:10.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:10.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:10.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:10.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:10.795 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:13:10.795 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:10.795 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:10.795 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:10.795 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:10.795 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:10.795 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:15.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:15.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:15.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:15.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:15.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:15.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:15.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:15.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:15.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:15.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:15.810 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:13:15.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:13:15.818 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:13:15.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:15.818 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:15.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:15.819 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:13:15.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:15.819 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:13:15.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:15.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:13:15.825 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:13:15.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:15.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:15.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:15.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:13:15.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:15.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:13:15.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:15.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:13:15.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:13:15.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:15.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:15.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:15.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:13:15.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:15.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:13:15.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:13:15.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:13:15.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:13:15.834 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:13:15.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:15.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:15.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:15.839 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:13:16.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:13:16.349 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:13:16.350 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:13:16.350 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:13:16.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:16.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:16.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:16.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:16.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:16.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:16.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:16.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:16.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:16.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:16.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:16.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:13:16.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:16.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:16.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:16.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:16.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:16.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:16.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:16.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:16.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:16.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:16.828 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:16.828 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:13:16.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:16.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:16.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:16.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:16.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:17.260 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:13:17.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:17.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:17.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:17.524 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:17.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:17.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:17.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:17.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:17.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:17.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:17.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:17.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:17.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:17.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:17.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:17.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:17.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:17.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:17.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:17.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:17.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:17.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:17.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:17.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:17.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:17.730 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:17.730 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:17.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:17.730 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:13:17.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:17.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:17.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:18.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:18.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:18.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:18.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:18.124 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:18.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:18.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:18.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:18.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:18.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:18.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:18.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:18.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:18.136 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:13:18.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:18.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:23.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:23.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:23.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:23.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:23.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:23.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:23.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:23.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:23.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:23.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:23.152 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:13:23.155 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:13:23.156 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:13:23.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:23.156 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:23.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:23.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:13:23.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:23.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:13:23.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:23.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:13:23.160 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:13:23.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:23.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:23.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:23.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:13:23.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:23.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:13:23.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:23.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:13:23.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:13:23.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:23.163 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:23.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:23.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:13:23.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:23.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:13:23.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:23.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:13:23.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:13:23.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:13:23.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:13:23.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:13:23.167 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:13:23.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:23.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:23.172 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:13:23.649 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:13:23.682 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:13:23.683 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:13:23.684 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:13:23.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:23.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:23.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:23.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:23.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:23.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:23.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:23.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:23.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:23.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:23.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:23.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:23.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:23.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:23.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:23.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:23.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:23.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:23.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:23.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:23.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:23.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:23.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:23.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:23.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:23.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:23.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:23.988 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:23.988 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:13:23.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:23.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.122 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:13:24.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:24.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:24.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:24.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:24.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:24.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:24.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:24.269 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:24.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:24.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:24.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:24.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:24.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:24.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:24.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:24.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:24.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:24.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:24.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:24.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:24.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:24.593 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:13:24.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:24.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:24.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:24.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:24.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:24.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:24.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:24.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:24.647 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:24.648 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:24.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:24.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:25.064 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:13:25.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:25.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:25.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:25.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:25.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:25.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:25.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:25.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:25.455 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:25.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:25.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:25.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:25.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:25.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:25.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:25.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:25.465 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:13:25.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:25.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:25.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:25.465 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:25.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:25.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:25.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:25.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:25.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:25.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:30.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:30.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:30.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:30.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:30.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:30.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:30.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:30.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:30.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:30.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:30.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:13:30.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:13:30.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:13:30.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:30.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:30.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:30.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:13:30.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:30.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:13:30.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:30.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:13:30.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:13:30.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:30.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:30.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:30.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:13:30.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:30.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:13:30.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:30.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:13:30.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:13:30.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:30.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:30.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:30.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:13:30.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:30.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:13:30.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:13:30.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:13:30.503 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:13:30.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:30.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:13:30.985 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:13:31.019 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:13:31.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.021 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:13:31.022 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:13:31.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:31.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:31.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:31.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:31.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:31.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:31.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:31.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:31.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:31.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:31.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:31.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:31.324 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:13:31.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.457 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:13:31.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:31.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:31.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:31.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:31.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.605 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:31.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:31.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:31.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:31.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:31.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:31.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:31.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:31.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.929 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:13:31.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:31.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:31.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:31.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:31.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:31.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:31.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:31.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:31.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:31.983 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:31.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:31.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:32.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:13:32.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:32.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:32.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:32.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:32.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:32.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:32.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:32.792 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:32.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:32.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:32.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:32.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:32.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:32.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:32.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:32.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:32.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:32.802 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:13:32.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:32.802 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:32.802 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:13:37.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:13:37.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:13:37.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:37.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:37.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:37.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:37.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:13:37.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:37.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:37.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:13:37.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:13:37.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:13:37.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:13:37.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:37.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:37.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:13:37.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:13:37.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:13:37.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:13:37.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:37.831 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:13:37.831 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:13:37.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:37.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:37.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:13:37.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:13:37.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:13:37.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:13:37.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:37.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:13:37.835 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:13:37.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:37.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:13:37.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:13:37.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:13:37.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:13:37.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:13:37.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:13:37.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:13:37.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:13:37.839 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:13:37.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:13:37.843 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:13:38.319 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:13:38.356 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:13:38.356 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:13:38.358 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:13:38.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:38.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:38.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:38.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:38.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:38.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:38.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:38.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:38.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:38.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:38.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:38.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:38.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:38.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:38.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:13:38.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:38.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:38.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:38.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:39.263 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:13:39.734 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:13:39.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:39.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:39.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:39.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:13:40.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:40.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:40.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:40.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:40.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:40.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:40.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:40.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:40.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:40.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:40.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:40.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:40.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:40.304 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:40.304 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:13:40.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:40.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:40.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:13:40.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:40.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:40.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:40.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:41.152 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:13:41.627 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:13:41.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:41.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:41.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:41.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:42.101 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:13:42.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:42.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:42.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:42.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:42.431 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:13:42.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:42.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:42.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:42.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:42.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:42.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:42.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:42.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:42.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:42.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:42.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:42.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:42.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:42.573 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:13:42.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:13:42.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:13:42.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:13:42.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:13:43.046 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:13:43.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:13:43.989 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:13:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:44.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:44.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:44.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:44.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:13:44.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:13:44.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:13:44.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:44.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:13:44.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:13:44.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:13:44.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:13:44.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:13:44.090 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:13:44.090 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:13:44.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:44.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:13:44.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:13:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:13:45.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:13:45.879 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:13:46.353 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:13:46.825 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:13:47.298 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:13:47.771 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:13:48.243 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:13:48.715 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:13:49.188 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:13:49.661 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:13:50.134 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:13:50.606 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:13:51.079 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:13:51.550 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:13:52.023 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:13:52.496 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:13:52.968 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:13:53.441 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:13:53.914 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:13:54.387 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:13:54.861 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:13:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:13:55.807 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:13:56.280 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:13:56.753 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:13:57.226 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:13:57.699 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:13:58.171 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:13:58.645 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:13:59.118 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:13:59.590 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:14:00.063 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:14:00.536 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:14:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:14:01.481 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:14:01.954 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:14:02.427 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:14:02.901 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:14:03.374 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:14:03.847 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:14:04.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:04.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:04.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:04.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:04.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:04.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:04.057 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:04.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:14:04.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:14:04.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:14:04.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:14:04.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:14:04.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:14:04.058 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5656 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5656 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5656 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5656 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:04.058 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:09.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:14:09.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:14:09.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:14:09.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:14:09.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:14:09.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:14:09.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:14:09.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:14:09.077 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:09.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:14:09.077 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:14:09.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:14:09.084 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:14:09.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:14:09.084 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:09.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:14:09.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:14:09.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:14:09.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:14:09.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:09.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:14:09.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:14:09.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:14:09.089 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:09.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:14:09.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:14:09.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:14:09.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:14:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:09.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:14:09.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:14:09.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:14:09.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:09.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:14:09.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:14:09.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:14:09.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:14:09.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:09.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:14:09.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:14:09.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:14:09.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:14:09.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:14:09.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:14:09.097 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:14:09.097 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:14:09.097 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:09.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:14:09.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:14:09.613 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:14:09.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:09.616 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:14:09.616 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:14:09.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:09.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:09.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:09.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:09.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:09.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:09.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:09.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:09.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:09.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:09.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:09.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:09.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:10.050 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:14:10.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:10.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:10.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:10.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:10.522 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:14:10.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:14:11.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:11.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:11.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:11.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:11.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:14:11.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:11.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:11.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:11.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:11.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:11.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:11.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:11.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:11.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:11.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:11.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:11.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:11.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:11.564 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:11.564 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:14:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:11.932 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:14:12.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:12.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:12.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:12.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:12.406 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:14:12.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:14:13.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:13.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:13.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:13.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:13.352 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:14:13.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:13.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:13.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:13.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:13.682 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:13.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:13.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:13.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:13.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:13.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:13.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:13.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:13.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:13.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:13.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:13.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:13.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:13.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:13.823 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:14:14.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:14.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:14.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:14.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:14.296 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:14:14.767 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:14:15.240 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:14:15.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:15.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:15.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:15.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:15.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:15.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:15.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:15.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:15.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:15.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:15.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:15.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:15.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:15.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:15.338 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:14:15.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:15.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:15.710 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:14:16.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:14:16.656 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:14:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:14:17.600 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:14:18.073 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:14:18.546 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:14:19.019 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:14:19.492 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:14:19.964 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:14:20.437 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:14:20.910 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:14:21.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:14:21.856 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:14:22.328 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:14:22.801 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:14:23.275 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:14:23.748 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:14:24.221 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:14:24.694 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:14:25.167 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:14:25.640 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:14:26.112 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:14:26.585 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:14:27.059 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:14:27.531 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:14:28.003 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:14:28.477 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:14:28.950 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:14:29.422 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:14:29.896 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:14:30.368 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:14:30.841 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:14:31.315 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:14:31.787 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:14:32.260 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:14:32.733 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:14:33.204 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:14:33.676 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:14:34.149 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:14:34.623 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:14:35.096 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:14:35.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:35.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:35.301 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:35.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:35.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:35.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:35.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:35.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:14:35.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:14:35.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:14:35.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:14:35.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:14:35.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:14:35.305 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:14:35.305 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:35.305 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:35.305 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:35.305 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5657 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:14:40.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:14:40.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:14:40.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:14:40.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:14:40.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:14:40.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:14:40.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:14:40.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:14:40.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:40.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:14:40.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:14:40.327 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:14:40.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:14:40.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:14:40.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:14:40.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:14:40.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:14:40.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:14:40.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:40.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:14:40.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:14:40.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:14:40.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:40.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:14:40.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:14:40.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:14:40.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:14:40.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:40.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:14:40.336 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:14:40.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:14:40.336 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:14:40.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:14:40.336 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:14:40.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:14:40.336 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:14:40.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:40.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:14:40.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:14:40.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:14:40.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:14:40.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:14:40.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:14:40.340 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:14:40.340 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:14:40.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:14:40.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:14:40.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:14:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:14:40.345 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:14:40.823 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:14:40.854 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:14:40.855 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:14:40.855 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:14:40.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:40.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:40.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:40.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:40.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:40.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:40.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:40.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:40.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:40.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:40.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:40.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:40.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:40.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:41.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:41.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:41.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:41.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:41.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:41.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:41.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:41.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:41.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:41.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:41.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:41.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:41.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:41.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:41.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:41.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:41.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:41.293 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:14:41.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:41.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:41.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:41.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:41.767 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:14:42.239 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:14:42.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:42.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:42.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:42.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:42.710 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:14:43.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:14:43.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:43.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:43.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:43.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:43.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:43.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:43.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:43.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:43.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:43.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:43.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:43.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:43.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:43.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:43.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:43.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:43.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:43.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:43.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:43.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:43.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:43.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:43.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:43.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:43.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:43.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:43.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:43.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:43.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:43.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:43.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:43.651 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:14:44.125 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:14:44.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:44.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:44.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:44.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:44.597 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:14:45.065 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:14:45.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:14:45.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:14:45.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:14:45.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:14:45.536 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:14:45.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:45.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:45.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:45.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:45.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:45.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:45.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:45.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:45.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:45.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:45.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:45.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:45.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:45.682 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:45.682 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:14:45.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:45.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:45.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:45.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:45.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:45.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:45.950 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:45.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:45.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:45.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:45.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:45.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:45.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:45.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:45.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:46.007 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:14:46.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:46.016 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:46.016 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:14:46.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:46.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:46.480 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:14:46.952 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:14:47.425 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:14:47.899 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:14:48.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:48.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:48.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:48.277 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:48.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:48.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:48.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:48.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:48.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:48.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:48.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:48.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:48.317 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:48.317 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:14:48.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.370 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:14:48.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:48.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:48.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:48.602 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:48.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:48.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:48.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:48.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:48.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:48.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:48.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:48.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:48.662 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:48.662 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:14:48.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:48.842 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:14:49.315 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:14:49.788 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:14:50.261 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:14:50.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:50.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:50.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:50.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:50.689 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:50.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:50.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:50.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:50.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:50.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:50.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:50.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:50.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:50.733 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:14:50.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:50.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:50.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:50.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:50.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:51.205 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:14:51.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:51.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:51.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:51.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:51.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:51.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:51.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:51.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:51.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:51.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:51.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:51.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:51.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:51.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:51.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:51.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:51.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:51.678 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:14:52.149 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:14:52.620 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:14:53.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:53.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:53.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:53.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:53.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:53.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:53.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:53.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:53.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:53.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:53.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:53.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:53.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:53.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.093 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:14:53.565 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:14:53.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:53.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:53.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:53.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:53.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:53.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:53.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:53.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:53.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:53.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:53.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:53.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:53.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:53.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:53.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:54.037 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:14:54.508 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:14:54.982 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:14:55.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:55.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:55.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:55.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:55.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:55.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:55.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:55.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:55.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:55.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:55.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:55.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:55.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:55.454 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:14:55.454 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:55.454 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:14:55.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:55.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:55.926 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:14:56.399 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:14:56.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:56.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:56.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:56.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:56.718 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:14:56.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:14:56.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:14:56.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:14:56.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:56.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:14:56.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:14:56.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:14:56.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:14:56.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:14:56.775 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:14:56.775 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:14:56.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:56.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:14:56.872 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:14:57.344 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:14:57.818 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:14:58.291 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:14:58.764 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:14:59.237 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:14:59.709 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:15:00.183 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:15:00.655 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:15:01.127 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:15:01.601 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:15:02.073 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:15:02.547 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:15:03.019 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:15:03.491 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:15:03.965 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:15:04.437 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:15:04.910 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:15:05.384 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:15:05.857 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:15:06.330 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:15:06.803 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:15:07.275 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:15:07.748 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:15:08.222 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:15:08.695 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:15:09.166 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:15:09.639 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:15:10.112 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:15:10.586 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:15:11.059 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:15:11.531 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:15:12.003 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:15:12.477 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:15:12.949 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:15:13.422 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:15:13.895 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:15:14.368 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:15:14.842 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:15:15.315 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:15:15.787 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:15:16.260 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:15:16.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:16.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:16.729 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:16.732 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:15:16.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:16.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:16.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:16.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:16.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:16.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:16.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:16.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:16.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:16.735 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:15:16.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:21.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:21.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:21.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:21.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:21.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:21.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:21.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:21.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:21.750 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:21.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:21.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:15:21.756 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:15:21.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:15:21.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:21.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:21.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:21.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:15:21.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:21.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:15:21.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:21.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:15:21.761 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:15:21.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:21.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:21.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:21.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:15:21.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:21.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:15:21.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:21.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:15:21.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:15:21.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:21.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:21.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:21.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:15:21.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:21.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:15:21.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:15:21.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:15:21.770 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:15:21.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:21.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:21.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:15:22.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:15:22.285 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:15:22.286 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:15:22.287 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:15:22.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:22.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:22.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:22.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:22.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:22.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:22.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:22.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:22.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:22.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.636 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:22.636 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:22.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.719 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:15:22.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.730 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:22.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:22.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:22.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:22.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.766 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:22.766 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:22.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:22.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:22.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:22.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.849 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:22.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:22.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:22.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:22.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:22.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:22.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:22.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:22.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:22.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:22.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:23.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:23.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:23.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:23.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:23.190 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:15:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:23.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:23.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:23.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:23.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:23.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:23.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:23.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.372 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:23.372 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:23.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.512 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:23.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:23.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:23.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:23.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:23.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:23.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.570 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:23.571 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:23.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:15:23.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:23.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:23.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:23.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:23.748 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:23.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:23.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:23.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:23.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:23.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:23.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:23.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:23.769 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:15:23.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.769 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=432 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:23.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=433 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:28.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:28.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:28.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:28.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:28.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:28.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:28.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:28.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:28.781 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:28.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:28.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:15:28.785 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:15:28.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:15:28.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:28.786 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:28.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:28.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:15:28.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:28.787 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:15:28.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:28.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:15:28.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:15:28.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:28.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:28.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:28.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:15:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:28.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:15:28.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:28.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:15:28.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:15:28.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:28.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:28.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:28.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:15:28.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:28.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:15:28.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.798 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:15:28.798 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:15:28.798 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:15:28.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:28.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:15:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:15:29.314 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:15:29.315 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:15:29.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:29.316 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:15:29.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:29.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:29.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:29.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:29.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:29.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:29.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:29.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:29.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:29.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:29.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:29.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:29.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:29.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:15:29.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:29.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:29.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:29.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:30.226 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:15:30.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:30.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:30.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:30.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:30.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:30.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:30.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:30.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:30.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:30.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:30.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:30.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:30.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:30.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:15:30.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:30.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:30.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:30.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:30.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:30.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:30.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:30.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:30.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:30.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:30.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:30.797 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:30.797 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:30.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:30.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:30.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:30.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:30.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:31.170 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:15:31.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:31.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:31.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:31.446 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:31.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:31.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:31.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:31.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:31.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:31.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:31.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:31.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:31.505 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:31.505 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:31.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.642 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:15:31.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:31.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:31.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:31.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:31.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:31.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:31.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:31.935 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:31.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:31.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:31.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:31.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:31.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:31.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:31.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:31.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:31.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:31.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:31.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:31.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:32.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:32.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:32.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:32.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:32.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:32.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:32.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:32.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:32.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:32.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:32.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:32.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:32.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:15:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:32.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:32.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:32.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:32.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:32.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:32.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:32.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:32.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:32.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:32.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:32.582 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:32.582 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:32.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.586 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:15:32.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:32.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:32.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:32.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:32.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:32.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:32.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:32.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:32.982 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:33.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:33.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:33.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:33.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:33.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:33.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:33.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:33.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:33.056 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:15:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:33.068 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:33.068 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:33.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:33.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:33.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:33.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:33.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:33.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:33.452 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:33.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:33.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:33.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:33.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:33.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:33.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:33.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:33.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:33.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:33.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:33.462 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:15:33.462 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:33.462 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:33.462 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:33.462 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:33.462 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:33.462 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:38.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:38.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:38.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:38.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:38.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:38.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:38.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:38.479 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:38.479 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:38.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:38.480 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:15:38.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:15:38.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:15:38.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:38.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:38.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:38.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:15:38.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:38.488 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:15:38.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:38.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:15:38.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:15:38.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:38.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:38.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:38.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:15:38.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:38.492 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:15:38.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:38.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:15:38.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:15:38.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:38.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:38.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:38.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:15:38.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:38.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:15:38.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:15:38.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:15:38.499 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:15:38.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:38.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:38.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:15:38.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:15:39.014 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:15:39.015 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:15:39.016 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:15:39.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.316 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:39.316 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:39.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.405 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:39.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.454 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:15:39.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.457 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:39.457 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:39.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:39.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:39.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:39.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:39.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.525 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:39.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.925 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:15:39.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:39.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:39.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:39.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:39.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:39.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:39.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:39.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:39.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:39.983 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:39.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:39.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:40.397 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:15:40.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:40.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:40.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:40.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:40.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:40.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:40.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:40.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:40.553 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:40.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:40.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:40.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:40.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:40.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:40.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:40.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:40.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:40.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:40.578 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:40.578 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:40.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:40.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:40.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:40.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:40.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:40.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:40.788 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:40.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:40.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:40.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:40.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:40.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:40.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:40.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:40.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:40.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:40.803 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:15:40.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:40.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.804 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:40.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:45.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:45.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:45.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:45.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:45.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:45.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:45.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:45.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:45.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:45.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:15:45.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:15:45.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:15:45.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:15:45.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:45.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:45.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:45.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:15:45.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:15:45.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:15:45.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:45.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:15:45.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:15:45.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:45.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:45.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:15:45.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:15:45.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:15:45.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:45.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:15:45.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:15:45.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:45.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:15:45.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:45.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:15:45.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:15:45.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:15:45.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:45.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:15:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:15:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:15:45.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:15:45.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:15:45.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:15:45.844 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:15:45.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:15:45.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:15:45.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:15:45.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:15:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:15:46.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:15:46.359 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:15:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:46.361 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:15:46.363 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:15:46.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:46.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:46.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:46.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:46.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:46.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:46.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:46.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:46.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:46.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:46.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:46.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:46.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:46.798 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:15:46.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:46.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:46.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:46.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:47.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:15:47.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:47.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:47.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:47.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:47.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:47.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:47.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:47.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:47.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:47.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:47.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:47.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:47.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:47.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:47.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:47.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:47.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:47.743 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:15:47.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:47.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:47.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:47.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:48.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:15:48.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:48.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:48.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:48.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:48.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:48.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:48.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:48.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:48.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:48.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:48.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:48.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:48.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:48.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:48.316 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:48.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:48.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:48.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:15:48.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:48.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:48.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:48.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:49.161 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:15:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:49.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:49.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:49.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:49.462 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:49.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:49.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:49.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:49.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:49.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:49.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:49.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:49.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:49.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:49.542 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:49.542 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:15:49.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:49.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:49.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:15:49.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:50.106 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:15:50.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:50.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:50.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:50.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:50.429 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:50.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:50.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:50.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:50.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:50.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:50.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:50.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:50.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:50.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:50.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:50.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:50.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:50.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:50.577 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:15:50.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:50.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:51.049 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:15:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:51.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:51.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:51.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:51.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:51.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:51.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:51.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:51.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:51.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:51.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:51.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:51.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:51.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:51.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:51.521 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:15:51.992 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:15:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:52.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:52.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:52.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:52.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:52.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:52.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:52.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:52.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:52.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:52.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:52.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:52.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:52.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:52.091 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:52.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:52.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:52.463 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:15:52.935 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:15:53.408 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:15:53.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:53.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:53.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:53.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:53.868 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:53.881 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:15:53.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:53.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:53.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:15:53.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:53.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:15:53.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:15:53.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:15:53.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:15:53.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:53.935 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:15:53.936 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:15:53.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:53.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:15:54.826 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:15:55.299 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:15:55.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:15:55.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:15:55.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:15:55.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:15:55.759 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:15:55.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:15:55.773 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:15:55.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:15:55.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:15:55.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:15:55.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:15:55.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:15:55.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:15:55.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:15:55.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:15:55.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:15:55.780 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.781 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:15:55.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:00.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:00.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:00.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:00.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:00.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:00.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:00.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:00.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:00.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:00.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:00.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:00.802 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:00.802 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:00.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:00.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:00.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:00.804 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:00.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:00.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:00.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:00.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:00.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:00.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:00.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:00.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:00.809 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:00.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:00.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:00.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:00.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:00.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:00.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:00.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:00.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:00.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:00.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:00.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:00.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:00.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:00.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:00.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:00.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:00.817 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:00.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:00.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:00.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:01.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:01.338 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:01.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.341 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:01.344 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:01.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:01.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:01.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:01.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:01.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:01.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:01.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:01.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:01.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:01.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:01.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:01.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:01.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:01.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:01.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:01.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:01.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:01.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:01.590 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:01.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:01.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:01.764 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:01.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:01.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:01.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:01.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:01.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:01.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:01.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:01.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:01.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:01.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:01.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:01.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:01.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:01.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:01.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:01.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:01.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:02.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:02.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:02.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:02.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:02.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:02.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:02.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:02.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:02.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:02.052 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:02.052 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:02.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:02.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:02.240 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:02.713 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:02.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:02.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:02.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:02.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:02.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:02.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:02.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:02.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:02.873 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:02.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:02.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:02.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:02.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:02.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:02.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:02.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:02.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:02.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:02.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:02.883 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:02.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:02.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:02.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:02.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:02.883 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:02.884 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:07.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:07.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:07.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:07.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:07.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:07.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:07.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:07.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:07.899 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:07.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:07.900 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:07.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:07.903 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:07.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:07.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:07.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:07.904 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:07.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:07.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:07.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:07.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:07.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:07.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:07.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:07.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:07.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:07.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:07.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:07.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:07.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:07.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:07.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:07.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:07.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:07.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:07.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:07.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:07.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:07.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:07.914 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:07.915 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:07.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:07.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:07.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:08.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:08.431 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:08.432 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:08.433 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:08.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:08.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:08.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:08.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:08.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:08.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:08.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:08.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:08.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:08.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:08.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:08.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:08.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:08.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:08.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:08.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:08.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:08.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:08.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:08.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:08.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:08.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:08.689 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:08.689 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:08.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:08.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:08.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:08.860 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:08.869 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:08.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:08.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:08.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:08.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:08.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:08.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:08.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:08.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:08.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:08.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:08.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:08.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:08.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:08.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:08.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:08.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:09.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:09.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:09.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:09.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:09.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:09.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:09.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:09.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:09.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:09.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:09.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:09.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:09.157 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:09.157 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:09.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:09.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:09.340 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:09.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:09.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:09.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:09.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:09.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:09.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:09.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:09.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:09.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:09.975 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:09.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:09.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:09.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:09.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:09.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:09.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:09.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:09.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:09.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:09.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:09.988 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:09.988 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:09.988 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:09.988 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:09.988 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:09.988 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:14.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:14.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:14.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:14.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:14.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:14.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:15.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:15.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:15.010 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:15.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:15.010 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:15.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:15.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:15.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:15.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:15.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:15.016 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:15.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:15.016 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:15.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:15.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:15.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:15.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:15.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:15.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:15.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:15.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:15.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:15.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:15.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:15.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:15.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:15.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:15.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:15.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:15.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:15.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:15.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:15.031 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:15.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:15.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:15.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:15.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:15.549 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:15.550 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:15.551 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:15.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:15.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:15.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:15.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:15.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:15.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:15.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:15.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:15.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:15.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:15.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:15.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:15.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:15.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:15.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:15.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:15.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:15.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:15.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:15.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:15.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:15.807 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:15.807 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:15.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:15.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:15.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:15.979 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:15.983 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:15.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:15.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:15.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:15.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:15.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:15.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:15.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:15.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:16.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:16.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:16.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:16.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:16.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:16.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:16.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:16.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:16.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:16.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:16.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:16.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:16.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:16.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:16.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:16.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:16.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:16.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:16.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:16.272 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:16.272 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:16.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:16.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:16.456 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:16.929 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:17.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:17.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:17.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:17.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:17.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:17.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:17.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:17.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:17.086 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:17.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:17.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:17.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:17.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:17.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:17.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:17.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:17.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:17.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:17.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:17.100 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:17.100 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:17.100 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:17.100 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:17.100 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:17.100 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:17.100 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:22.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:22.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:22.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:22.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:22.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:22.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:22.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:22.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:22.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:22.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:22.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:22.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:22.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:22.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:22.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:22.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:22.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:22.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:22.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:22.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:22.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:22.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:22.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:22.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:22.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:22.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:22.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:22.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:22.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:22.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:22.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:22.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:22.129 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:22.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:22.129 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:22.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:22.130 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:22.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:22.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:22.134 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:22.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:22.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:22.615 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:22.648 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:22.649 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:22.650 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:22.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:22.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:22.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:22.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:22.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:22.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:22.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:22.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:22.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:22.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:22.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:22.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:22.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:22.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:22.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:22.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:22.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:22.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:22.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:22.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:22.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:22.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:22.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:22.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:22.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:22.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:22.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:22.908 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:22.909 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:22.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:22.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:23.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:23.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:23.080 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:23.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:23.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:23.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:23.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:23.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:23.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:23.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:23.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:23.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:23.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:23.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:23.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:23.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:23.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:23.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:23.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:23.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:23.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:23.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:23.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:23.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:23.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:23.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:23.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:23.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:23.370 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:23.370 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:23.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:23.554 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:24.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:24.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:24.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:24.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:24.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:24.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:24.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:24.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:24.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:24.184 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:24.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:24.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:24.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:24.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:24.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:24.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:24.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:24.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:24.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:24.205 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:24.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:24.206 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.206 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.206 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.206 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.206 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.207 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=448 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=449 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=449 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=449 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=449 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:24.208 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=449 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:29.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:29.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:29.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:29.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:29.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:29.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:29.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:29.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:29.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:29.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:29.215 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:29.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:29.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:29.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:29.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:29.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:29.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:29.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:29.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:29.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:29.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:29.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:29.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:29.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:29.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:29.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:29.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:29.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:29.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:29.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:29.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:29.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:29.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:29.229 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:29.229 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:29.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:29.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:29.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:29.711 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:29.744 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:29.745 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:29.746 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:29.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:29.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:29.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:29.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:29.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:29.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:29.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:29.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:29.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:29.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:29.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:29.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:29.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:29.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:30.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:30.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:30.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:30.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:30.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:30.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:30.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:30.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:30.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:30.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:30.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:30.195 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:30.196 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:30.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:30.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:30.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:30.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:30.654 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:30.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:30.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:30.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:30.716 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:30.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:30.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:30.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:30.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:30.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:30.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:30.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:30.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:30.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:30.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:30.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:30.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:31.127 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:31.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:31.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:31.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:16:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:31.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:31.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:31.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:31.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:31.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:31.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:31.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:31.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:31.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:31.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:31.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:31.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:31.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:31.779 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:31.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:31.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:32.068 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:16:32.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:32.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:32.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:32.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:32.540 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:16:33.013 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:16:33.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:33.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:33.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:33.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:33.486 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:16:33.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:33.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:33.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:33.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:33.809 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:33.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:33.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:33.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:33.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:33.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:33.816 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:33.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:33.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:33.816 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:38.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:38.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:38.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:38.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:38.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:38.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:38.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:38.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:38.834 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:38.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:38.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:38.839 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:38.839 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:38.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:38.840 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:38.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:38.840 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:38.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:38.841 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:38.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:38.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:38.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:38.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:38.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:38.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:38.844 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:38.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:38.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:38.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:38.846 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:38.846 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:38.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:38.846 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:38.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:38.846 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:38.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:38.847 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:38.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:38.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:38.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:38.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:38.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:38.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:38.850 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:38.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:38.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:39.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:39.366 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:39.367 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:39.369 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:39.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:39.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:39.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:39.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:39.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:39.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:39.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:39.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:39.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:39.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:39.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:39.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:39.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:39.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:39.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:39.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:39.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:39.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:39.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:39.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:39.801 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:39.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:39.811 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:39.811 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:39.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:39.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:39.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:39.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:39.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:40.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:40.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:40.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:40.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:40.334 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:40.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:40.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:40.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:40.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:40.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:40.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:40.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:40.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:40.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:40.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:40.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:40.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:40.746 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:40.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:40.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:40.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:40.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:41.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:16:41.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:41.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:41.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:41.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:41.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:41.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:41.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:41.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:41.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:41.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:41.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:41.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:41.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:41.402 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:41.402 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:41.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:41.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:41.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:16:41.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:41.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:41.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:41.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:42.162 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:16:42.633 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:16:42.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:42.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:42.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:42.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:43.106 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:16:43.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:43.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:43.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:43.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:43.427 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:43.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:43.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:43.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:43.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:43.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:43.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:43.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:43.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:43.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:43.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:43.442 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:43.443 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:16:48.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:48.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:48.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:48.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:48.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:48.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:48.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:48.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:48.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:48.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:48.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:48.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:48.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:48.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:48.467 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:48.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:48.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:48.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:48.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:48.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:48.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:48.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:48.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:48.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:48.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:48.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:48.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:48.473 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:48.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:48.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:48.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:48.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:48.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:48.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:48.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:48.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:48.475 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:48.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:48.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:48.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:48.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:48.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:48.478 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:48.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:48.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:48.479 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:48.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:48.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:48.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:48.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:48.994 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:48.995 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:48.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:48.996 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:49.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:49.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:49.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:49.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:49.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:49.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:49.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:49.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:49.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:49.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:49.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:49.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:49.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:49.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:49.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:49.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:49.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:49.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:49.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:49.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:49.435 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:49.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:49.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:49.442 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:49.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:49.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:49.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:49.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:49.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:49.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:49.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:49.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:49.923 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:49.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:49.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:49.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:49.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:49.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:49.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:49.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:49.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:49.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:49.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:49.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:49.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:50.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:16:50.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:50.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:50.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:50.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:50.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:16:51.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:51.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:51.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:51.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:51.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:51.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:51.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:51.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:51.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:51.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:51.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:51.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:51.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:51.038 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:51.038 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:16:51.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:51.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:51.324 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:16:51.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:51.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:16:52.269 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:16:52.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:52.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:52.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:52.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:52.742 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:16:53.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:53.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:53.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:53.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:53.063 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:53.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:53.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:53.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:53.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:53.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:53.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:53.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:53.075 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:16:58.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:16:58.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:16:58.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:58.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:58.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:58.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:58.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:16:58.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:58.093 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:58.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:16:58.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:16:58.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:16:58.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:16:58.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:58.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:58.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:16:58.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:16:58.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:16:58.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:16:58.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:58.103 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:16:58.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:16:58.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:58.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:58.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:16:58.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:16:58.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:16:58.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:16:58.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:58.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:16:58.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:16:58.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:58.110 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:16:58.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:16:58.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:16:58.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:16:58.110 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:16:58.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:16:58.111 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:16:58.111 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:16:58.111 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:16:58.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:16:58.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:16:58.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:16:58.116 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:16:58.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:16:58.628 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:16:58.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:58.630 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:16:58.632 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:16:58.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:58.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:58.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:58.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:58.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:58.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:58.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:58.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:58.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:58.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:58.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:58.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:58.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:59.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:59.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:59.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:59.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:59.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:59.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:59.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:59.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:59.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:59.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:16:59.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:59.073 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:16:59.074 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:16:59.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:16:59.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:16:59.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:16:59.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:16:59.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:16:59.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:59.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:59.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:59.555 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:16:59.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:16:59.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:16:59.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:16:59.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:59.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:59.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:16:59.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:16:59.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:16:59.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:16:59.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:16:59.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:16:59.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:00.008 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:17:00.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:00.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:00.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:00.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:00.479 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:17:00.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:00.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:00.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:00.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:00.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:00.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:00.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:00.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:00.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:00.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:00.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:00.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:00.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:00.664 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:00.664 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:00.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:17:01.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:01.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:01.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:01.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:01.416 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:17:01.887 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:17:02.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:02.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:02.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:17:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:02.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:02.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:02.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:02.679 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:02.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:02.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:02.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:02.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:02.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:02.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:02.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:02.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:02.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:02.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:02.686 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:02.686 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:02.686 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:07.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:07.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:07.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:07.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:07.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:07.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:07.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:07.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:07.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:07.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:07.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:07.707 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:07.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:07.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:07.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:07.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:07.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:07.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:07.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:07.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:07.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:07.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:07.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:07.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:07.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:07.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:07.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:07.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:07.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:07.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:07.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:07.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:07.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:07.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:07.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:07.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:07.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:07.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:07.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:07.721 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:07.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:07.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:17:08.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:17:08.237 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:17:08.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:08.239 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:17:08.241 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:17:08.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:08.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:08.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:08.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:08.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:08.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:08.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:08.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:08.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:08.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:08.287 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:08.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:08.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:08.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:08.287 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:13.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:13.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:13.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:13.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:13.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:13.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:13.303 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:13.307 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:13.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:13.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:13.308 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:13.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:13.309 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:13.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:13.309 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:13.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:13.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:13.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:13.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:13.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:13.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:13.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:13.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:13.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:13.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:13.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:13.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:13.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:13.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:13.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:13.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:13.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:13.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:13.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:13.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:13.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:13.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:13.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:13.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:13.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:13.319 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:13.319 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:13.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:17:13.802 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:17:13.834 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:17:13.835 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:17:13.836 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:17:13.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:13.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:13.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:13.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:13.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:13.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:13.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:13.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:13.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:13.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:13.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:13.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:13.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:13.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:13.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:13.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:13.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:13.946 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:13.947 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:18.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:18.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:18.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:18.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:18.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:18.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:18.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:18.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:18.964 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:18.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:18.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:18.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:18.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:18.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:18.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:18.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:18.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:18.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:18.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:18.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:18.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:18.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:18.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:18.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:18.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:18.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:18.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:18.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:18.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:18.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:18.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:18.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:18.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:18.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:18.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:18.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:18.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:18.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:18.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:18.988 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:18.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:18.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:18.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:18.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:18.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:17:19.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:17:19.502 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:17:19.503 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:17:19.504 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:17:19.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:19.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:19.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:19.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:19.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:19.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:19.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:19.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:19.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:19.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:19.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:19.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:19.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:19.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:19.561 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:24.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:24.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:24.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:24.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:24.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:24.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:24.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:24.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:24.577 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:24.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:24.578 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:24.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:24.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:24.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:24.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:24.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:24.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:24.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:24.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:24.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:24.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:24.588 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:24.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:24.588 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:24.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:24.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:24.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:24.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:24.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:24.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:24.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:24.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:24.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:24.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:24.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:24.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:24.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:24.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:24.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:24.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:24.596 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:24.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:24.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:24.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:24.598 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:29.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:29.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:29.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:29.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:29.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:29.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:29.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:29.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:29.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:29.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:29.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:29.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:29.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:29.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:29.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:29.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:29.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:29.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:29.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:29.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:29.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:29.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:29.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:29.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:29.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:29.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:29.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:29.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:29.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:29.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:29.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:29.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:29.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:29.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:29.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:29.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:29.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:29.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:29.631 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:29.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:29.632 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:29.632 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:29.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:29.637 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:17:30.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:17:30.146 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:17:30.147 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:17:30.147 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:17:30.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:30.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:30.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:30.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:30.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:30.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:30.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:30.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:30.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:30.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:30.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:30.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:30.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:30.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:30.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:17:30.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:30.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:30.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:30.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:31.059 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:17:31.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:31.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:31.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:31.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:31.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:31.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:31.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:31.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:31.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:31.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:31.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:31.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:31.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:31.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:31.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:31.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:31.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:31.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:17:31.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:31.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:31.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:31.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:32.005 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:17:32.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:32.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:32.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:32.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:32.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:32.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:32.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:32.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:32.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:32.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:32.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:32.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:32.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:32.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:32.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:32.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:32.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:32.477 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:17:32.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:32.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:32.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:32.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:32.948 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:17:33.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:33.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:33.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:33.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:33.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:33.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:33.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:33.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:33.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:33.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:33.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:33.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:33.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:33.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:33.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:33.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:33.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:33.421 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:17:33.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:33.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:33.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:33.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:33.894 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:17:34.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:34.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:34.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:34.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:34.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:34.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:34.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:34.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:34.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:34.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:34.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:34.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:34.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:34.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.366 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:17:34.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:34.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:34.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:34.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:34.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:34.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:34.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:34.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:34.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:34.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:34.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:34.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:34.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:34.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:34.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:34.749 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:34.749 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:17:34.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:34.837 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:17:35.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:35.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:35.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:35.310 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:35.310 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:17:35.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:35.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:35.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:35.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:35.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:35.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:35.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:35.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:35.361 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:35.362 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-02 03:17:35.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.783 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:17:35.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:35.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:35.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:35.917 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:35.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:35.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:35.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:35.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:35.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:35.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:35.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:35.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:35.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:35.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:35.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:35.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:35.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:36.256 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:17:36.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:36.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:36.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:36.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:36.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:36.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:36.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:36.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:36.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:36.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:36.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:36.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:36.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:36.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:36.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:36.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:36.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:17:37.200 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:17:37.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:37.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:37.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:37.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:37.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:37.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:37.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:37.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:37.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:37.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:37.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:37.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:37.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:37.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:37.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.672 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:17:37.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:37.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:37.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:37.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:37.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:37.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:37.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:37.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:37.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:37.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:37.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:37.866 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:37.866 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:17:37.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:37.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:38.145 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:17:38.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:38.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:38.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:38.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:38.457 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:38.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:38.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:38.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:38.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:38.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:38.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:38.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:38.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:38.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:38.470 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:38.470 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:17:38.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:38.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:38.617 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:17:39.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:39.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:39.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:39.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:39.062 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:39.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:39.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:39.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:39.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:39.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:39.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:39.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:39.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:39.091 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:17:39.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:39.145 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:39.145 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:39.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:39.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:39.564 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:17:40.037 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:17:40.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:40.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:40.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:40.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:40.046 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:40.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:40.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:40.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:40.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:40.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:40.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:40.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:40.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:40.089 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:40.089 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:40.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:40.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:40.510 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:17:40.982 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:17:41.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:41.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:41.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:41.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:41.007 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:41.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:41.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:41.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:41.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:41.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:41.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:41.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:41.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:41.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:41.025 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:41.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:41.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:41.456 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:17:41.928 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:17:41.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:41.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:41.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:41.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:41.977 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:41.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:41.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:41.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:41.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:41.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:41.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:42.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:42.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:42.025 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:42.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:42.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:42.399 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:17:42.873 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:17:42.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:42.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:42.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:42.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:42.942 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:42.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:42.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:42.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:42.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:42.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:42.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:42.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:42.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:42.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:42.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:42.968 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:42.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:42.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:43.346 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:17:43.819 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:17:43.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:43.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:43.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:43.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:43.906 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:43.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:43.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:43.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:43.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:43.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:43.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:43.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:43.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:43.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:43.969 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:43.969 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:43.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:43.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:44.292 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:17:44.765 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:17:44.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:44.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:44.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:44.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:44.868 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:44.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:44.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:44.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:44.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:44.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:44.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:44.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:44.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:44.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:44.905 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:44.905 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:44.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:44.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:45.237 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:17:45.709 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:17:45.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:45.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:45.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:45.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:45.834 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:45.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:45.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:45.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:45.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:45.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:45.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:45.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:45.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:45.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:45.897 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:17:45.897 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:17:45.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:45.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:46.182 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:17:46.656 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:17:46.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:46.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:46.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:46.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:46.793 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:17:46.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:46.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:46.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:46.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:46.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:46.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:46.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:46.805 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:46.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:46.805 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:51.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:51.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:51.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:51.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:51.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:51.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:51.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:51.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:51.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:51.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:51.822 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:51.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:51.828 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:51.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:51.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:51.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:51.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:51.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:51.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:51.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:51.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:51.832 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:51.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:51.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:51.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:51.833 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:51.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:51.833 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:51.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:51.835 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:51.835 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:51.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:51.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:51.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:51.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:51.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:51.836 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:51.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:51.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:51.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:51.839 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:51.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:51.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:17:52.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:17:52.354 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:17:52.355 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:17:52.356 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:17:52.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:52.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:52.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:52.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:52.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:52.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:52.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:52.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:52.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:52.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:52.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:52.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:52.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:52.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:52.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:52.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:52.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:52.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:52.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:52.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:52.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:52.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:52.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:52.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:52.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:17:52.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:52.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:52.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:52.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:52.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:52.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:52.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:52.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:52.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:52.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:52.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:52.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:52.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:52.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:52.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:52.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:52.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:52.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:53.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:53.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:53.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:53.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:53.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:53.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:53.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:17:53.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:53.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:53.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:53.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:17:53.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:17:53.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:53.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:17:53.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:17:53.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:53.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:53.263 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:17:53.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:17:53.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:17:53.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:17:53.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:17:53.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:53.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:53.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:53.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:53.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:53.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:53.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:53.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:53.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:53.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:53.448 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:17:53.448 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:17:58.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:17:58.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:17:58.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:58.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:58.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:58.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:58.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:17:58.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:58.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:58.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:17:58.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:17:58.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:17:58.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:17:58.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:58.474 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:58.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:17:58.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:17:58.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:17:58.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:17:58.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:17:58.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:17:58.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:17:58.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:58.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:58.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:17:58.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:17:58.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:17:58.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:17:58.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:17:58.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:17:58.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:17:58.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:58.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:17:58.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:17:58.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:17:58.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:17:58.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:17:58.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:17:58.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:17:58.488 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:17:58.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:17:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:17:58.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:17:59.444 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:17:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:18:00.390 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:18:00.862 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:18:01.335 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:18:01.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:18:02.280 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:18:02.754 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:18:03.226 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:18:03.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:18:04.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:18:04.643 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:18:05.116 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:18:05.588 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:18:06.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:18:06.534 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:18:07.006 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:18:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:18:07.952 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:18:08.424 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:18:08.898 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:18:09.370 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:18:09.842 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:18:10.313 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:18:10.787 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:18:11.259 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:18:11.731 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:18:12.205 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:18:12.678 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:18:13.150 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:18:13.624 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:18:14.096 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:18:14.568 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:18:15.039 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:18:15.502 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:18:15.965 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:18:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:18:16.894 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:18:17.361 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:18:17.825 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:18:18.288 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:18:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:18:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:18:19.679 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:18:20.143 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:18:20.606 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:18:21.069 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:18:21.535 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:18:22.008 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:18:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:18:22.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:18:22.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:18:22.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:18:22.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:18:22.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:18:22.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:18:22.519 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:22.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:18:27.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:18:27.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:18:27.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:18:27.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:18:27.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:18:27.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:18:27.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:18:27.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:18:27.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:18:27.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:18:27.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:18:27.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:18:27.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:18:27.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:18:27.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:18:27.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:18:27.548 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:18:27.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:18:27.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:18:27.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:18:27.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:18:27.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:18:27.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:18:27.551 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:18:27.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:18:27.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:18:27.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:18:27.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:18:27.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:18:27.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:18:27.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:18:27.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:18:27.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:18:27.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:18:27.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:18:27.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:18:27.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:18:27.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:18:27.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:18:27.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:18:27.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:18:27.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:18:27.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:18:27.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:18:27.559 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:18:27.559 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:18:27.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:18:27.564 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:18:28.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:18:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:18:28.970 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:18:29.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:18:29.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:18:30.360 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:18:30.824 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:18:31.287 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:18:31.752 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:18:32.225 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:18:32.697 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:18:33.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:18:33.641 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:18:34.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:18:34.586 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:18:35.060 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:18:35.532 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:18:36.004 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:18:36.477 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:18:36.959 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:18:37.423 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:18:37.886 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:18:38.350 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:18:38.813 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:18:39.276 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:18:39.740 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:18:40.203 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:18:40.666 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:18:41.130 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:18:41.593 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:18:42.056 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:18:42.524 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:18:42.995 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:18:43.459 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:18:43.930 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:18:44.397 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:18:44.860 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:18:45.324 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:18:45.787 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:18:46.250 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:18:46.714 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:18:47.184 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:18:47.658 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:18:48.130 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:18:48.601 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:18:49.065 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:18:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:18:49.996 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:18:50.462 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:18:50.936 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:18:51.406 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:18:51.874 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:18:52.339 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:18:52.802 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:18:53.265 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:18:53.729 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:18:54.192 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:18:54.656 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:18:55.119 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:18:55.584 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:18:56.051 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:18:56.521 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:18:56.984 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:18:57.454 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:18:57.917 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:18:58.381 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:18:58.844 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:18:59.307 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:18:59.770 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:19:00.234 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:19:00.697 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:19:01.160 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:19:01.624 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:19:02.087 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:19:02.550 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:19:03.014 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:19:03.477 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:19:03.943 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 03:19:04.417 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 03:19:04.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:04.890 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 03:19:05.359 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 03:19:05.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:05.823 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 03:19:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 03:19:06.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:06.765 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 03:19:07.238 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 03:19:07.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:07.709 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 03:19:08.172 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 03:19:08.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 03:19:09.117 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 03:19:09.590 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 03:19:09.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:09.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:19:09.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:19:09.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:19:09.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:19:09.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:19:09.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:19:09.598 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:19:14.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:19:14.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:19:14.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:19:14.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:19:14.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:19:14.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:19:14.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:19:14.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:19:14.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:14.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:19:14.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:19:14.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:19:14.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:19:14.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:19:14.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:14.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:19:14.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:19:14.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:19:14.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:19:14.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:14.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:19:14.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:19:14.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:19:14.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:14.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:19:14.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:19:14.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:19:14.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:19:14.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:14.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:19:14.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:19:14.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:19:14.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:14.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:19:14.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:19:14.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:19:14.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:19:14.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:19:14.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:19:14.636 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:19:14.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:14.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:19:15.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:19:15.153 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:19:15.154 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:15.156 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:19:15.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:15.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:15.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:15.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:15.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:15.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:15.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:15.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:15.211 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:15.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:15.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:15.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:15.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:15.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:15.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:19:15.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:15.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:15.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:15.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:16.061 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:19:16.078 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:16.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:19:16.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:16.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:16.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:16.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:17.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:19:17.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:19:17.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:17.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:17.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:17.952 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:19:18.423 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:19:18.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:18.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:18.894 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:19:19.367 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:19:19.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:19.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:19.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:19.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:19.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:19.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:19.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:19.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:19.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:19.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:19.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:19.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:19.502 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:19.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:19.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:19:19.519 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:19:19.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:19.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:19.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:19.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:19.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:19.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:19.839 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:19:20.311 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:19:20.784 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:19:21.258 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:19:21.731 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:19:22.203 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:19:22.677 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:19:23.150 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:19:23.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:23.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:23.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:23.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:23.549 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:19:23.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:23.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:23.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:23.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:23.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:23.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:23.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:23.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:23.619 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:23.622 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:19:23.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:23.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:23.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:23.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:23.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:24.055 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:24.095 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:19:24.567 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:19:25.038 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:19:25.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:19:25.984 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:19:26.456 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:19:26.927 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:19:27.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:27.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:27.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:27.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:27.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:27.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:27.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:27.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:27.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:27.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:27.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:27.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:27.393 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:27.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:27.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:19:27.396 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:19:27.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:27.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:27.400 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:19:27.873 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:19:28.345 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:19:28.734 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:28.818 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:19:29.291 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:19:29.682 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:29.763 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:19:30.152 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:30.237 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:19:30.710 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:19:31.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:31.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:31.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:31.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:31.106 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:19:31.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:31.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:31.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:31.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:31.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:19:31.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:19:31.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:19:31.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:19:31.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:19:31.128 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:19:31.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3558 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3558 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3558 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3558 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.129 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.130 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.130 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.130 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.130 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3559 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:31.130 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3560 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:19:36.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:19:36.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:19:36.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:19:36.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:19:36.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:19:36.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:19:36.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:19:36.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:19:36.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:36.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:19:36.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:19:36.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:19:36.149 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:19:36.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:19:36.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:36.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:19:36.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:19:36.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:19:36.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:19:36.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:36.154 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:19:36.154 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:19:36.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:19:36.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:36.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:19:36.155 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:19:36.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:19:36.155 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:19:36.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:36.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:19:36.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:19:36.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:19:36.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:19:36.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:19:36.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:19:36.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:19:36.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:19:36.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:19:36.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:19:36.162 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:19:36.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:19:36.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:19:36.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:19:36.678 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:19:36.679 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:36.680 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:19:36.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:36.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:36.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:36.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:36.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:36.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:36.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:36.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:36.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:36.734 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:36.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:36.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:36.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:36.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:36.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:37.119 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:19:37.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:37.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:37.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:37.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:37.591 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:19:37.606 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:37.609 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:38.063 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:19:38.086 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:38.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:38.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:38.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:38.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:38.533 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:19:38.566 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:39.007 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:19:39.046 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:39.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:39.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:39.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:39.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:39.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:19:39.532 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:39.951 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:19:40.012 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:40.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:40.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:40.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:40.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:40.423 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:19:40.492 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:40.896 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:19:40.972 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:41.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:19:41.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:19:41.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:19:41.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:19:41.369 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:19:41.459 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:41.841 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:19:41.939 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:42.315 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:19:42.419 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:42.787 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:19:42.905 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:43.260 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:19:43.385 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:43.734 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:19:43.865 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:44.206 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:19:44.351 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:44.680 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:19:44.831 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:44.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:44.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:44.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:44.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:44.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:44.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:44.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:44.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:44.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:44.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:44.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:44.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:44.858 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:44.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:44.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:19:44.861 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:19:44.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:44.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:45.152 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:19:45.552 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:45.625 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:19:46.038 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:46.098 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:19:46.518 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:46.572 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:19:47.005 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:47.045 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:19:47.485 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:47.519 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:19:47.965 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:47.990 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:19:48.450 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:48.463 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:19:48.930 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:48.936 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:19:49.409 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:19:49.410 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:19:49.896 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:50.355 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:19:50.377 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:50.827 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:19:50.863 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:51.300 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:19:51.342 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:51.773 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:19:51.823 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:52.242 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:19:52.302 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:52.715 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:19:52.783 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:52.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:52.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:52.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:52.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:52.791 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:19:52.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:19:52.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:19:52.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:19:52.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:52.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:52.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:52.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:19:52.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:19:52.850 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:19:52.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:19:52.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:19:52.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:52.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:19:53.147 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:53.188 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:19:53.623 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:53.626 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:19:53.660 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:19:54.094 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:54.131 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:19:54.565 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:54.602 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:19:55.036 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:55.075 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:19:55.507 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:55.548 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:19:55.983 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:56.020 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:19:56.454 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:56.491 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:19:56.925 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:56.962 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:19:57.396 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:57.432 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:19:57.867 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:57.906 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:19:58.337 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:58.378 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:19:58.814 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:58.850 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:19:59.285 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:59.321 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:19:59.755 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:19:59.795 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:20:00.226 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:00.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:00.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:00.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:00.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:00.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:00.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:00.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:00.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:00.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:00.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:00.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:00.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:00.258 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:00.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:00.262 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:20:00.262 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:20:00.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:00.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:00.267 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:20:00.658 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:00.739 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:20:01.128 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:01.130 [DEBUG] fake_trx.py:269 (MS@172.18.244.22:6700) Recv SETTA cmd
2026-03-02 03:20:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:20:01.599 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:01.686 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:20:02.076 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:20:02.547 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:02.632 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:20:03.017 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:03.105 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:20:03.495 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:03.578 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:20:03.966 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:04.051 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:20:04.442 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:04.524 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:20:04.913 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:04.997 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:20:05.384 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:05.471 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:20:05.862 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:20:06.332 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:06.416 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:20:06.803 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:06.889 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:20:07.279 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:20:07.750 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:07.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:07.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:07.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:07.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:07.759 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:20:07.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:07.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:07.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:07.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:07.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:07.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:07.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:07.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:07.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:07.768 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:20:07.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:12.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:12.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:12.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:12.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:12.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:12.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:12.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:12.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:12.788 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:12.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:12.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:20:12.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:20:12.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:20:12.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:12.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:12.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:12.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:20:12.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:12.800 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:20:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:12.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:20:12.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:20:12.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:12.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:12.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:12.804 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:20:12.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:12.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:20:12.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:12.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:20:12.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:20:12.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:12.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:12.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:12.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:20:12.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:12.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:20:12.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:20:12.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:20:12.812 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:20:12.812 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:12.816 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:20:13.294 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:20:13.328 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:20:13.329 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:13.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:13.330 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:20:13.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:13.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:13.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:13.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:13.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:13.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:13.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:13.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:13.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:13.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:13.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:13.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:13.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:13.767 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:20:13.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:13.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:13.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:13.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:14.236 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:20:14.708 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:20:14.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:14.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:14.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:14.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:15.181 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:20:15.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:15.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:15.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:15.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:15.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:15.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:15.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:15.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:15.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:15.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:15.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:15.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:15.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:15.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:15.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:15.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:15.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:20:15.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:15.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:15.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:15.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:16.122 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:20:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:20:16.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:16.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:17.064 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:20:17.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:20:17.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:17.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:17.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:17.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:17.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:17.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:17.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:17.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:17.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:17.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:17.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:17.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:17.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:17.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:17.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:17.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:17.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:17.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:17.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:17.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:17.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:18.010 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:20:18.481 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:20:18.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:20:19.423 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:20:19.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:19.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:19.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:19.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:19.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:19.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:19.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:19.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:19.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:19.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:19.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:19.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:19.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:19.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:19.858 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1523 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1523 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1523 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1523 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:19.858 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1524 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:24.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:24.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:24.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:24.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:24.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:24.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:24.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:24.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:24.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:24.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:24.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:20:24.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:20:24.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:20:24.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:24.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:24.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:24.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:20:24.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:24.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:20:24.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:24.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:20:24.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:20:24.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:24.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:24.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:24.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:20:24.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:24.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:20:24.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:24.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:20:24.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:20:24.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:24.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:24.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:24.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:20:24.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:24.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:20:24.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:20:24.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:20:24.896 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:20:24.896 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:20:24.896 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:24.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:24.901 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:20:25.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:20:25.411 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:20:25.412 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:25.413 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:20:25.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:25.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:25.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:25.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:25.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:25.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:25.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:25.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:25.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:25.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:25.484 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:20:25.484 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:20:25.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:25.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:25.847 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:20:25.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:25.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:25.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:25.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:26.321 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:20:26.794 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:20:26.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:26.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:26.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:26.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:27.267 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:20:27.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:27.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:27.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:27.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:27.578 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:20:27.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:27.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:27.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:27.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:27.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:27.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:27.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:27.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:27.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:27.650 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:20:27.650 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:20:27.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:27.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:27.739 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:20:27.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:27.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:27.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:27.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:28.211 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:20:28.685 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:20:28.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:28.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:28.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:28.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:29.158 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:20:29.631 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:20:29.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:29.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:29.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:29.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:29.753 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:20:29.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:29.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:29.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:29.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:29.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:29.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:29.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:29.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:29.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:29.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:29.764 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:20:29.764 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:29.764 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:29.764 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:29.764 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:29.764 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:29.764 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:34.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:34.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:34.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:34.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:34.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:34.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:34.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:34.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:20:34.785 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:20:34.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:20:34.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:34.786 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:34.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:34.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:20:34.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:34.787 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:20:34.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:34.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:20:34.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:20:34.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:34.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:34.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:34.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:20:34.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:34.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:20:34.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:34.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:20:34.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:20:34.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:34.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:34.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:34.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:20:34.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:34.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:20:34.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:20:34.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:20:34.798 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:20:34.798 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:34.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:20:35.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:20:35.315 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:20:35.316 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:35.318 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:20:35.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:35.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:35.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:35.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:35.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:35.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:35.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:35.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:35.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:35.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:35.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:35.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:35.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:35.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:35.745 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:20:35.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:35.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:35.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:35.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:36.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:20:36.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:20:36.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:36.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:36.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:36.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:37.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:20:37.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:37.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:37.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:37.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:37.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:37.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:37.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:37.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:37.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:37.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:37.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:37.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:37.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:37.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:37.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:37.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:37.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:37.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:20:37.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:37.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:37.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:37.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:38.107 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:20:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:20:38.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:38.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:38.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:38.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:39.050 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:20:39.524 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:20:39.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:39.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:39.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:39.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:39.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:39.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:39.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:39.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:39.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:39.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:39.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:39.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:39.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:39.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:39.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:39.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:39.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:39.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:39.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:39.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:39.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:39.996 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:20:40.469 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:20:40.942 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:20:41.415 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:20:41.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:41.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:41.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:41.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:41.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:41.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:41.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:41.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:41.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:41.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:41.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:41.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:41.818 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:20:41.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:41.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:41.818 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1517 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:41.818 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1517 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:41.818 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:41.818 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:41.818 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:41.818 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:46.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:46.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:46.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:46.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:46.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:46.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:46.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:46.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:46.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:46.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:46.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:20:46.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:20:46.840 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:20:46.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:46.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:46.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:46.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:20:46.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:46.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:20:46.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:46.844 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:20:46.844 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:20:46.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:46.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:46.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:46.845 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:20:46.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:46.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:20:46.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:46.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:20:46.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:20:46.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:46.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:46.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:46.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:20:46.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:46.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:20:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:20:46.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:20:46.852 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:20:46.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:46.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:20:47.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:20:47.367 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:20:47.368 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:47.369 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:20:47.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:47.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:47.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:47.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:47.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:47.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:47.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:47.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:47.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:47.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:47.441 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:20:47.441 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:20:47.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:47.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:47.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:20:47.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:47.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:47.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:47.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:48.279 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:20:48.753 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:20:48.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:48.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:48.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:48.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:49.225 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:20:49.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:49.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:49.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:49.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:49.564 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:20:49.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:49.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:49.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:49.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:49.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:49.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:49.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:49.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:49.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:49.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:20:49.608 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:20:49.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:49.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:49.694 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:20:49.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:49.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:49.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:49.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:50.167 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:20:50.640 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:20:50.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:50.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:50.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:50.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:51.114 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:20:51.587 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:20:51.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:51.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:51.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:51.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:51.730 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:20:51.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:51.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:51.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:51.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:51.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:51.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:51.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:51.744 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:20:51.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1056 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:51.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1056 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:51.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1056 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:51.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1056 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:51.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1056 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:56.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:56.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:56.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:56.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:56.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:56.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:56.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:56.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:56.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:56.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:20:56.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:20:56.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:20:56.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:20:56.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:56.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:56.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:56.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:20:56.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:20:56.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:20:56.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:56.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:20:56.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:20:56.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:56.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:56.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:56.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:20:56.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:20:56.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:20:56.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:56.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:20:56.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:20:56.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:56.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:20:56.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:56.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:20:56.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:20:56.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:20:56.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:20:56.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:20:56.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:20:56.783 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:20:56.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:20:56.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:20:57.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:20:57.299 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:20:57.300 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:20:57.301 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:20:57.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:57.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:57.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:57.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:20:57.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:57.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:57.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:57.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:20:57.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:20:57.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:57.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:20:57.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:20:57.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:57.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:57.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:20:57.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:57.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:57.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:58.207 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:20:58.680 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:20:58.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:58.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:58.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:58.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:59.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:20:59.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:20:59.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:20:59.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:20:59.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:20:59.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:20:59.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:20:59.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:20:59.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:20:59.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:20:59.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:20:59.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:20:59.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:20:59.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:20:59.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:20:59.550 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=598 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=598 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=598 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=598 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:20:59.550 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=598 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:04.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:04.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:04.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:04.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:04.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:04.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:04.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:04.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:04.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:04.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:04.566 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:04.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:04.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:04.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:04.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:04.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:04.572 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:04.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:04.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:04.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:04.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:04.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:04.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:04.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:04.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:04.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:04.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:04.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:04.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:04.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:04.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:04.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:04.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:04.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:04.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:04.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:04.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:04.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:04.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:04.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:04.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:04.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:04.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:04.582 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:04.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:04.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:04.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:05.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:05.103 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:05.105 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:05.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:05.106 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:05.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:05.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:05.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:05.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:05.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:05.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:05.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:05.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:05.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:05.174 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:21:05.174 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:21:05.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:05.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:05.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:05.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:05.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:05.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:06.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:21:06.481 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:21:06.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:06.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:06.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:06.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:06.955 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:21:07.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:07.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:07.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:07.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:07.395 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:21:07.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:07.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:07.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:07.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:07.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:07.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:07.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:07.420 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:07.420 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=611 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.420 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=611 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.420 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=611 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=611 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=611 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=611 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:07.421 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=612 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:12.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:12.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:12.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:12.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:12.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:12.425 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:12.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:12.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:12.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:12.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:12.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:12.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:12.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:12.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:12.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:12.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:12.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:12.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:12.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:12.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:12.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:12.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:12.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:12.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:12.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:12.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:12.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:12.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:12.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:12.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:12.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:12.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:12.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:12.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:12.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:12.443 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:12.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:12.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:12.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:12.957 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:12.958 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:12.958 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:12.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:12.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:12.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:12.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:13.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:13.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:13.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:13.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:13.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:13.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:13.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.395 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:13.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:13.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:13.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:13.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:13.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:13.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:13.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:13.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:13.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:13.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:13.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:13.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:13.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:13.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:13.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:13.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:13.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:13.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:13.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:13.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:13.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:13.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:21:13.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:13.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:13.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:13.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:13.880 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:13.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:13.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:13.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:13.880 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:13.880 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:13.880 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:13.880 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:13.880 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:13.880 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:18.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:18.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:18.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:18.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:18.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:18.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:18.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:18.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:18.895 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:18.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:18.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:18.902 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:18.903 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:18.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:18.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:18.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:18.904 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:18.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:18.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:18.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:18.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:18.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:18.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:18.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:18.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:18.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:18.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:18.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:18.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:18.912 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:18.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:18.912 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:18.912 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:18.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:18.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:18.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:18.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:18.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:18.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:18.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:18.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:18.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:18.917 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:18.917 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:18.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:18.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:18.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:18.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:18.922 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:19.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:19.432 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:19.433 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:19.434 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:19.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:19.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:19.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:19.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:19.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:19.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:19.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:19.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:19.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:19.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:19.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:19.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:19.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:19.871 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:19.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:19.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:19.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:19.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:19.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:19.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:19.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:19.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:19.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:19.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:19.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:19.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:19.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:19.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:19.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:19.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:19.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:19.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:19.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:19.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:19.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:20.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:20.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:20.339 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:21:20.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:20.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:20.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:20.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:20.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:20.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:20.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:20.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:20.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:20.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:20.356 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:20.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:20.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:20.356 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:25.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:25.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:25.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:25.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:25.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:25.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:25.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:25.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:25.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:25.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:25.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:25.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:25.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:25.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:25.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:25.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:25.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:25.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:25.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:25.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:25.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:25.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:25.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:25.380 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:25.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:25.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:25.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:25.381 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:25.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:25.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:25.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:25.383 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:25.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:25.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:25.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:25.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:25.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:25.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:25.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:25.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:25.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:25.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:25.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:25.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:25.387 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:25.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:25.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:25.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:25.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:25.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:25.870 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:25.901 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:25.902 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:25.903 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:25.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:25.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:25.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:25.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:25.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:25.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:25.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:25.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:25.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:26.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:26.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:26.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:26.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.338 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:26.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:26.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:26.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:26.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:26.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:26.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:26.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:26.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:26.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:26.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:26.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:26.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:26.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:26.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:26.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:26.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:26.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:26.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:21:26.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:26.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:26.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:26.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:26.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:26.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:26.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:26.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:26.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:26.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:26.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:26.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:26.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:26.876 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=320 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=320 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=320 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=320 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.877 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=321 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=322 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:26.878 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:31.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:31.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:31.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:31.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:31.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:31.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:31.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:31.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:31.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:31.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:31.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:31.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:31.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:31.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:31.889 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:31.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:31.891 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:31.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:31.891 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:31.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:31.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:31.895 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:31.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:31.895 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:31.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:31.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:31.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:31.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:31.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:31.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:31.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:31.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:31.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:31.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:31.900 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:31.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:31.900 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:31.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.904 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:31.905 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:31.905 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:31.905 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:32.388 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:32.419 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:32.419 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:32.420 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:32.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:32.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:32.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:32.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:32.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:32.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:32.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:32.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:32.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:32.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:32.536 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:21:32.536 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:21:32.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:32.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:32.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:32.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:32.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:32.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:32.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:33.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:21:33.804 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:21:33.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:34.277 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:21:34.750 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:21:34.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:34.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:34.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:35.223 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:21:35.697 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:21:35.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:35.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:35.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:35.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:36.170 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:21:36.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:36.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:36.542 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:21:36.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:36.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:36.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:36.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:36.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:36.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:36.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:36.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:36.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:36.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:36.548 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:36.548 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:36.548 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:36.548 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:36.548 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:36.548 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:36.548 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:41.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:41.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:41.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:41.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:41.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:41.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:41.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:41.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:41.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:41.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:41.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:41.569 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:41.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:41.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:41.570 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:41.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:41.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:41.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:41.571 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:41.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:41.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:41.574 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:41.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:41.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:41.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:41.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:41.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:41.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:41.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:41.577 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:41.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:41.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:41.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:41.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:41.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:41.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:41.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:41.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:41.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:41.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:41.583 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:41.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:41.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:41.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:42.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:42.097 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:42.098 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:42.099 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:42.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:42.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:42.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:42.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:42.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:42.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:42.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:42.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:42.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:42.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:42.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:42.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:42.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:42.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:42.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:42.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:42.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:42.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:42.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:42.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:42.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:42.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:42.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:42.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:42.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:42.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:42.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:42.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:42.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:42.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:42.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:42.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:42.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:42.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:42.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:42.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:42.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:42.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:42.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:42.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:42.715 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:42.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:42.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:47.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:47.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:47.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:47.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:47.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:47.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:47.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:47.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:47.734 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:47.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:47.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:47.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:47.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:47.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:47.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:47.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:47.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:47.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:47.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:47.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:47.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:47.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:47.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:47.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:47.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:47.747 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:47.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:47.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:47.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:47.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:47.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:47.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:47.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:47.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:47.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:47.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:47.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:47.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:47.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:47.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:47.755 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:47.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:47.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:47.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:48.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:48.270 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:48.271 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:48.272 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:48.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:48.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:48.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:48.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:48.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:48.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:48.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:48.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:48.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:48.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:48.386 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:21:48.386 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:21:48.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:48.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:48.705 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:48.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:48.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:48.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:48.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:49.172 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:21:49.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:21:49.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:49.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:49.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:49.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:50.103 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:21:50.571 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:21:50.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:50.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:50.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:50.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:51.045 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:21:51.517 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:21:51.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:51.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:51.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:51.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:51.989 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:21:52.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:52.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:52.391 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:21:52.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:52.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:52.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:52.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:52.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:52.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:52.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:52.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:52.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:52.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:52.396 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:57.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:57.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:57.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:57.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:57.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:57.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:57.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:57.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:57.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:57.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:21:57.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:21:57.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:21:57.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:21:57.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:57.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:57.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:57.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:21:57.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:21:57.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:21:57.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:57.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:21:57.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:21:57.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:57.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:57.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:57.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:21:57.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:21:57.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:21:57.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:57.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:21:57.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:21:57.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:57.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:21:57.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:57.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:21:57.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:21:57.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:21:57.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:57.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:21:57.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:21:57.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:21:57.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:21:57.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:21:57.426 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:21:57.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:21:57.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:21:57.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:21:57.910 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:21:57.940 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:21:57.941 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:21:57.941 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:21:57.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:57.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:57.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:57.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:21:58.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:58.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:58.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:58.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:21:58.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:21:58.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:58.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:21:58.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:21:58.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:58.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:58.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:21:58.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:58.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:58.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:58.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:58.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:21:58.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:21:58.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:21:58.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:21:58.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:21:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:21:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:21:58.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:21:58.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:21:58.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:21:58.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:21:58.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:21:58.785 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:21:58.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:21:58.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:21:58.786 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:03.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:03.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:03.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:03.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:03.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:03.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:03.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:03.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:03.803 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:03.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:03.803 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:03.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:03.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:03.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:03.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:03.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:03.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:03.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:03.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:03.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:03.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:03.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:03.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:03.813 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:03.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:03.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:03.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:03.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:03.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:03.815 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:03.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:03.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:03.816 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:03.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:03.816 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:03.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:03.816 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:03.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:03.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:03.820 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:03.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:03.824 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:04.302 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:04.336 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:04.337 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:04.338 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:04.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:04.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:04.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:04.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:04.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:04.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:04.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:04.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:04.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:04.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:04.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:04.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:04.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:04.770 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:04.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:04.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:04.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:04.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:05.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:05.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:05.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:05.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:05.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:05.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:05.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:05.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:05.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:05.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:05.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:05.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:05.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:05.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:05.179 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:05.180 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:10.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:10.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:10.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:10.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:10.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:10.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:10.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:10.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:10.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:10.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:10.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:10.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:10.204 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:10.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:10.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:10.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:10.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:10.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:10.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:10.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:10.209 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:10.209 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:10.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:10.209 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:10.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:10.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:10.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:10.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:10.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:10.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:10.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:10.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:10.213 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:10.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:10.213 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:10.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:10.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:10.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:10.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:10.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:10.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:10.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:10.216 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:10.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:10.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:10.217 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:10.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:10.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:10.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:10.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:10.734 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:10.735 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:10.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:10.736 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:10.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:10.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:10.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:10.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:10.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:10.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:10.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:10.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:10.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:10.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:10.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:10.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:10.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:11.168 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:11.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:11.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:11.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:11.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:11.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:11.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:11.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:11.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:11.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:11.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:11.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:11.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:11.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:11.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:11.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:11.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:11.581 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:11.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:11.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:11.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:11.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:11.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:11.582 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:16.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:16.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:16.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:16.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:16.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:16.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:16.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:16.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:16.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:16.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:16.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:16.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:16.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:16.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:16.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:16.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:16.596 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:16.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:16.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:16.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:16.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:16.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:16.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:16.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:16.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:16.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:16.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:16.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:16.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:16.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:16.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:16.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:16.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:16.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:16.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:16.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:16.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:16.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:16.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:16.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:16.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:16.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:16.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:16.609 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:16.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:16.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:17.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:17.124 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:17.125 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:17.125 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:17.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:17.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:17.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:17.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:17.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:17.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:17.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:17.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:17.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:17.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:17.240 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:22:17.240 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:22:17.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:17.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:17.565 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:17.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:17.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:17.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:17.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:18.039 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:22:18.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:18.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:18.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:18.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:18.096 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:22:18.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:18.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:18.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:18.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:18.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:18.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:18.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:18.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:18.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:18.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:18.112 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:18.112 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:23.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:23.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:23.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:23.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:23.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:23.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:23.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:23.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:23.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:23.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:23.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:23.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:23.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:23.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:23.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:23.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:23.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:23.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:23.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:23.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:23.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:23.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:23.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:23.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:23.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:23.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:23.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:23.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:23.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:23.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:23.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:23.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:23.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:23.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:23.142 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:23.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:23.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:23.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:23.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:23.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:23.146 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:23.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:23.150 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:23.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:23.661 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:23.661 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:23.662 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:23.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:23.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:23.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:23.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:23.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:23.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:23.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:23.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:23.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:23.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:23.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:23.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:23.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:23.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:24.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:24.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:24.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:24.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:24.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:24.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:24.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:24.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:24.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:24.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:24.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:24.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:24.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:24.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:24.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:24.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:24.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:24.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:24.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:24.513 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:24.513 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.514 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.515 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.515 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.515 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:24.515 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:29.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:29.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:29.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:29.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:29.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:29.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:29.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:29.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:29.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:29.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:29.524 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:29.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:29.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:29.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:29.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:29.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:29.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:29.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:29.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:29.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:29.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:29.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:29.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:29.537 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:29.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:29.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:29.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:29.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:29.540 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:29.540 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:29.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:29.540 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:29.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:29.540 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:29.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:29.541 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:29.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:29.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:29.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:29.545 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:29.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:29.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:30.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:30.058 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:30.059 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:30.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:30.060 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:30.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:30.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:30.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:30.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:30.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:30.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:30.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:30.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:30.129 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:22:30.130 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:22:30.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:30.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:30.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:30.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:30.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:30.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:30.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:30.974 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:22:30.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:30.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:30.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:30.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:30.988 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:22:30.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:30.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:30.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:30.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:31.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:31.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:31.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:31.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:31.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:31.000 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:31.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:31.000 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:31.000 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:31.000 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:31.001 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:36.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:36.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:36.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:36.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:36.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:36.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:36.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:36.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:36.020 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:36.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:36.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:36.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:36.029 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:36.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:36.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:36.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:36.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:36.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:36.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:36.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:36.034 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:36.034 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:36.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:36.035 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:36.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:36.035 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:36.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:36.036 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:36.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:36.037 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:36.038 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:36.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:36.038 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:36.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:36.038 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:36.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:36.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:36.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:36.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:36.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:36.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:36.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:36.042 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:36.042 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:36.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:36.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:36.047 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:36.525 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:36.557 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:36.558 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:36.559 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:36.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:36.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:36.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:36.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:36.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:36.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:36.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:36.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:36.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:36.997 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:37.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:37.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:37.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:37.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:37.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:22:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:37.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:37.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:37.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:37.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:37.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:37.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:37.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:37.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:37.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:37.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:37.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:37.939 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:22:38.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:38.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:38.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:38.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:38.410 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:22:38.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:22:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:22:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:22:38.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:38.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:38.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:38.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:38.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:38.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:38.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:38.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:38.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:38.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:38.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:38.928 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:38.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:38.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:38.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:38.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:38.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:43.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:43.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:43.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:43.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:43.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:43.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:43.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:43.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:43.947 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:43.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:43.948 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:43.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:43.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:43.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:43.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:43.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:43.957 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:43.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:43.957 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:43.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:43.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:43.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:43.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:43.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:43.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:43.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:43.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:43.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:43.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:43.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:43.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:43.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:43.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:43.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:43.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:43.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:43.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:43.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:43.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:43.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:43.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:43.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:43.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:43.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:43.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:43.969 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:43.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:43.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:43.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:44.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:44.483 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:44.484 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:44.484 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:44.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:44.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:44.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:44.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:44.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:44.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:44.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:44.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:44.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:44.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:44.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:44.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:44.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:44.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:45.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:22:45.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:22:45.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:46.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:22:46.814 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:22:46.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:46.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:46.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:46.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:47.285 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:22:47.759 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:22:47.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:47.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:47.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:47.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:48.231 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:22:48.703 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:22:48.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:48.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:48.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:48.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:49.174 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:22:49.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:22:49.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:49.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:49.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:49.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:49.647 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:22:50.120 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:22:50.592 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:22:51.059 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:22:51.523 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:22:51.987 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:22:52.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:52.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:52.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:52.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:52.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:52.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:52.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:52.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:52.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:52.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:52.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:52.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:52.408 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:52.408 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:22:57.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:22:57.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:22:57.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:57.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:57.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:57.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:57.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:22:57.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:57.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:57.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:22:57.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:22:57.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:22:57.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:22:57.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:57.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:57.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:22:57.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:22:57.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:22:57.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:22:57.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:57.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:22:57.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:22:57.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:57.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:57.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:22:57.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:22:57.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:22:57.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:22:57.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:57.433 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:22:57.433 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:22:57.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:57.433 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:22:57.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:22:57.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:22:57.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:22:57.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:22:57.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:22:57.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:22:57.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:22:57.438 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:22:57.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:22:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:22:57.442 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:22:57.919 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:22:57.953 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:22:57.954 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:22:57.955 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:22:57.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:22:57.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:22:57.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:22:57.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:22:57.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:22:57.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:22:57.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:22:57.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:22:57.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:22:58.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:22:58.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:58.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:58.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:58.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:58.863 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:22:59.334 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:22:59.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:22:59.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:22:59.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:22:59.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:22:59.807 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:23:00.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:23:00.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:00.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:00.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:00.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:00.752 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:23:01.223 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:23:01.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:01.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:01.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:01.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:01.697 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:23:02.169 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:23:02.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:02.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:02.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:02.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:02.641 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:23:02.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:23:02.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:02.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:02.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:02.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:03.113 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:23:03.587 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:23:04.059 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:23:04.533 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:23:05.005 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:23:05.477 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:23:05.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:05.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:05.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:05.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:05.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:05.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:05.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:05.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:05.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:05.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:05.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:05.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:05.875 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:23:10.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:10.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:10.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:10.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:10.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:10.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:10.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:10.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:10.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:10.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:10.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:23:10.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:23:10.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:23:10.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:10.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:10.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:10.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:23:10.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:10.904 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:23:10.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:10.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:23:10.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:23:10.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:10.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:10.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:10.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:23:10.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:10.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:23:10.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:10.911 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:23:10.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:23:10.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:10.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:10.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:10.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:23:10.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:10.912 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:23:10.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:23:10.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:23:10.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:23:10.916 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:23:10.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:10.920 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:23:11.398 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:23:11.430 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:23:11.431 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:23:11.431 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:23:11.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:23:11.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:11.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:11.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:23:11.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:11.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:11.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:11.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:23:11.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:23:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:23:11.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:11.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:11.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:11.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:12.342 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:23:12.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:23:12.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:13.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:23:13.758 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:23:13.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:13.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:13.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:13.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:14.231 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:23:14.704 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:23:14.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:14.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:14.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:14.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:15.177 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:23:15.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:23:15.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:15.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:15.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:15.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:16.120 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:23:16.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:23:16.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:16.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:16.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:16.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:23:17.066 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:23:17.538 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:23:18.011 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:23:18.485 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:23:18.957 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:23:19.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:19.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:19.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:19.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:19.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:19.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:19.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:19.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:19.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:19.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:19.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:19.351 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:23:19.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:24.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:24.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:24.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:24.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:24.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:24.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:24.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:24.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:24.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:24.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:24.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:23:24.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:23:24.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:23:24.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:24.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:24.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:24.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:23:24.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:24.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:23:24.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:24.380 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:23:24.380 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:23:24.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:24.380 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:24.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:24.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:23:24.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:24.381 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:23:24.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:24.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:23:24.383 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:23:24.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:24.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:24.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:24.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:23:24.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:24.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:23:24.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:23:24.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:23:24.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:23:24.388 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:23:24.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:24.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:24.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:24.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:23:24.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:23:24.905 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:23:24.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:23:24.907 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:23:24.908 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:23:24.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:24.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:24.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:23:24.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:24.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:24.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:24.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:23:24.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:23:25.343 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:23:25.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:25.814 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:23:26.285 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:23:26.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:26.759 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:23:27.231 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:23:27.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:27.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:27.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:27.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:27.703 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:23:28.174 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:23:28.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:28.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:28.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:28.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:28.646 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:23:29.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:23:29.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:29.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:29.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:29.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:29.592 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:23:29.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:23:29.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:29.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:29.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:29.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:30.064 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:23:30.538 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:23:31.010 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:23:31.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:23:31.956 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:23:32.428 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:23:32.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:32.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:32.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:32.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:32.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:32.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:32.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:32.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:32.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:32.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:32.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:32.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:32.826 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (TRX2@172.18.244.20:5700/2) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:32.826 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:37.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:37.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:37.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:37.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:37.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:37.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:37.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:37.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:37.846 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:37.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:37.847 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:23:37.851 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:23:37.851 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:23:37.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:37.852 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:37.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:37.852 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:23:37.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:37.852 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:23:37.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:37.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:23:37.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:23:37.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:37.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:37.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:37.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:23:37.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:37.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:23:37.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:37.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:23:37.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:23:37.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:37.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:37.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:37.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:23:37.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:37.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:23:37.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:37.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:23:37.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:23:37.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:23:37.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:23:37.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:23:37.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:23:37.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:23:37.867 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:23:37.867 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:37.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:23:38.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:23:38.383 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:23:38.384 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:23:38.385 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:23:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:23:38.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:38.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:38.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:23:38.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:38.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:38.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:38.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:23:38.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:23:38.821 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:23:38.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:38.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:38.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:38.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:39.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:23:39.766 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:23:39.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:39.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:39.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:39.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:40.239 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:23:40.711 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:23:40.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:40.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:40.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:40.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:41.182 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:23:41.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:23:41.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:41.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:41.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:41.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:42.128 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:23:42.600 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:23:42.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:42.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:42.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:42.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:43.071 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:23:43.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD NOHANDOVER
2026-03-02 03:23:43.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:23:43.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:23:43.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:43.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:23:43.544 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:23:44.017 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:23:44.489 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:23:44.962 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:23:45.435 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:23:45.907 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:23:46.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:23:46.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:23:46.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:46.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:46.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:46.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:46.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:46.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:46.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:46.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:46.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:46.303 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (TRX2@172.18.244.20:5700/2) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:46.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:46.304 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:23:51.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:23:51.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:23:51.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:51.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:51.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:51.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:51.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:23:51.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:51.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:51.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:23:51.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:23:51.327 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:23:51.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:23:51.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:51.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:51.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:23:51.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:23:51.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:23:51.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:23:51.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:51.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:23:51.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:23:51.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:51.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:51.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:23:51.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:23:51.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:23:51.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:23:51.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:51.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:23:51.335 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:23:51.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:51.335 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:23:51.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:23:51.335 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:23:51.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:23:51.336 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:23:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:51.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:23:51.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:23:51.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:23:51.339 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:23:51.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:23:51.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:23:51.856 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:23:51.857 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:23:51.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:23:51.858 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:23:52.294 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:23:52.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:52.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:52.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:52.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:52.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:23:53.239 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:23:53.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:53.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:53.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:53.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:53.711 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:23:54.183 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:23:54.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:54.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:54.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:54.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:54.657 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:23:55.129 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:23:55.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:55.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:55.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:55.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:55.601 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:23:56.075 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:23:56.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:23:56.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:23:56.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:23:56.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:23:56.547 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:23:57.019 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:23:57.493 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:23:57.965 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:23:58.437 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:23:58.908 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:23:59.379 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:23:59.853 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:24:00.325 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:24:00.797 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:24:01.268 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:24:01.742 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:24:01.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:01.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:01.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:01.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:01.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:01.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:01.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:01.873 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2274 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2274 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2274 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:01.874 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:06.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:06.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:06.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:06.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:06.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:06.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:06.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:06.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:06.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:06.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:06.891 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:24:06.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:24:06.895 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:24:06.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:06.895 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:06.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:06.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:24:06.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:06.896 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:24:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:06.899 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:24:06.899 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:24:06.899 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:06.899 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:06.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:06.900 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:24:06.900 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:06.900 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:24:06.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:06.902 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:24:06.902 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:24:06.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:06.902 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:06.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:06.902 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:24:06.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:06.903 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:24:06.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:06.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:24:06.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:24:06.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:24:06.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:24:06.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:24:06.906 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:24:06.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:24:06.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:06.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:06.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:06.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:06.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:06.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:06.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:06.909 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:11.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:11.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:11.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:11.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:11.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:11.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:11.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:11.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:11.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:11.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:11.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:24:11.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:24:11.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:24:11.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:11.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:11.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:11.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:24:11.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:11.936 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:24:11.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:11.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:24:11.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:24:11.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:11.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:11.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:11.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:24:11.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:11.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:24:11.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:11.942 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:24:11.942 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:24:11.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:11.942 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:11.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:11.942 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:24:11.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:11.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:24:11.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:11.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:24:11.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:24:11.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:24:11.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:24:11.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:24:11.946 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:24:11.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:11.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:24:12.430 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:24:12.462 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:24:12.463 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:24:12.464 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:24:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:24:12.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:24:12.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:24:12.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:24:12.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:24:12.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:24:12.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:24:12.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:24:12.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:24:12.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:24:12.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:12.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:12.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:12.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:13.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:24:13.847 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:24:13.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:13.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:13.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:13.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:14.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:24:14.791 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:24:14.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:14.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:14.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:14.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:15.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:24:15.733 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:24:15.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:15.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:15.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:15.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:24:16.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:24:16.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:16.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:16.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:16.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:17.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:24:17.622 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:24:18.092 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:24:18.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:24:19.038 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:24:19.510 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:24:19.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:24:20.455 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:24:20.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:24:20.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:24:20.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:20.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:20.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:20.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:20.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:20.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:20.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:20.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:20.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:20.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:20.484 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:20.484 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1845 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:20.484 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1845 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:20.484 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1845 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:20.484 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1845 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:20.484 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1845 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:20.484 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1845 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:25.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:25.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:25.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:25.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:25.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:25.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:25.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:25.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:25.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:25.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:25.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:24:25.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:24:25.505 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:24:25.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:25.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:25.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:25.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:24:25.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:25.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:24:25.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:25.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:24:25.509 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:24:25.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:25.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:25.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:25.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:24:25.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:25.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:24:25.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:25.512 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:24:25.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:24:25.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:25.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:25.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:25.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:24:25.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:25.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:24:25.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:25.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:24:25.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:24:25.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:24:25.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:24:25.517 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:24:25.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:25.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:25.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:25.520 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:30.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:30.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:30.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:30.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:30.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:30.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:30.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:30.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:30.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:30.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:30.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:24:30.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:24:30.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:24:30.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:30.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:30.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:30.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:24:30.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:30.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:24:30.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:30.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:24:30.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:24:30.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:30.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:30.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:30.551 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:24:30.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:30.551 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:24:30.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:30.553 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:24:30.553 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:24:30.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:30.553 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:30.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:30.553 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:24:30.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:30.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:24:30.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:30.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:24:30.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:24:30.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:24:30.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:24:30.557 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:24:30.557 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:24:30.557 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:30.562 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:24:31.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:24:31.073 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:24:31.074 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:24:31.075 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:24:31.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:24:31.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:24:31.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:24:31.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:24:31.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:24:31.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:24:31.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:24:31.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:24:31.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:24:31.513 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:24:31.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:31.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:31.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:31.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:31.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:24:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:24:32.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:32.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:32.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:32.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:24:33.401 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:24:33.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:33.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:33.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:33.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:33.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:24:34.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:24:34.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:34.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:34.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:34.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:34.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:24:35.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:24:35.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:35.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:35.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:35.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:35.762 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:24:36.233 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:24:36.706 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:24:37.179 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:24:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:24:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:24:38.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:24:39.068 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:24:39.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:24:39.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:24:39.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:39.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:39.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:39.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:39.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:39.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:39.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:39.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:39.094 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:39.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:39.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:44.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:44.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:44.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:44.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:44.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:44.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:44.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:44.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:44.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:44.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:44.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:24:44.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:24:44.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:24:44.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:44.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:44.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:44.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:24:44.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:44.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:24:44.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:44.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:24:44.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:24:44.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:44.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:44.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:44.127 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:24:44.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:44.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:24:44.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:44.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:24:44.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:24:44.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:44.129 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:44.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:44.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:24:44.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:44.130 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:24:44.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:44.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:24:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:24:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:24:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:24:44.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:24:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:24:44.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:24:44.134 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:24:44.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:24:44.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:44.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:44.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:44.136 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:49.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:49.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:49.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:49.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:49.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:49.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:49.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:49.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:49.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:49.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:24:49.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:24:49.162 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:24:49.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:24:49.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:49.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:49.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:49.164 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:24:49.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:24:49.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:24:49.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:49.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:24:49.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:24:49.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:49.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:49.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:49.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:24:49.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:24:49.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:24:49.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:49.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:24:49.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:24:49.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:49.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:24:49.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:24:49.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:24:49.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:24:49.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:24:49.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:24:49.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:24:49.174 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:24:49.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:24:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:24:49.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:24:49.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:24:49.688 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:24:49.689 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:24:49.689 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:24:49.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:24:49.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:24:49.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:24:49.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:24:49.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:24:49.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:24:49.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:24:49.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:24:49.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:24:50.129 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:24:50.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:50.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:50.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:50.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:50.601 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:24:51.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:24:51.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:51.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:51.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:51.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:51.546 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:24:52.018 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:24:52.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:52.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:52.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:52.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:52.490 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:24:52.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:24:53.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:53.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:53.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:53.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:24:53.908 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:24:54.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:54.379 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:24:54.852 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:24:55.325 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:24:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:24:56.268 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:24:56.739 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:24:57.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:24:57.684 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:24:57.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:24:57.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:24:57.705 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=1842 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:24:57.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:24:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:24:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:24:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:24:57.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:24:57.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:24:57.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:24:57.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:24:57.710 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:24:57.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:24:57.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:02.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:02.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:02.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:02.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:02.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:02.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:02.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:02.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:02.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:02.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:02.729 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:25:02.734 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:25:02.734 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:25:02.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:02.734 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:02.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:02.735 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:25:02.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:02.736 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:25:02.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:02.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:25:02.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:25:02.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:02.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:02.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:02.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:25:02.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:02.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:25:02.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:02.741 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:25:02.741 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:25:02.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:02.741 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:02.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:02.741 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:25:02.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:02.741 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:25:02.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:02.744 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:25:02.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:25:02.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:25:02.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:25:02.744 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:25:02.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:25:02.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:25:02.745 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:25:02.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:25:02.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:02.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:02.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:02.747 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:25:07.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:07.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:07.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:07.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:07.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:07.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:07.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:07.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:07.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:07.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:07.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:25:07.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:25:07.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:25:07.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:07.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:07.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:07.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:25:07.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:07.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:25:07.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:07.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:25:07.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:25:07.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:07.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:07.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:07.784 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:25:07.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:07.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:25:07.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:07.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:25:07.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:25:07.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:07.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:07.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:07.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:25:07.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:07.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:25:07.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:25:07.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:25:07.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:25:07.792 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:25:07.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:07.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:07.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:25:08.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:25:08.306 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:25:08.307 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:25:08.308 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:25:08.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:25:08.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:25:08.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:25:08.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:25:08.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:25:08.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:25:08.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:25:08.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:25:08.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:25:08.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:25:08.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:08.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:08.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:08.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:09.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:25:09.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:25:09.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:09.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:09.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:09.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:10.163 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:25:10.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:25:10.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:10.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:10.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:10.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:11.108 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:25:11.579 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:25:11.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:11.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:11.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:11.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:12.052 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:25:12.525 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:25:12.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:12.997 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:25:13.468 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:25:13.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:25:14.413 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:25:14.886 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:25:15.357 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:25:15.827 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:25:16.298 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:25:16.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:25:16.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:25:16.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:16.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:16.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:16.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:16.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:16.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:16.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:16.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:16.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:16.329 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:25:16.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:16.329 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:16.329 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:16.329 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:16.329 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:21.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:21.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:21.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:21.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:21.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:21.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:21.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:25:21.349 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:25:21.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:25:21.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:21.350 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:21.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:21.351 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:25:21.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:21.351 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:25:21.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:21.353 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:25:21.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:25:21.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:21.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:21.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:21.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:25:21.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:21.354 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:25:21.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:21.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:25:21.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:25:21.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:21.357 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:21.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:21.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:25:21.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:21.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:25:21.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:21.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:25:21.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:25:21.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:25:21.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:25:21.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:25:21.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:25:21.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:25:21.361 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:25:21.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:25:21.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:21.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:21.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:21.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:21.364 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:25:26.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:26.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:26.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:26.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:26.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:26.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:26.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:26.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:26.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:26.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:26.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:25:26.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:25:26.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:25:26.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:26.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:26.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:26.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:25:26.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:26.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:25:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:26.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:25:26.395 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:25:26.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:26.395 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:26.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:26.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:25:26.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:26.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:25:26.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:26.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:25:26.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:25:26.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:26.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:26.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:26.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:25:26.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:26.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:25:26.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:26.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:25:26.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:25:26.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:25:26.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:25:26.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:25:26.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:25:26.402 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:25:26.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:26.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:26.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:26.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:26.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:25:26.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:25:26.919 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:25:26.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:25:26.921 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:25:26.924 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:25:26.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:25:26.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:25:26.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:25:26.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:25:26.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:25:26.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:25:26.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:25:26.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:25:27.356 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:25:27.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:27.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:27.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:27.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:25:28.300 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:25:28.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:28.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:28.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:28.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:28.773 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:25:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:25:29.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:29.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:29.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:29.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:29.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:25:30.189 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:25:30.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:30.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:30.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:30.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:30.662 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:25:31.134 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:25:31.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:31.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:31.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:25:32.078 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:25:32.551 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:25:33.023 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:25:33.494 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:25:33.967 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:25:34.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:25:34.912 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:25:35.383 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:25:35.854 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:25:36.327 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:25:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:25:37.271 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:25:37.756 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:25:38.228 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:25:38.699 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:25:39.172 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:25:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:25:40.117 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:25:40.588 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:25:40.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:25:40.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:25:40.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:40.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:40.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:40.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:40.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:40.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:40.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:40.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:40.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:40.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:40.984 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:25:40.984 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3148 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:40.984 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3148 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:40.984 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3148 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:40.984 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:40.984 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:40.984 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:45.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:45.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:45.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:45.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:45.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:45.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:45.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:46.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:46.000 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:46.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:46.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:25:46.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:25:46.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:25:46.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:46.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:46.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:46.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:25:46.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:46.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:25:46.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:46.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:25:46.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:25:46.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:46.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:46.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:25:46.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:46.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:25:46.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:46.013 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:25:46.013 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:25:46.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:46.013 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:46.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:46.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:25:46.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:46.014 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:25:46.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:25:46.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:25:46.018 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:25:46.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:46.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:46.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:46.020 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:25:51.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:51.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:51.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:51.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:51.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:51.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:51.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:51.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:51.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:51.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:25:51.039 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:25:51.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:25:51.045 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:25:51.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:51.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:51.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:51.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:25:51.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:25:51.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:25:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:51.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:25:51.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:25:51.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:51.051 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:51.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:51.051 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:25:51.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:25:51.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:25:51.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:51.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:25:51.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:25:51.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:51.054 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:25:51.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:51.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:25:51.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:25:51.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:25:51.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:25:51.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:25:51.059 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:25:51.059 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:25:51.059 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:25:51.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:25:51.542 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:25:51.575 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:25:51.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:25:51.576 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:25:51.577 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:25:51.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:25:51.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:25:51.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:25:51.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:25:51.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:25:51.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:25:51.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:25:51.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:25:52.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:25:52.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:52.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:52.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:52.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:52.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:25:52.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:25:53.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:53.432 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:25:53.904 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:25:54.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:54.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:54.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:54.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:25:54.848 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:25:55.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:55.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:55.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:55.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:55.321 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:25:55.793 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:25:56.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:56.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:56.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:56.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:56.264 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:25:56.737 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:25:57.210 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:25:57.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:25:58.153 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:25:58.626 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:25:59.099 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:25:59.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:25:59.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:25:59.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:25:59.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:25:59.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:25:59.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:25:59.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:25:59.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:25:59.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:25:59.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:25:59.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:25:59.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:25:59.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:25:59.600 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:25:59.600 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:04.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:04.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:04.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:04.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:04.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:04.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:04.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:04.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:04.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:04.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:04.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:26:04.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:26:04.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:26:04.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:04.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:04.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:04.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:26:04.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:04.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:26:04.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:04.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:26:04.627 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:26:04.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:04.627 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:04.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:04.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:26:04.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:04.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:26:04.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:04.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:26:04.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:26:04.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:04.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:04.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:04.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:26:04.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:04.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:26:04.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:04.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:26:04.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:26:04.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:26:04.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:26:04.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:26:04.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:26:04.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:26:04.635 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:26:04.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:26:04.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:04.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:04.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:04.637 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:26:09.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:09.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:09.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:09.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:09.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:09.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:09.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:09.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:09.656 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:09.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:09.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:26:09.662 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:26:09.663 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:26:09.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:09.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:09.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:09.664 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:26:09.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:09.665 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:26:09.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:09.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:26:09.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:26:09.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:09.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:09.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:09.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:26:09.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:09.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:26:09.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:09.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:26:09.671 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:26:09.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:09.671 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:09.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:09.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:26:09.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:09.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:26:09.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:26:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:26:09.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:26:09.676 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:26:09.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:09.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:26:10.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:26:10.191 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:26:10.191 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:26:10.192 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:26:10.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:26:10.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:26:10.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:26:10.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:26:10.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:26:10.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:26:10.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:26:10.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:26:10.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:26:10.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:26:10.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:10.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:10.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:10.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:11.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:26:11.576 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:26:11.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:11.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:11.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:11.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:12.049 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:26:12.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:26:12.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:12.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:12.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:12.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:12.992 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:26:13.465 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:26:13.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:13.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:13.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:13.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:26:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:26:14.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:14.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:14.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:14.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:14.881 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:26:15.354 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:26:15.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:26:16.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:26:16.770 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:26:17.241 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:26:17.714 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:26:18.186 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:26:18.658 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:26:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:26:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:26:20.075 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:26:20.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:26:20.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:26:20.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:20.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:20.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:20.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:20.216 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:26:20.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2276 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:20.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2276 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:20.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2276 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:20.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:20.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:20.216 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:25.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:25.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:25.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:25.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:25.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:25.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:25.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:25.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:26:25.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:26:25.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:26:25.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:25.238 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:25.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:25.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:26:25.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:25.239 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:26:25.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:25.241 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:26:25.241 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:26:25.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:25.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:25.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:25.242 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:26:25.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:25.242 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:26:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:25.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:26:25.244 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:26:25.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:25.244 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:25.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:25.244 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:26:25.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:25.244 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:26:25.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:26:25.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:26:25.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:26:25.248 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:26:25.248 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:25.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:25.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:25.250 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:26:30.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:30.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:30.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:30.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:30.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:30.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:30.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:30.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:30.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:30.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:30.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:26:30.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:26:30.273 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:26:30.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:30.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:30.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:30.274 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:26:30.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:30.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:26:30.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:30.277 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:26:30.277 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:26:30.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:30.278 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:30.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:30.278 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:26:30.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:30.279 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:26:30.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:30.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:26:30.281 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:26:30.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:30.281 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:30.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:30.281 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:26:30.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:30.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:26:30.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:30.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:26:30.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:26:30.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:26:30.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:26:30.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:26:30.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:26:30.285 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:26:30.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:30.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:30.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:26:30.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:26:30.801 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:26:30.802 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:26:30.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:26:30.803 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:26:30.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:26:30.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:26:30.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:26:30.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:26:30.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:26:30.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:26:30.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:26:30.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:26:31.240 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:26:31.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:31.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:31.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:31.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:31.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:26:32.185 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:26:32.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:32.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:32.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:32.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:32.658 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:26:33.130 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:26:33.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:33.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:33.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:33.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:33.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:26:34.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:26:34.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:34.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:34.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:34.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:34.547 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:26:35.019 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:26:35.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:35.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:35.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:35.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:35.490 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:26:35.961 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:26:36.434 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:26:36.906 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:26:37.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:26:37.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:26:38.323 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:26:38.795 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:26:39.267 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:26:39.739 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:26:40.212 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:26:40.684 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:26:41.156 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:26:41.627 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:26:41.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:26:41.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:26:41.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:41.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:41.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:41.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:41.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:41.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:41.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:41.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:41.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:41.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:41.820 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:26:41.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:41.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:41.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:41.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:41.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:41.821 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:26:46.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:46.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:46.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:46.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:46.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:46.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:46.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:46.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:46.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:46.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:46.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:26:46.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:26:46.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:26:46.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:46.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:46.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:46.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:26:46.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:46.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:26:46.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:46.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:26:46.847 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:26:46.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:46.847 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:46.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:46.848 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:26:46.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:46.848 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:26:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:46.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:26:46.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:26:46.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:46.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:46.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:46.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:26:46.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:46.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:26:46.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:26:46.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:26:46.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:26:46.855 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:26:46.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:46.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:46.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:46.857 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:26:51.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:26:51.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:26:51.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:51.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:51.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:51.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:51.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:26:51.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:51.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:51.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:26:51.875 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:26:51.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:26:51.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:26:51.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:51.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:51.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:26:51.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:26:51.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:26:51.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:26:51.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:51.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:26:51.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:26:51.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:51.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:51.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:26:51.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:26:51.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:26:51.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:26:51.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:51.890 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:26:51.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:26:51.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:51.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:26:51.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:26:51.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:26:51.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:26:51.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:26:51.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:26:51.895 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:26:51.895 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:26:51.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:26:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:26:51.900 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:26:52.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:26:52.410 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:26:52.411 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:26:52.411 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:26:52.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:26:52.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:26:52.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:26:52.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:26:52.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:26:52.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:26:52.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:26:52.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:26:52.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:26:52.850 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:26:52.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:52.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:52.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:52.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:53.321 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:26:53.794 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:26:53.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:53.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:53.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:53.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:54.267 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:26:54.739 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:26:54.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:54.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:54.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:54.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:55.213 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:26:55.685 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:26:55.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:55.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:55.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:55.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:56.157 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:26:56.628 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:26:56.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:26:56.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:26:56.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:26:56.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:26:57.099 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:26:57.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:26:58.045 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:26:58.517 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:26:58.988 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:26:59.461 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:26:59.934 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:27:00.406 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:27:00.877 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:27:01.351 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:27:01.823 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:27:02.295 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:27:02.766 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:27:03.237 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:27:03.710 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:27:04.183 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:27:04.655 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:27:05.126 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:27:05.599 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:27:06.072 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:27:06.544 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:27:07.015 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:27:07.488 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:27:07.961 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:27:08.433 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:27:08.904 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:27:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:27:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:27:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:27:10.793 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:27:11.267 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:27:11.739 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:27:12.211 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:27:12.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:27:12.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:27:12.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:12.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:12.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:12.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:12.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:12.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:12.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:12.437 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:27:12.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:12.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:12.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:12.437 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4437 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:12.437 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4437 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:12.437 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4437 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:12.437 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4437 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:12.437 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4437 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:12.437 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4437 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:17.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:17.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:17.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:17.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:17.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:17.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:17.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:17.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:17.455 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:17.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:17.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:27:17.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:27:17.461 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:27:17.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:17.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:17.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:17.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:27:17.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:17.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:27:17.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:17.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:27:17.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:27:17.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:17.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:17.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:17.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:27:17.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:17.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:27:17.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:17.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:27:17.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:27:17.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:17.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:17.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:17.470 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:27:17.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:17.470 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:27:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:17.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:27:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:27:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:27:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:27:17.473 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:27:17.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:27:17.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:27:17.474 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:27:17.474 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:27:17.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:17.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:17.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:17.477 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:27:22.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:22.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:22.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:22.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:22.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:22.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:22.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:22.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:22.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:22.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:22.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:27:22.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:27:22.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:27:22.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:22.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:22.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:22.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:27:22.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:22.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:27:22.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:22.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:27:22.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:27:22.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:22.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:22.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:22.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:27:22.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:22.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:27:22.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:22.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:27:22.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:27:22.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:22.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:22.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:22.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:27:22.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:22.510 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:27:22.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:22.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:27:22.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:27:22.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:27:22.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:27:22.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:27:22.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:27:22.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:27:22.514 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:27:22.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:27:22.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:22.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:22.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:22.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:22.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:27:22.996 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:27:23.029 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:27:23.030 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:27:23.031 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:27:23.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:27:23.460 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:27:23.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:23.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:23.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:23.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:23.924 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:27:24.387 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:27:24.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:24.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:24.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:24.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:24.850 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:27:25.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:27:25.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:25.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:25.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:25.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:25.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:27:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:27:26.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:26.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:26.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:26.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:26.721 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:27:27.193 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:27:27.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:27.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:27.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:27.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:27.665 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:27:28.129 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:27:28.592 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:27:29.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:27:29.519 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:27:29.982 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:27:30.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:27:30.908 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:27:31.372 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:27:31.835 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:27:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:27:32.762 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:27:33.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:33.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:33.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:33.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:33.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:33.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:33.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:33.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:33.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:33.042 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:27:33.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:33.042 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:33.042 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:33.042 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:33.042 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:33.042 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:33.042 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:27:38.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:38.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:38.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:38.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:38.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:38.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:38.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:38.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:38.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:38.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:38.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:27:38.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:27:38.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:27:38.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:38.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:38.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:38.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:27:38.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:38.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:27:38.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:38.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:27:38.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:27:38.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:38.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:38.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:38.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:27:38.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:38.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:27:38.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:38.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:27:38.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:27:38.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:38.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:38.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:38.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:27:38.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:38.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:27:38.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:38.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:27:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:27:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:27:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:27:38.086 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:27:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:27:38.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:27:38.087 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:27:38.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:27:38.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:38.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:38.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:38.090 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:27:43.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:43.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:43.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:43.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:43.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:43.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:43.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:43.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:43.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:43.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:27:43.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:27:43.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:27:43.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:27:43.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:43.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:43.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:43.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:27:43.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:27:43.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:27:43.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:43.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:27:43.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:27:43.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:43.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:43.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:43.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:27:43.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:27:43.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:27:43.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:43.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:27:43.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:27:43.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:43.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:27:43.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:27:43.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:27:43.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:27:43.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:27:43.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:27:43.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:27:43.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:27:43.129 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:27:43.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:27:43.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:27:43.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:27:43.645 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:27:43.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:27:43.647 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:27:43.648 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:27:44.076 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:27:44.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:44.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:44.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:44.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:44.541 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:27:45.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:27:45.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:45.487 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:27:45.959 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:27:46.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:46.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:46.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:46.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:46.426 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:27:46.889 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:27:47.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:47.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:47.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:47.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:47.352 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:27:47.816 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:27:48.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:48.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:48.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:48.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:48.285 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:27:48.759 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:27:49.231 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:27:49.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:27:50.177 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:27:50.650 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:27:51.122 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:27:51.592 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:27:52.066 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:27:52.539 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:27:53.011 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:27:53.485 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:27:53.957 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:27:54.429 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:27:54.899 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:27:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:27:55.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:27:55.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:27:55.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:27:55.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:27:55.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:27:55.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:27:55.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:27:55.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:27:55.663 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:27:55.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:27:55.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:00.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:00.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:00.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:00.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:00.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:00.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:00.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:00.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:00.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:00.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:00.680 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:00.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:00.686 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:00.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:00.687 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:00.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:00.688 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:00.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:00.688 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:00.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:00.691 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:00.691 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:00.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:00.692 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:00.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:00.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:00.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:00.693 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:00.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:00.695 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:00.695 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:00.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:00.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:00.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:00.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:00.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:00.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:00.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:00.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:00.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:00.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:00.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:00.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:00.700 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:00.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:00.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:00.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:00.703 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:28:05.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:05.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:05.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:05.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:05.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:05.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:05.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:05.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:05.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:05.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:05.721 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:05.725 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:05.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:05.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:05.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:05.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:05.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:05.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:05.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:05.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:05.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:05.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:05.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:05.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:05.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:05.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:05.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:05.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:05.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:05.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:05.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:05.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:05.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:05.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:05.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:05.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:05.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:05.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:05.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:05.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:05.738 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:05.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:05.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:05.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:28:06.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:28:06.253 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:28:06.254 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:28:06.255 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:28:06.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:28:06.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:28:06.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:28:06.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:28:06.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:06.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:28:06.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:28:06.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:28:06.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:28:06.264 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:28:06.264 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:28:06.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:06.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:06.693 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:28:06.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:06.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:06.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:06.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:07.165 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:28:07.639 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:28:07.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:07.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:07.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:07.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:08.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:28:08.583 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:28:08.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:08.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:08.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:08.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:09.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:28:09.529 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:28:09.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:10.003 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:28:10.475 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:28:10.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:10.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:10.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:10.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:10.948 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:28:11.421 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:28:11.893 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:28:12.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:28:12.837 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:28:13.311 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:28:13.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:28:14.256 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:28:14.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:28:14.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:28:14.268 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:28:14.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:14.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:14.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:14.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:14.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:14.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:14.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:14.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:14.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:14.277 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:28:14.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:14.277 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:19.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:19.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:19.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:19.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:19.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:19.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:19.295 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:19.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:19.296 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:19.301 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:19.301 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:19.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:19.302 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:19.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:19.302 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:19.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:19.303 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:19.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:19.305 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:19.305 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:19.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:19.305 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:19.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:19.306 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:19.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:19.306 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:19.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:19.308 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:19.308 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:19.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:19.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:19.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:19.309 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:19.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:19.309 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:19.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.312 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:19.312 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:19.312 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:19.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:19.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:19.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:19.315 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:28:24.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:24.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:24.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:24.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:24.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:24.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:24.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:24.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:24.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:24.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:24.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:24.344 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:24.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:24.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:24.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:24.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:24.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:24.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:24.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:24.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:24.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:24.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:24.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:24.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:24.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:24.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:24.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:24.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:24.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:24.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:24.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:24.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:24.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:24.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:24.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:24.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:24.355 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:24.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:24.359 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:24.359 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:24.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:24.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:28:24.842 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:28:24.874 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:28:24.874 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:28:24.875 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:28:24.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:28:24.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:28:24.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:28:24.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:28:24.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:24.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:28:24.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:28:24.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:28:24.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:28:24.885 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:28:24.885 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:28:24.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:24.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:25.314 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:28:25.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:25.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:25.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:25.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:25.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:28:26.259 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:28:26.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:26.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:26.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:26.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:26.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:28:27.204 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:28:27.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:27.677 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:28:28.150 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:28:28.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:28.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:28.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:28.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:28.623 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:28:29.096 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:28:29.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:29.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:29.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:29.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:29.569 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:28:30.043 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:28:30.515 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:28:30.989 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:28:31.462 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:28:31.934 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:28:32.407 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:28:32.881 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:28:32.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:28:32.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:28:32.889 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:28:32.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:32.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:32.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:32.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:32.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:32.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:32.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:32.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:32.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:32.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:32.896 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:28:32.896 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:32.896 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:32.896 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:32.896 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:32.896 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:32.896 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:37.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:37.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:37.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:37.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:37.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:37.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:37.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:37.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:37.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:37.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:37.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:37.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:37.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:37.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:37.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:37.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:37.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:37.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:37.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:37.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:37.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:37.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:37.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:37.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:37.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:37.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:37.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:37.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:37.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:37.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:37.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:37.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:37.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:37.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:37.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:37.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:37.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:37.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:37.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:37.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:37.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:37.934 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:37.934 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:37.934 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:37.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:37.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:37.936 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:28:42.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:42.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:42.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:42.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:42.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:42.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:42.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:42.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:42.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:42.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:42.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:42.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:42.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:42.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:42.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:42.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:42.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:42.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:42.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:42.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:42.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:42.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:42.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:42.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:42.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:42.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:42.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:42.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:42.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:42.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:42.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:42.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:42.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:42.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:42.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:42.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:42.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:42.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:42.973 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:42.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:42.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:42.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:42.974 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:42.974 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:42.974 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:42.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:42.979 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:28:43.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:28:43.489 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:28:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:28:43.491 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:28:43.492 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:28:43.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:28:43.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:28:43.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:28:43.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:43.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:28:43.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:28:43.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:28:43.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:28:43.499 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:28:43.499 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:28:43.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:43.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:28:43.928 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:28:43.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:43.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:43.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:43.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:44.401 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:28:44.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:28:44.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:44.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:44.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:44.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:45.348 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:28:45.821 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:28:45.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:45.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:45.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:45.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:46.293 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:28:46.765 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:28:46.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:46.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:46.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:46.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:47.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:28:47.711 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:28:47.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:48.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:48.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:48.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:48.184 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:28:48.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:28:49.131 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:28:49.604 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:28:50.077 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:28:50.549 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:28:51.022 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:28:51.495 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:28:51.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:28:51.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:28:51.505 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:28:51.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:51.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:51.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:51.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:51.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:51.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:51.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:51.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:51.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:51.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:51.510 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:28:51.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:51.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:51.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:51.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:51.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:51.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:28:56.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:56.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:56.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:56.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:56.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:56.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:56.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:56.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:56.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:56.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:28:56.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:28:56.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:28:56.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:28:56.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:56.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:56.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:56.534 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:28:56.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:28:56.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:28:56.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:28:56.537 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:28:56.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:28:56.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:56.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:56.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:56.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:28:56.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:28:56.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:28:56.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:28:56.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:28:56.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:28:56.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:56.541 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:28:56.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:56.541 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:28:56.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:28:56.541 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:28:56.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:28:56.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:28:56.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:28:56.545 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:28:56.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:28:56.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:28:56.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:28:56.548 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:29:01.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:01.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:01.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:01.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:01.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:01.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:01.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:01.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:29:01.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:29:01.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:29:01.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:01.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:01.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:01.579 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:29:01.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:01.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:29:01.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:01.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:29:01.582 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:29:01.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:01.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:01.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:01.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:29:01.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:01.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:29:01.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:01.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:29:01.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:29:01.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:01.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:01.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:01.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:29:01.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:01.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:29:01.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:01.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:29:01.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:29:01.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:29:01.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:29:01.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:29:01.590 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:29:01.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:29:01.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:01.595 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:29:02.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:29:02.105 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:29:02.106 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:29:02.107 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:29:02.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:29:02.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:29:02.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:29:02.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:29:02.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:02.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:29:02.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:29:02.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:29:02.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:29:02.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:29:02.116 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:29:02.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:02.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:02.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:29:02.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:02.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:02.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:02.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:03.018 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:29:03.492 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:29:03.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:03.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:03.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:03.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:03.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:29:04.436 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:29:04.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:04.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:04.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:04.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:04.910 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:29:05.383 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:29:05.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:05.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:05.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:05.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:05.856 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:29:06.329 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:29:06.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:06.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:06.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:06.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:06.801 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:29:07.273 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:29:07.745 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:29:08.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:29:08.691 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:29:09.165 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:29:09.637 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:29:10.110 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:29:10.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:29:10.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:29:10.121 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:29:10.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:10.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:10.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:10.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:10.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:10.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:10.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:10.128 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:29:10.128 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:10.128 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:10.128 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:10.128 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:10.128 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:10.128 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:15.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:15.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:15.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:15.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:15.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:15.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:15.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:15.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:15.145 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:15.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:15.146 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:29:15.153 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:29:15.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:29:15.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:15.154 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:15.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:15.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:29:15.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:15.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:29:15.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:15.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:29:15.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:29:15.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:15.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:15.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:15.159 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:29:15.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:15.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:29:15.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:15.162 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:29:15.162 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:29:15.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:15.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:15.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:15.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:29:15.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:15.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:29:15.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:15.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:29:15.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:29:15.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:29:15.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:29:15.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:29:15.167 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:29:15.167 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:29:15.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:15.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:15.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:15.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:15.170 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:29:20.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:20.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:20.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:20.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:20.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:20.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:20.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:20.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:20.188 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:20.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:20.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:29:20.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:29:20.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:29:20.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:20.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:20.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:20.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:29:20.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:20.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:29:20.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:20.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:29:20.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:29:20.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:20.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:20.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:20.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:29:20.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:20.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:29:20.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:20.209 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:29:20.209 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:29:20.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:20.209 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:20.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:20.209 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:29:20.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:20.210 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:29:20.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:20.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:29:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:29:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:29:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:29:20.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:29:20.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:29:20.217 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:29:20.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:20.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:29:20.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:29:20.731 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:29:20.732 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:29:20.732 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:29:20.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:29:20.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:29:20.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:29:20.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:29:20.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:20.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:29:20.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:29:20.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:29:20.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:29:20.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:29:20.743 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:29:20.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:20.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:21.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:29:21.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:21.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:21.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:21.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:21.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:29:22.117 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:29:22.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:22.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:22.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:22.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:22.589 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:29:23.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:29:23.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:23.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:23.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:23.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:23.534 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:29:24.007 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:29:24.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:24.480 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:29:24.952 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:29:25.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:25.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:25.425 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:29:25.897 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:29:26.369 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:29:26.843 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:29:27.315 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:29:27.789 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:29:28.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:29:28.732 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:29:29.205 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:29:29.679 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:29:30.152 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:29:30.623 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:29:31.096 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:29:31.570 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:29:32.043 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:29:32.516 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:29:32.988 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:29:33.461 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:29:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:29:34.407 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:29:34.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:29:34.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:29:34.749 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:29:34.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:34.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:34.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:34.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:34.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:34.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:34.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:34.757 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:29:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:34.757 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:39.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:39.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:39.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:39.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:39.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:39.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:39.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:39.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:39.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:39.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:39.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:29:39.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:29:39.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:29:39.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:39.780 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:39.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:39.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:29:39.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:39.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:29:39.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:39.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:29:39.784 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:29:39.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:39.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:39.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:39.784 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:29:39.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:39.784 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:29:39.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:39.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:29:39.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:29:39.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:39.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:39.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:39.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:29:39.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:39.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:29:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:39.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:29:39.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:29:39.792 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:29:39.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:39.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:39.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:39.794 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:29:44.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:44.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:44.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:44.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:44.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:44.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:44.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:44.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:44.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:44.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:44.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:29:44.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:29:44.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:29:44.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:44.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:44.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:44.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:29:44.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:44.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:29:44.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:44.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:29:44.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:29:44.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:44.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:44.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:44.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:29:44.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:44.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:29:44.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:44.827 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:29:44.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:29:44.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:44.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:44.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:44.828 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:29:44.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:44.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:29:44.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:29:44.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:29:44.832 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:29:44.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:44.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:29:45.313 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:29:45.346 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:29:45.347 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:29:45.348 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:29:45.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:29:45.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:29:45.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:29:45.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:29:45.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:45.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:29:45.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:29:45.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:29:45.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:29:45.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:29:45.356 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:29:45.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:45.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:29:45.785 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:29:45.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:46.257 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:29:46.730 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:29:46.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:47.203 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:29:47.675 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:29:47.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:47.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:47.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:47.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:48.146 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:29:48.618 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:29:48.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:48.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:48.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:48.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:49.091 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:29:49.564 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:29:49.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:49.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:49.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:49.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:50.036 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:29:50.510 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:29:50.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:29:51.454 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:29:51.927 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:29:52.400 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:29:52.874 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:29:53.347 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:29:53.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:29:53.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:29:53.361 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:29:53.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:53.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:53.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:53.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:53.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:53.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:53.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:53.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:53.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:53.366 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:29:53.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:53.366 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:53.366 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:53.366 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:53.366 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:29:58.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:58.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:58.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:58.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:58.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:58.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:58.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:58.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:58.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:58.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:29:58.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:29:58.392 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:29:58.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:29:58.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:58.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:58.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:58.394 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:29:58.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:29:58.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:29:58.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:29:58.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:29:58.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:29:58.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:58.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:58.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:58.400 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:29:58.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:29:58.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:29:58.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:29:58.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:29:58.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:29:58.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:58.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:29:58.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:58.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:29:58.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:29:58.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:29:58.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:29:58.407 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:29:58.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:29:58.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:29:58.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:29:58.407 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:29:58.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:29:58.408 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:29:58.408 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:29:58.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:29:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:29:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:29:58.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:29:58.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:29:58.411 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:30:03.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:03.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:03.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:03.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:03.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:03.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:03.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:03.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:03.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:03.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:03.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:30:03.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:30:03.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:30:03.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:03.432 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:03.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:03.433 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:30:03.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:03.433 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:30:03.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:03.435 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:30:03.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:30:03.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:03.436 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:03.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:03.436 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:30:03.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:03.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:30:03.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:03.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:30:03.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:30:03.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:03.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:03.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:03.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:30:03.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:03.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:30:03.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:30:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:30:03.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:30:03.443 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:30:03.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:03.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:30:03.918 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:30:03.964 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:30:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:30:03.968 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:30:03.971 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:30:03.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:30:03.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:30:03.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:30:03.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:30:03.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:30:03.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:30:03.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:30:03.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:30:04.387 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:30:04.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:04.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:04.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:04.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:04.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:30:05.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:30:05.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:05.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:05.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:05.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:05.781 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:30:06.248 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:30:06.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:06.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:06.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:06.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:06.720 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:30:07.192 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:30:07.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:07.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:07.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:07.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:07.664 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:30:08.135 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:30:08.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:08.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:08.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:08.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:08.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:30:09.076 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:30:09.547 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:30:10.018 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:30:10.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:30:10.955 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:30:11.429 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:30:11.901 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:30:12.371 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:30:12.840 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:30:13.309 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:30:13.780 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:30:14.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:30:14.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:30:14.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:14.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:14.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:14.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:14.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:14.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:14.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:14.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:14.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:14.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:14.033 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:30:14.033 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.034 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:14.035 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:19.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:19.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:19.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:19.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:19.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:19.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:19.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:19.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:19.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:19.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:19.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:30:19.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:30:19.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:30:19.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:19.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:19.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:19.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:30:19.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:19.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:30:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:19.055 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:30:19.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:30:19.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:19.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:19.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:19.057 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:30:19.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:19.057 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:30:19.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:19.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:30:19.059 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:30:19.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:19.059 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:19.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:19.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:30:19.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:19.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:30:19.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:19.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:30:19.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:30:19.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:30:19.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:30:19.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:30:19.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:30:19.063 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:30:19.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:30:19.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:19.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:19.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:19.066 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:30:24.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:24.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:24.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:24.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:24.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:24.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:24.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:24.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:24.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:24.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:24.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:30:24.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:30:24.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:30:24.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:24.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:24.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:24.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:30:24.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:24.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:30:24.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:24.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:30:24.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:30:24.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:24.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:24.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:24.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:30:24.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:24.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:30:24.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:24.104 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:30:24.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:30:24.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:24.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:24.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:24.105 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:30:24.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:24.105 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:30:24.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:30:24.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:30:24.110 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:30:24.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:24.114 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:30:24.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:30:24.634 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:30:24.636 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:30:24.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:30:24.637 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:30:24.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:30:24.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:30:24.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:30:24.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:30:24.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:30:24.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:30:24.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:30:24.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:30:24.676 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:30:24.676 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-02 03:30:24.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:30:24.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:30:25.054 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:30:25.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:25.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:25.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:25.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:25.524 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:30:25.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:30:26.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:26.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:26.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:26.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:26.464 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:30:26.936 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:30:27.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:27.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:27.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:27.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:27.408 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:30:27.880 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:30:28.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:28.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:28.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:28.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:28.349 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:30:28.812 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:30:29.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:29.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:29.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:29.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:29.281 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:30:29.745 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:30:30.209 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:30:30.673 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:30:31.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:30:31.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:30:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:30:32.535 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:30:33.000 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:30:33.468 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:30:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:30:34.398 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:30:34.863 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:30:35.328 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:30:35.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:30:35.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:30:35.682 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:30:35.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:35.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:35.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:35.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:35.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:35.686 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:30:35.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:35.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:40.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:40.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:40.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:40.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:40.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:40.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:40.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:40.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:40.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:40.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:40.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:30:40.712 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:30:40.712 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:30:40.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:40.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:40.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:40.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:30:40.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:40.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:30:40.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:40.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:30:40.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:30:40.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:40.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:40.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:40.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:30:40.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:40.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:30:40.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:40.722 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:30:40.722 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:30:40.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:40.722 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:40.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:40.722 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:30:40.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:40.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:30:40.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:30:40.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:30:40.727 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:30:40.727 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:30:40.727 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:40.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:40.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:40.729 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:30:45.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:45.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:45.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:45.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:45.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:45.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:45.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:45.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:45.743 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:45.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:30:45.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:45.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:30:45.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:30:45.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:45.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:30:45.747 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:30:45.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:45.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:45.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:45.747 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:30:45.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:30:45.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:30:45.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:45.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:30:45.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:30:45.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:45.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:30:45.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:45.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:30:45.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:30:45.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:30:45.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:30:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:30:45.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:30:45.755 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:30:45.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:30:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:30:45.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:30:46.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:30:46.276 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:30:46.277 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:30:46.277 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:30:46.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:30:46.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:30:46.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:46.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:46.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:46.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:47.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:30:47.613 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:30:47.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:47.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:47.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:47.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:48.077 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:30:48.540 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:30:48.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:48.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:48.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:48.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:49.004 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:30:49.468 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:30:49.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:49.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:49.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:49.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:49.931 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:30:50.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:30:50.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:50.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:50.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:50.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:50.858 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:30:51.321 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:30:51.785 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:30:52.252 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:30:52.719 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:30:53.183 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:30:53.648 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:30:54.121 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:30:54.593 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:30:55.067 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:30:55.539 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:30:56.011 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:30:56.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:30:56.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:30:56.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:30:56.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:30:56.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:30:56.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:30:56.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:30:56.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:30:56.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:30:56.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:30:56.289 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:30:56.289 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:56.289 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:56.289 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:56.289 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:56.289 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:30:56.289 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:01.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:01.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:01.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:01.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:01.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:01.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:01.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:01.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:01.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:01.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:01.313 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:31:01.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:31:01.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:31:01.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:01.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:01.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:01.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:31:01.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:01.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:31:01.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:01.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:31:01.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:31:01.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:01.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:01.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:01.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:31:01.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:01.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:31:01.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:01.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:31:01.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:31:01.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:01.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:01.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:01.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:31:01.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:01.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:31:01.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:01.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:31:01.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:31:01.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:31:01.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:31:01.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:31:01.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:31:01.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:31:01.331 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:31:01.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:31:01.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:01.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:01.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:01.333 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:31:06.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:06.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:06.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:06.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:06.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:06.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:06.351 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:06.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:06.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:31:06.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:31:06.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:31:06.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:06.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:06.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:06.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:31:06.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:06.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:31:06.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:06.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:31:06.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:31:06.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:06.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:06.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:06.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:31:06.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:06.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:31:06.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:06.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:31:06.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:31:06.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:06.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:06.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:06.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:31:06.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:06.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:31:06.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:06.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:31:06.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:31:06.372 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:31:06.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:06.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:31:06.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:31:06.888 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:31:06.889 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:31:06.890 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:31:06.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:31:07.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:31:07.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:07.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:07.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:07.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:07.780 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:31:08.244 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:31:08.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:08.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:08.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:08.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:08.707 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:31:09.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:31:09.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:09.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:09.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:09.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:09.634 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:31:10.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:31:10.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:10.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:31:11.024 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:31:11.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:11.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:11.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:11.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:11.489 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:31:11.962 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:31:12.436 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:31:12.909 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:31:13.384 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:31:13.858 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:31:14.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:31:14.806 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:31:15.279 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:31:15.753 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:31:16.227 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:31:16.699 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:31:17.170 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:31:17.642 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:31:18.116 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:31:18.589 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:31:18.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:18.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:18.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:18.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:18.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:18.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:18.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:18.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:18.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:18.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:18.903 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:31:18.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:18.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:18.903 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:18.904 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:18.904 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:18.904 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:23.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:23.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:23.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:23.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:23.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:23.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:23.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:23.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:23.920 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:23.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:23.920 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:31:23.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:31:23.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:31:23.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:23.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:23.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:23.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:31:23.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:23.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:31:23.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:23.927 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:31:23.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:31:23.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:23.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:23.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:23.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:31:23.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:23.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:31:23.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:23.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:31:23.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:31:23.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:23.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:23.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:23.931 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:31:23.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:23.931 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:31:23.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:31:23.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:31:23.935 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:31:23.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:23.939 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:31:24.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:31:24.458 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:31:24.460 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:31:24.462 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:31:24.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:31:24.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:31:24.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:31:24.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:31:24.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:31:24.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:31:24.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:31:24.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:31:24.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:31:24.873 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:31:24.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:24.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:24.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:24.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:25.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:31:25.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:31:25.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:25.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:31:26.745 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:31:26.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:26.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:26.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:26.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:27.211 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:31:27.681 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:31:27.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:27.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:27.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:27.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:28.145 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:31:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:31:28.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:29.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:31:29.551 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:31:30.016 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:31:30.485 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:31:30.951 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:31:31.419 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:31:31.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:31:32.355 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:31:32.823 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:31:33.289 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:31:33.759 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:31:34.227 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:31:34.693 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:31:35.159 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:31:35.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:31:35.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:31:35.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:35.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:35.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:35.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:35.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:35.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:35.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:35.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:35.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:35.517 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:31:35.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2525 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2526 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.518 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:35.519 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2527 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:40.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:40.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:40.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:40.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:40.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:40.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:40.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:40.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:40.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:40.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:31:40.524 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:31:40.528 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:31:40.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:31:40.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:40.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:40.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:40.529 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:31:40.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:31:40.529 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:31:40.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:40.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:31:40.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:31:40.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:40.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:40.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:40.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:31:40.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:31:40.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:31:40.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:40.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:31:40.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:31:40.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:40.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:31:40.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:40.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:31:40.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:31:40.540 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:31:40.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:31:40.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:31:40.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:31:40.545 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:31:40.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:31:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:31:40.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:31:41.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:31:41.066 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:31:41.067 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:31:41.067 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:31:41.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:31:41.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:31:41.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:31:41.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:31:41.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:31:41.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:31:41.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:31:41.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:31:41.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:31:41.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:31:41.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:41.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:41.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:41.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:41.965 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:31:42.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:31:42.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:42.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:42.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:42.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:42.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:31:43.380 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:31:43.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:43.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:43.853 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:31:44.325 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:31:44.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:44.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:44.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:44.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:44.796 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:31:45.267 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:31:45.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:45.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:45.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:45.737 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:31:46.210 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:31:46.683 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:31:47.155 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:31:47.626 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:31:48.100 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:31:48.572 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:31:49.044 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:31:49.515 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:31:49.986 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:31:50.457 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:31:50.927 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:31:51.398 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:31:51.869 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:31:52.342 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:31:52.815 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:31:53.287 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:31:53.758 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:31:54.228 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:31:54.699 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:31:55.170 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:31:55.640 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:31:56.108 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:31:56.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:31:56.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:31:56.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:31:56.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:31:56.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:31:56.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:31:56.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:31:56.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:31:56.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:31:56.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:31:56.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:31:56.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:31:56.136 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.137 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3373 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.138 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:31:56.139 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3374 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:01.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:01.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:01.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:01.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:01.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:01.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:01.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:01.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:01.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:01.145 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:32:01.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:32:01.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:32:01.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:01.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:01.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:01.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:32:01.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:01.154 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:32:01.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:01.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:32:01.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:32:01.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:01.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:01.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:01.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:32:01.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:01.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:32:01.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:01.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:32:01.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:32:01.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:01.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:01.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:01.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:32:01.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:01.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:32:01.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:01.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:32:01.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:32:01.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:32:01.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:32:01.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:32:01.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:32:01.172 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:32:01.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:01.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:32:01.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:32:01.691 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:32:01.693 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:32:01.695 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:32:01.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:01.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:01.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:01.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:01.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:01.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:01.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:01.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:01.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:01.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:01.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:01.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:01.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:01.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:01.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:01.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:01.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:01.769 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:32:01.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.770 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.771 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.772 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.772 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:01.772 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:06.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:06.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:06.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:06.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:06.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:06.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:06.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:06.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:06.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:06.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:06.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:32:06.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:32:06.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:32:06.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:06.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:06.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:06.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:32:06.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:06.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:32:06.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:06.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:32:06.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:32:06.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:06.787 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:06.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:06.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:32:06.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:06.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:32:06.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:06.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:32:06.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:32:06.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:06.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:06.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:06.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:32:06.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:06.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:32:06.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:32:06.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:32:06.794 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:32:06.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:06.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:32:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:32:07.318 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:32:07.320 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:32:07.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:07.322 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:32:07.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:07.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:07.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:07.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:07.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:07.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:07.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:07.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:07.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:07.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:07.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:07.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:07.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:07.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:07.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:07.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:07.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:32:07.596 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:32:07.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:32:07.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:07.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.786 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:32:07.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:07.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:07.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:07.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:07.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:07.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:07.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:07.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:07.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:07.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:07.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:07.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:07.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:07.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:07.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:07.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:07.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:08.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:08.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:08.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:08.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:08.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:08.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:08.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:08.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:08.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:08.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:08.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:08.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:08.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:08.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:08.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:08.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:08.201 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:32:08.205 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:32:08.206 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:32:08.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:08.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:08.669 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:32:08.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:08.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:08.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:08.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:08.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:08.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:08.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:08.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:08.992 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:32:09.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:09.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:09.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:09.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:09.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:09.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:09.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:09.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:09.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:09.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:09.017 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.018 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:09.019 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:14.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:14.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:14.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:14.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:14.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:14.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:14.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:14.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:14.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:14.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:14.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:32:14.030 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:32:14.031 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:32:14.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:14.031 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:14.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:14.032 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:32:14.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:14.032 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:32:14.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:14.036 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:32:14.036 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:32:14.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:14.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:14.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:32:14.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:14.037 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:32:14.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:14.039 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:32:14.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:32:14.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:14.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:14.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:14.040 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:32:14.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:14.040 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:32:14.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:14.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:32:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:32:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:32:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:32:14.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:32:14.044 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:32:14.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:14.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:32:14.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:32:14.565 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:32:14.567 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:32:14.568 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:32:14.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:14.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:14.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:14.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:14.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:14.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:14.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:14.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:14.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:14.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:14.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:14.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:14.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:14.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:14.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:14.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:14.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:32:15.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:15.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:15.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:15.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:15.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:32:15.930 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:32:16.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:16.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:16.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:16.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:16.403 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:32:16.875 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:32:17.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:17.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:17.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:17.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:17.348 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:32:17.819 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:32:18.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:18.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:18.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:18.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:18.289 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:32:18.760 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:32:19.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:19.231 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:32:19.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:19.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:19.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:19.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:19.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:19.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:19.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:19.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:19.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:19.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:19.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:19.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:19.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:19.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:19.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:19.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:19.704 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:32:19.747 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:32:19.747 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:32:19.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:19.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:20.177 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:32:20.651 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:32:21.124 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:32:21.597 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:32:22.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:32:22.540 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:32:23.012 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:32:23.484 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:32:23.954 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:32:24.425 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:32:24.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:24.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:24.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:24.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:24.757 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:32:24.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:24.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:24.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:24.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:24.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:24.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:24.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:24.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:24.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:24.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:24.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:24.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:24.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:24.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:24.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:24.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:24.894 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:32:25.367 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:32:25.839 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:32:26.311 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:32:26.783 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:32:27.250 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:32:27.723 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:32:28.194 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:32:28.664 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:32:29.137 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:32:29.609 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:32:29.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:29.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:29.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:29.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:29.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:29.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:29.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:29.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:29.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:29.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:29.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:29.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:29.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:29.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:29.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:29.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:29.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:32:29.841 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:32:29.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:29.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:30.079 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:32:30.552 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:32:31.025 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:32:31.498 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:32:31.971 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:32:32.443 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:32:32.916 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:32:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:32:33.862 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:32:34.335 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:32:34.806 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:32:34.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:34.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:34.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:34.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:34.851 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:32:34.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:34.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:34.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:34.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:34.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:34.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:34.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:34.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:34.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:34.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:34.872 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:34.872 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4504 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:32:39.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:32:39.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:32:39.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:39.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:39.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:39.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:39.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:32:39.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:39.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:39.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:32:39.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:32:39.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:32:39.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:32:39.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:39.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:39.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:32:39.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:32:39.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:32:39.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:32:39.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:39.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:32:39.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:32:39.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:39.893 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:32:39.893 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:32:39.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:32:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:32:39.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:32:39.901 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:32:39.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:32:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:32:39.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:32:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:32:39.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:32:40.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:32:40.425 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:32:40.429 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:32:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:40.430 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:32:40.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:40.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:40.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:40.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:40.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:40.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:40.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:40.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:40.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:40.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:40.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:40.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:40.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:40.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:40.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:40.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:40.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:32:40.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:40.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:40.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:40.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:41.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:32:41.786 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:32:41.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:41.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:41.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:41.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:42.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:32:42.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:32:42.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:42.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:42.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:42.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:43.201 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:32:43.674 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:32:43.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:43.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:43.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:43.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:44.146 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:32:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:32:44.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:32:44.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:32:44.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:32:44.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:32:45.090 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:32:45.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:45.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:45.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:45.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:45.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:45.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:45.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:45.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:45.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:45.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:45.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:45.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:45.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:45.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:45.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:45.553 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:32:45.553 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:32:45.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:45.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:45.563 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:32:46.035 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:32:46.507 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:32:46.980 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:32:47.453 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:32:47.921 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:32:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:32:48.853 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:32:49.325 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:32:49.799 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:32:50.271 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:32:50.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:50.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:50.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:50.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:50.561 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:32:50.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:50.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:50.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:50.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:50.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:50.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:50.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:50.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:50.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:50.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:50.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:50.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:50.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:50.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:50.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:50.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:50.742 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:32:51.213 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:32:51.683 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:32:52.154 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:32:52.624 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:32:53.096 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:32:53.566 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:32:54.037 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:32:54.508 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:32:54.981 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:32:55.454 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:32:55.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:55.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:55.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:55.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:55.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:55.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:55.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:55.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:32:55.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:32:55.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:32:55.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:32:55.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:55.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:32:55.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:32:55.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:32:55.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:32:55.636 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:32:55.636 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:32:55.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:55.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:32:55.925 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:32:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:32:56.856 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:32:57.326 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:32:57.797 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:32:58.271 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:32:58.743 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:32:59.216 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:32:59.689 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:33:00.162 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:33:00.633 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:33:00.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:00.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:00.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:00.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:00.646 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:33:00.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:00.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:00.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:00.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:00.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:00.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:00.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:33:00.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:33:00.658 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:33:00.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:00.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:05.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:33:05.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:33:05.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:05.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:05.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:05.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:05.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:05.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:33:05.674 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:05.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:33:05.674 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:33:05.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:33:05.679 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:33:05.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:33:05.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:05.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:05.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:33:05.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:33:05.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:33:05.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:05.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:33:05.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:33:05.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:33:05.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:05.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:05.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:33:05.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:33:05.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:33:05.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:05.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:33:05.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:33:05.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:33:05.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:05.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:05.687 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:33:05.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:33:05.687 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:33:05.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:33:05.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:33:05.691 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:33:05.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:05.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:33:06.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:33:06.220 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:33:06.222 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:33:06.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:06.223 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:33:06.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:06.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:06.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:06.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:06.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:06.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:06.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:06.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:06.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:06.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:06.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:06.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:06.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:06.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:06.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:06.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:06.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:33:06.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:06.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:06.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:06.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:07.092 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:33:07.563 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:33:07.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:07.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:07.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:07.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:08.031 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:33:08.497 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:33:08.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:08.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:08.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:08.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:08.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:33:09.434 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:33:09.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:09.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:09.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:09.901 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:33:10.370 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:33:10.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:10.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:10.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:10.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:10.836 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:33:11.304 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:33:11.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:11.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:11.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:11.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:11.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:11.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:11.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:11.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:11.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:11.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:11.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:11.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:11.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:11.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:11.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:11.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:11.345 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:33:11.345 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:33:11.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:11.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:11.769 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:33:12.235 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:33:12.702 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:33:13.175 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:33:13.649 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:33:14.123 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:33:14.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:33:15.073 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:33:15.547 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:33:16.018 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:33:16.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:16.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:16.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:16.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:16.355 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:33:16.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:16.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:16.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:16.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:16.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:16.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:16.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:16.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:16.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:16.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:16.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:16.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:16.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:16.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:33:16.966 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:33:17.436 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:33:17.906 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:33:18.376 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:33:18.844 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:33:19.310 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:33:19.779 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:33:20.248 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:33:20.716 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:33:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:33:21.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:21.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:21.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:21.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:21.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:21.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:21.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:21.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:21.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:21.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:21.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:21.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:21.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:21.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:21.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:21.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:21.467 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:33:21.467 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:33:21.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:21.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:21.655 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:33:22.120 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:33:22.591 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:33:23.058 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:33:23.527 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:33:23.996 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:33:24.460 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:33:24.924 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:33:25.395 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:33:25.861 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:33:26.327 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:33:26.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:26.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:26.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:26.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:26.479 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:33:26.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:26.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:26.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:26.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:26.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:26.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:33:26.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:33:26.506 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:33:26.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:26.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:26.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:26.507 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4526 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.507 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4526 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.507 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4526 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.507 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4526 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4526 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.508 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4527 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.509 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4528 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4529 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4529 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.510 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4529 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4529 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:26.511 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4529 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:31.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:33:31.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:33:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:31.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:31.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:31.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:33:31.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:31.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:33:31.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:33:31.522 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:33:31.522 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:33:31.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:33:31.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:31.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:31.523 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:33:31.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:33:31.524 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:33:31.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:31.526 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:33:31.526 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:33:31.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:33:31.526 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:31.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:31.526 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:33:31.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:33:31.527 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:33:31.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:31.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:33:31.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:33:31.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:33:31.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:31.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:31.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:33:31.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:33:31.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:33:31.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:33:31.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:33:31.534 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:33:31.534 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:33:31.534 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:33:31.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:31.539 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:33:32.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:33:32.060 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:33:32.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:32.063 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:33:32.067 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:33:32.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:32.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:32.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:32.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:32.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:32.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:32.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:32.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:32.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:32.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:32.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:32.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:32.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:32.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:32.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:32.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:32.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:33:32.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:32.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:32.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:32.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:32.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:33:33.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:33:33.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:33.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:33.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:33.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:33.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:33:34.347 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:33:34.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:34.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:34.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:34.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:34.814 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:33:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:33:35.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:35.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:35.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:35.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:35.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:33:36.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:33:36.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:36.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:36.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:36.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:36.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:33:37.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:37.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:37.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:37.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:37.156 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:33:37.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:37.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:37.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:37.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:37.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:37.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:37.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:37.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:37.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:37.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:37.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:37.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:37.201 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:33:37.201 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:33:37.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:37.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:37.623 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:33:38.094 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:33:38.564 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:33:39.031 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:33:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:33:39.974 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:33:40.440 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:33:40.911 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:33:41.382 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:33:41.847 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:33:42.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:42.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:42.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:42.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:42.210 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:33:42.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:42.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:42.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:42.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:42.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:42.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:42.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:42.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:42.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:42.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:42.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:42.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:42.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:42.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:42.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:42.315 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:33:42.782 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:33:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:33:43.714 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:33:44.181 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:33:44.646 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:33:45.113 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:33:45.579 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:33:46.045 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:33:46.517 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:33:46.989 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:33:47.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:47.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:47.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:47.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:47.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:47.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:47.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:47.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:47.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:47.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:47.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:47.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:47.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:47.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:47.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:47.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:47.313 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:33:47.313 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:33:47.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:47.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:47.461 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:33:47.935 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:33:48.410 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:33:48.886 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:33:49.361 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:33:49.836 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:33:50.304 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:33:50.777 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:33:51.252 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:33:51.725 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:33:52.196 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:33:52.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:52.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:52.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:52.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:52.323 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:33:52.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:52.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:52.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:52.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:52.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:52.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:52.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:33:52.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:33:52.335 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:52.335 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:33:57.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:33:57.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:33:57.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:57.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:57.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:57.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:57.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:33:57.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:33:57.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:57.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:33:57.365 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:33:57.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:33:57.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:33:57.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:33:57.373 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:57.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:33:57.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:33:57.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:33:57.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:33:57.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:57.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:33:57.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:33:57.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:33:57.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:57.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:33:57.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:33:57.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:33:57.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:33:57.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:57.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:33:57.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:33:57.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:33:57.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:33:57.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:33:57.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:33:57.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:33:57.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:33:57.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:57.385 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:33:57.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:33:57.387 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:33:57.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:33:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:33:57.391 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:33:57.861 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:33:57.910 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:33:57.912 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:33:57.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:57.914 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:33:57.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:57.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:57.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:57.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:57.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:57.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:57.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:57.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:57.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:57.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:57.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:58.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:58.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:58.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:58.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:58.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:58.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:58.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:58.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:58.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:58.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:58.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:58.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:58.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:58.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:58.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:58.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:58.280 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:33:58.280 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:33:58.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.328 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:33:58.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:58.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:58.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:58.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:58.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:58.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:58.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:58.660 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:33:58.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:58.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:58.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:58.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:58.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:58.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:58.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:58.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:58.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:58.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:58.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:58.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:58.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:58.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:58.800 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:33:59.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:33:59.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:33:59.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:33:59.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:33:59.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:33:59.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:59.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:59.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:59.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:59.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:59.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:59.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:33:59.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:33:59.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:33:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:33:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:59.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:33:59.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:33:59.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:33:59.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:33:59.504 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:33:59.505 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:33:59.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:59.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:33:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:34:00.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:00.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:00.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:00.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:00.059 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:34:00.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:00.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:00.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:00.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:00.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:34:00.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:34:00.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:34:00.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:34:00.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:34:00.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:34:00.075 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:34:00.075 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.075 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:00.076 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:34:05.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:34:05.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:34:05.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:34:05.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:34:05.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:34:05.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:34:05.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:34:05.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:34:05.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:34:05.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:34:05.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:34:05.096 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:34:05.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:34:05.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:34:05.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:34:05.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:34:05.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:34:05.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:34:05.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:34:05.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:05.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:34:05.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:34:05.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:34:05.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:34:05.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:34:05.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:34:05.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:34:05.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:34:05.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:05.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:34:05.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:34:05.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:34:05.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:34:05.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:34:05.107 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:34:05.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:34:05.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:34:05.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:05.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:34:05.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:34:05.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:34:05.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:34:05.111 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:34:05.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.112 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:34:05.112 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:34:05.112 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:34:05.113 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:34:05.117 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:34:05.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:34:05.632 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:34:05.634 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:34:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:05.635 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:34:05.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:05.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:05.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:34:05.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:05.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:05.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:34:05.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:05.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:05.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:34:05.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:34:05.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:34:05.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:34:05.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:34:05.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:34:05.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:05.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:06.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:34:06.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:06.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:06.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:06.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:06.525 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:34:06.993 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:34:07.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:07.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:07.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:07.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:07.460 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:34:07.929 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:34:08.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:08.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:08.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:08.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:08.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:34:08.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:34:09.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:09.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:09.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:09.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:09.334 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:34:09.806 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:34:10.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:34:10.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:34:10.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:34:10.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:34:10.277 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:34:10.747 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:34:11.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:34:11.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:34:12.149 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:34:12.617 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:34:13.084 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:34:13.550 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:34:14.017 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:34:14.482 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:34:14.948 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:34:15.414 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:34:15.881 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:34:16.348 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:34:16.818 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:34:17.290 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:34:17.764 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:34:18.235 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:34:18.706 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:34:19.175 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:34:19.643 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:34:20.112 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:34:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:34:21.044 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:34:21.511 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:34:21.979 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:34:22.447 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:34:22.916 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:34:23.384 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:34:23.850 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:34:24.321 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:34:24.789 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:34:25.258 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:34:25.727 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:34:25.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:25.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:25.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:25.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:25.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:25.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:25.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:34:25.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:25.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:25.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:34:25.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:25.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:25.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:34:25.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:34:25.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:34:25.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:34:25.770 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:34:25.770 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:34:25.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:25.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:26.195 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:34:26.663 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:34:27.133 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:34:27.605 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:34:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:34:28.545 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:34:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:34:29.489 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:34:29.960 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:34:30.434 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:34:30.907 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:34:31.374 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:34:31.842 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:34:32.314 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:34:32.785 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:34:33.256 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:34:33.729 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:34:34.203 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:34:34.674 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:34:35.144 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:34:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:34:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:34:36.560 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:34:37.028 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:34:37.494 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:34:37.960 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:34:38.426 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:34:38.892 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:34:39.362 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:34:39.829 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:34:40.296 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:34:40.763 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:34:41.236 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:34:41.710 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 03:34:42.183 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 03:34:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 03:34:43.126 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 03:34:43.599 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 03:34:44.072 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 03:34:44.539 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 03:34:45.007 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 03:34:45.477 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 03:34:45.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:45.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:45.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:45.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:45.778 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:34:45.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:45.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:45.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:34:45.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:34:45.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:34:45.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:34:45.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:34:45.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:45.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:34:45.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:34:45.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:34:45.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:34:45.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:34:45.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:34:45.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:45.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:34:45.943 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 03:34:46.409 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 03:34:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 03:34:47.342 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 03:34:47.813 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 03:34:48.283 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 03:34:48.749 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 03:34:49.216 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 03:34:49.687 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 03:34:50.161 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 03:34:50.636 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 03:34:51.104 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 03:34:51.571 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 03:34:52.039 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 03:34:52.505 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 03:34:52.974 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 03:34:53.446 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 03:34:53.918 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 03:34:54.392 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 03:34:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 03:34:55.341 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 03:34:55.815 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 03:34:56.289 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 03:34:56.764 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 03:34:57.236 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 03:34:57.702 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 03:34:58.170 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 03:34:58.642 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 03:34:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 03:34:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 03:35:00.053 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 03:35:00.524 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 03:35:00.989 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 03:35:01.456 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 03:35:01.924 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 03:35:02.390 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 03:35:02.860 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 03:35:03.333 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 03:35:03.807 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 03:35:04.282 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 03:35:04.756 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 03:35:05.225 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 03:35:05.691 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 03:35:05.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:05.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:05.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:05.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:05.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:05.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:05.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:05.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:05.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:05.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:05.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:05.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:05.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:05.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:05.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:05.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:05.924 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:05.925 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:35:05.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:05.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:06.157 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 03:35:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 03:35:07.099 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 03:35:07.574 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 03:35:08.048 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 03:35:08.522 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 03:35:08.988 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 03:35:09.460 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 03:35:09.935 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 03:35:10.402 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 03:35:10.875 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 03:35:11.346 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 03:35:11.818 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 03:35:12.288 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 03:35:12.758 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 03:35:13.229 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 03:35:13.697 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 03:35:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 03:35:14.634 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 03:35:15.099 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 03:35:15.563 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 03:35:16.029 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 03:35:16.498 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 03:35:16.963 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 03:35:17.430 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 03:35:17.904 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 03:35:18.379 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 03:35:18.853 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 03:35:19.328 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 03:35:19.803 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 03:35:20.278 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 03:35:20.748 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 03:35:21.210 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 03:35:21.676 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 03:35:22.143 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 03:35:22.611 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 03:35:23.080 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 03:35:23.552 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 03:35:24.019 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 03:35:24.486 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 03:35:24.955 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 03:35:25.426 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 03:35:25.893 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 03:35:25.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:25.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:25.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:25.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:25.932 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:25.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:25.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:25.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:25.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:25.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:25.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:25.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:35:25.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:35:25.943 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:35:25.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:25.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:30.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:35:30.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:35:30.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:30.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:30.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:30.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:30.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:30.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:35:30.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:30.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:35:30.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:35:30.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:35:30.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:35:30.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:35:30.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:30.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:30.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:35:30.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:35:30.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:35:30.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:30.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:35:30.965 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:35:30.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:35:30.966 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:30.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:30.966 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:35:30.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:35:30.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:35:30.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:30.968 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:35:30.968 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:35:30.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:35:30.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:30.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:30.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:35:30.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:35:30.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:35:30.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:30.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:35:30.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:35:30.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:35:30.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:35:30.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:35:30.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:35:30.973 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:35:30.973 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:35:30.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:35:30.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:35:30.976 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:30.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:35.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:35:35.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:35:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:35.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:35.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:35.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:35:35.993 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:35.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:35:35.994 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:35:35.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:35:35.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:35:35.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:35:35.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:35.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:36.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:35:36.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:35:36.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:35:36.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:36.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:35:36.002 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:35:36.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:35:36.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:36.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:36.003 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:35:36.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:35:36.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:35:36.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:36.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:35:36.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:35:36.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:35:36.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:36.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:36.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:35:36.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:35:36.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:35:36.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:35:36.010 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:35:36.010 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:35:36.010 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:36.014 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:35:36.485 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:35:36.530 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:35:36.532 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:35:36.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:36.534 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:35:36.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:36.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:36.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:36.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:36.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:36.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:36.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:36.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:36.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:36.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:36.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:36.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:36.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:36.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:36.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:36.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:36.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:36.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:36.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:36.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:36.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:36.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:36.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:36.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:36.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:36.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:36.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:36.952 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:35:37.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:37.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:37.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:37.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:37.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:37.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:37.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:37.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:37.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:37.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:37.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:37.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:37.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:37.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:37.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:37.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:37.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:37.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:37.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:37.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:37.371 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:37.371 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:35:37.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:35:37.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:37.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.682 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:37.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:37.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:37.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:37.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:37.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:37.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:37.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:37.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:37.750 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:37.750 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:35:37.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:37.891 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:35:38.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:38.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:38.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:38.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:38.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:38.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:38.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:38.035 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:38.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:38.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:38.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:38.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:38.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:38.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:38.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:38.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:38.071 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:38.071 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:35:38.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:38.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:35:38.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:38.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:38.359 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:38.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:38.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:38.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:38.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:38.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:38.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:38.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:38.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:38.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:38.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:38.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:38.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:38.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:38.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:38.824 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:35:39.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:39.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:39.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:39.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:39.290 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:35:39.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:35:40.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:40.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:40.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:40.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:40.235 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:35:40.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:35:40.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:40.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:40.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:40.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:40.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:40.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:40.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:40.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:40.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:40.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:40.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:40.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:40.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:40.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:40.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:40.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:40.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:41.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:41.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:41.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:41.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:41.181 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:35:41.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:35:42.129 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:35:42.604 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:35:43.078 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:35:43.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:43.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:43.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:43.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:43.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:43.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:43.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:43.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:43.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:43.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:43.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:43.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:43.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:43.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:43.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:43.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:43.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:43.547 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:35:44.018 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:35:44.487 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:35:44.960 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:35:45.429 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:35:45.896 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:35:46.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:46.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:46.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:46.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:46.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:46.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:46.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:46.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:46.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:46.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:46.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:46.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:46.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:46.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:46.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:46.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:46.129 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:46.130 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:35:46.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:46.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:46.364 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:35:46.832 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:35:47.302 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:35:47.775 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:35:48.244 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:35:48.713 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:35:48.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:48.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:48.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:48.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:48.798 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:48.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:48.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:48.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:48.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:48.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:48.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:48.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:48.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:48.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:48.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:48.848 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:35:48.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:48.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:49.183 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:35:49.654 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:35:50.129 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:35:50.596 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:35:51.062 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:35:51.535 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:35:51.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:51.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:51.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:51.621 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:51.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:51.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:51.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:51.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:35:51.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:51.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:35:51.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:35:51.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:35:51.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:35:51.670 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:35:51.670 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:35:51.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:51.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:52.002 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:35:52.471 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:35:52.944 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:35:53.417 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:35:53.891 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:35:54.361 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:35:54.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:35:54.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:35:54.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:35:54.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:35:54.446 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:35:54.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:54.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:54.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:54.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:54.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:54.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:35:54.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:35:54.457 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:35:54.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:54.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:54.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:54.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4001 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:35:54.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4001 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:35:54.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4001 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:35:54.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:35:54.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:35:54.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=4001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:35:59.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:35:59.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:35:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:59.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:59.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:35:59.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:35:59.480 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:59.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:35:59.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:35:59.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:35:59.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:35:59.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:35:59.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:59.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:35:59.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:35:59.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:35:59.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:35:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:35:59.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:35:59.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:35:59.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:35:59.493 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:59.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:35:59.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:35:59.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:35:59.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:35:59.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:35:59.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:35:59.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:35:59.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:35:59.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:35:59.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:35:59.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:35:59.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:35:59.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:35:59.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:35:59.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:35:59.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:35:59.503 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:35:59.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:35:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:35:59.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:35:59.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:36:00.028 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:36:00.030 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:36:00.032 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:36:00.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:00.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:00.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:00.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:00.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:00.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:00.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:00.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:00.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:00.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:00.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:00.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:00.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:00.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:00.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:00.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:00.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:00.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:36:00.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:00.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:00.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:00.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:00.914 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:36:01.384 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:36:01.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:01.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:01.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:01.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:01.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:36:02.320 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:36:02.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:02.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:02.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:02.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:02.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:36:03.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:03.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:03.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:03.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:03.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:03.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:03.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:03.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:03.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:03.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:03.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:03.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:03.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:03.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:03.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:03.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:03.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:36:03.302 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:36:03.302 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:36:03.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:03.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:03.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:03.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:03.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:03.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:03.722 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:36:04.189 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:36:04.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:04.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:04.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:04.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:04.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:36:05.137 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:36:05.608 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:36:06.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:36:06.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:06.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:06.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:06.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:06.499 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:36:06.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:06.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:06.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:06.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:06.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:06.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:06.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:06.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:06.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:06.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:06.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:06.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:06.544 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:36:06.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:06.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:06.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:06.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:07.015 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:36:07.482 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:36:07.949 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:36:08.420 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:36:08.887 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:36:09.355 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:36:09.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:09.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:09.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:09.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:09.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:09.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:09.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:09.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:09.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:09.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:09.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:09.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:09.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:09.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:09.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:09.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:09.822 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:36:09.823 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:36:09.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:09.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:09.828 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:36:10.294 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:36:10.759 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:36:11.225 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:36:11.696 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:36:12.168 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:36:12.636 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:36:12.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:12.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:12.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:12.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:12.984 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:36:12.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:12.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:12.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:12.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:13.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:13.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:13.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:13.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:13.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:36:13.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:36:13.007 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:36:13.007 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2936 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.008 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.008 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.008 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.008 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.008 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.009 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.009 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.009 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2937 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.009 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.009 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:13.010 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=2938 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:18.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:36:18.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:36:18.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:18.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:18.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:18.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:18.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:18.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:36:18.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:18.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:36:18.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:36:18.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:36:18.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:36:18.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:36:18.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:18.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:18.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:36:18.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:36:18.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:36:18.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:18.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:36:18.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:36:18.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:36:18.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:18.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:18.035 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:36:18.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:36:18.035 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:36:18.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:18.037 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:36:18.037 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:36:18.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:36:18.037 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:18.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:18.037 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:36:18.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:36:18.038 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:36:18.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:18.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:36:18.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:36:18.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:36:18.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:36:18.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:36:18.041 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:36:18.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:18.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:18.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:36:18.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:36:18.561 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:36:18.563 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:36:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:18.567 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:36:18.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:18.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:18.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:18.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:18.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:18.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:18.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:18.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:18.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:18.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:18.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:18.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:18.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:18.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:18.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:18.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:18.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:18.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:18.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:18.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:18.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:36:18.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:18.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:18.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:18.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:18.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:18.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:18.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:18.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:18.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:18.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:18.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:18.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:19.026 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:36:19.026 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:36:19.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:19.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:19.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:19.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:19.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:19.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:19.449 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:36:19.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:19.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:19.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:19.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:19.507 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:36:19.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:19.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:19.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:19.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:19.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:19.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:19.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:19.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:19.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:19.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:19.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:19.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:19.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:19.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:19.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:19.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:19.916 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:36:20.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:20.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:20.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:20.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:20.384 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:36:20.851 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:36:21.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:21.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:21.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:21.322 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:36:21.789 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:36:22.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:22.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:22.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:22.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:22.260 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:36:22.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:22.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:22.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:22.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:22.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:22.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:22.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:22.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:22.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:22.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:22.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:22.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:22.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:22.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:22.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:22.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:22.493 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:36:22.493 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:36:22.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:22.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:22.732 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:36:23.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:23.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:23.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:23.206 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:36:23.681 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:36:24.156 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:36:24.630 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:36:25.103 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:36:25.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:25.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:25.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:25.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:25.427 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:36:25.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:25.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:25.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:25.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:25.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:25.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:36:25.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:36:25.452 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:36:25.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:25.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:25.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:25.453 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.453 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.454 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.454 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.454 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.454 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.455 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.455 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.455 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.455 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.456 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.457 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.458 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.458 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.458 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.458 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.458 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:25.459 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:30.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:36:30.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:36:30.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:30.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:30.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:30.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:30.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:30.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:36:30.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:30.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:36:30.461 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:36:30.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:36:30.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:36:30.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:36:30.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:30.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:30.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:36:30.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:36:30.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:36:30.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:30.473 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:36:30.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:36:30.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:36:30.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:30.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:30.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:36:30.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:36:30.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:36:30.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:30.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:36:30.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:36:30.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:36:30.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:36:30.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:30.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:36:30.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:36:30.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:36:30.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:36:30.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:36:30.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:36:30.482 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:36:30.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:36:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:36:30.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:36:30.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:36:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:36:31.001 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:36:31.002 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:36:31.004 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:36:31.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:31.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:31.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:31.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:31.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:31.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:31.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:31.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:31.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:31.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:31.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:31.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:31.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:31.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:31.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:31.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:31.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:31.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:36:31.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:31.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:31.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:31.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:36:32.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:36:32.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:32.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:32.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:32.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:32.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:32.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:32.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:32.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:32.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:32.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:32.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:32.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:32.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:32.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:32.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:32.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:32.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:36:32.462 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:36:32.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:32.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:32.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:32.842 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:36:33.309 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:36:33.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:33.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:33.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:33.781 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:36:34.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:36:34.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:34.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:34.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:34.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:34.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:34.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:34.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:34.584 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:36:34.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:34.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:34.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:34.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:34.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:34.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:34.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:34.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:34.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:34.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:34.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:34.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:34.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:34.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:34.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:34.728 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:36:35.201 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:36:35.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:35.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:35.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:35.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:35.675 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:36:36.147 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:36:36.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:36:37.096 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:36:37.570 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:36:38.045 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:36:38.517 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:36:38.987 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:36:39.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:39.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:39.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:39.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:39.460 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:36:39.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:39.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:39.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:39.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:39.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:39.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:36:39.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:36:39.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:39.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:36:39.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:36:39.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:36:39.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:36:39.503 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:36:39.503 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:36:39.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:39.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:36:39.933 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:36:40.408 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:36:40.883 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:36:41.357 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:36:41.832 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:36:42.307 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:36:42.782 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:36:43.257 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:36:43.732 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:36:44.206 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:36:44.681 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:36:45.148 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:36:45.616 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:36:46.090 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:36:46.565 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:36:47.040 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:36:47.515 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:36:47.990 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:36:48.464 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:36:48.936 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:36:49.411 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:36:49.886 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:36:50.361 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:36:50.833 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:36:51.306 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:36:51.779 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:36:52.254 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:36:52.726 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:36:53.201 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:36:53.675 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:36:54.150 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:36:54.626 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:36:55.101 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:36:55.575 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:36:56.050 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:36:56.525 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:36:56.998 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:36:57.472 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:36:57.946 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:36:58.421 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:36:58.896 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:36:59.371 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:36:59.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:36:59.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:36:59.473 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:36:59.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:36:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:36:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:36:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:36:59.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:36:59.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:36:59.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:36:59.479 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:36:59.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:36:59.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:36:59.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:36:59.479 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6247 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:59.480 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6247 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:59.480 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6247 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:59.480 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6247 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:59.480 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6247 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:36:59.480 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6247 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:04.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:37:04.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:37:04.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:37:04.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:37:04.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:37:04.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:37:04.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:37:04.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:37:04.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:04.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:37:04.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:37:04.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:37:04.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:37:04.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:37:04.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:04.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:37:04.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:37:04.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:37:04.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:37:04.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:04.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:37:04.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:37:04.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:37:04.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:04.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:37:04.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:37:04.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:37:04.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:37:04.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:04.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:37:04.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:37:04.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:37:04.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:04.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:37:04.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:37:04.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:37:04.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:37:04.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:37:04.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:37:04.515 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:37:04.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:04.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:37:05.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:37:05.028 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:37:05.029 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:37:05.029 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:37:05.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:05.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:05.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:05.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:05.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:05.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:05.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:05.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:05.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:05.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:05.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:05.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:05.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:05.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:05.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:37:05.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:05.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:05.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:05.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:05.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:05.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:05.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:05.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:05.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:05.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:05.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:05.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:05.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:05.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:05.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:05.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:05.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:05.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:05.748 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:37:05.749 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:37:05.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:05.942 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:37:06.417 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:37:06.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:06.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:06.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:06.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:06.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:06.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:06.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:06.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:06.685 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:37:06.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:06.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:06.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:06.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:06.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:06.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:06.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:06.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:06.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:06.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:06.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:06.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:06.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:06.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:06.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:06.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:06.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:37:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:37:07.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:07.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:07.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:07.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:07.831 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:37:08.302 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:37:08.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:08.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:08.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:08.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:08.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:08.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:08.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:08.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:08.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:08.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:08.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:08.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:08.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:08.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:08.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:08.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:08.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:08.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:08.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:08.717 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:37:08.717 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:37:08.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:08.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:08.773 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:37:09.245 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:37:09.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:09.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:09.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:09.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:09.714 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:37:10.185 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:37:10.656 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:37:11.127 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:37:11.598 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:37:12.070 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:37:12.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:37:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:37:13.481 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:37:13.952 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:37:14.423 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:37:14.895 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:37:15.366 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:37:15.835 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:37:16.306 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:37:16.777 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:37:17.248 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:37:17.720 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:37:18.188 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:37:18.661 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:37:19.131 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:37:19.602 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:37:20.072 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:37:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:37:21.014 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:37:21.485 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:37:21.957 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:37:22.428 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:37:22.900 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:37:23.370 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:37:23.840 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:37:24.311 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:37:24.783 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:37:25.254 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:37:25.728 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:37:26.198 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:37:26.667 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:37:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:37:27.609 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:37:28.080 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:37:28.551 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:37:28.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:28.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:28.708 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:37:28.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:28.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:28.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:28.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:28.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:37:28.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:37:28.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:37:28.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:37:28.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:37:28.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:37:28.723 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:37:28.724 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.724 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.724 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.724 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.725 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.725 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.725 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.725 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.726 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.726 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.726 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.726 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.726 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5240 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.727 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.727 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.727 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.727 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.727 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.728 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.728 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.728 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5241 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.730 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5242 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.731 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5242 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.731 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5242 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.731 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5242 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.731 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5242 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:28.732 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=5242 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:37:33.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:37:33.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:37:33.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:37:33.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:37:33.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:37:33.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:37:33.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:37:33.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:37:33.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:33.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:37:33.740 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:37:33.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:37:33.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:37:33.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:37:33.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:33.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:37:33.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:37:33.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:37:33.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:37:33.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:33.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:37:33.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:37:33.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:37:33.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:33.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:37:33.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:37:33.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:37:33.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:37:33.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:33.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:37:33.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:37:33.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:37:33.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:37:33.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:37:33.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:37:33.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:37:33.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:37:33.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:33.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:37:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:37:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:37:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:37:33.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:37:33.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:37:33.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:37:33.762 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:37:33.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:37:33.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:37:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:37:33.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:37:34.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:37:34.275 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:37:34.276 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:37:34.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:34.277 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:37:34.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:34.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:34.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:34.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:34.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:34.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:34.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:34.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:34.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:34.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:34.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:34.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:34.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:34.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:34.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:34.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:34.721 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:37:34.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:34.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:34.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:34.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:35.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:37:35.666 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:37:35.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:35.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:35.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:35.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:36.138 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:37:36.609 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:37:36.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:36.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:36.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:36.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:36.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:36.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:36.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:36.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:36.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:36.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:36.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:36.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:36.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:36.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:36.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:36.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:36.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:36.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:36.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:36.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:36.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:37:36.840 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:37:36.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:36.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:37.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:37:37.549 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:37:37.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:37.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:37.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:37.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:38.020 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:37:38.491 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:37:38.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:37:38.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:37:38.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:37:38.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:37:38.962 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:37:39.434 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:37:39.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:39.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:39.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:39.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:39.536 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:37:39.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:39.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:39.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:39.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:39.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:39.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:39.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:39.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:39.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:39.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:39.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:39.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:39.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:39.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:39.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:39.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:39.908 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:37:40.380 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:37:40.851 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:37:41.323 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:37:41.796 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:37:42.268 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:37:42.739 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:37:42.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:42.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:42.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:42.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:42.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:42.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:42.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:42.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:37:42.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:37:42.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:37:42.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:37:42.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:42.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:37:42.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:37:42.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:37:42.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:37:42.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:37:42.971 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:37:42.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:42.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:37:43.210 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:37:43.683 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:37:44.156 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:37:44.628 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:37:45.101 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:37:45.575 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:37:46.046 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:37:46.518 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:37:46.992 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:37:47.466 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:37:47.938 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:37:48.412 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:37:48.886 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:37:49.358 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:37:49.829 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:37:50.303 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:37:50.775 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:37:51.247 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:37:51.721 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:37:52.193 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:37:52.667 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:37:53.141 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:37:53.612 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:37:54.084 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:37:54.557 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:37:55.031 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:37:55.503 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:37:55.972 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:37:56.444 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:37:56.915 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:37:57.387 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:37:57.861 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:37:58.333 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:37:58.807 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:37:59.281 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:37:59.753 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:38:00.227 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:38:00.701 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:38:01.172 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:38:01.642 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:38:02.114 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:38:02.585 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:38:02.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:02.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:02.913 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:38:02.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:02.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:02.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:02.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:02.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:38:02.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:38:02.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:38:02.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:38:02.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:38:02.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:38:02.927 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6298 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.927 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:02.928 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:07.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:38:07.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:38:07.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:38:07.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:38:07.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:38:07.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:38:07.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:38:07.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:38:07.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:07.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:38:07.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:38:07.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:38:07.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:38:07.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:38:07.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:07.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:38:07.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:38:07.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:38:07.957 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:38:07.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:07.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:38:07.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:38:07.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:38:07.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:07.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:38:07.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:38:07.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:38:07.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:38:07.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:07.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:38:07.963 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:38:07.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:38:07.963 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:07.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:38:07.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:38:07.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:38:07.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:38:07.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:07.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:38:07.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:38:07.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:38:07.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:38:07.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:38:07.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:38:07.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:38:07.967 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:07.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:07.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:38:08.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:38:08.480 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:38:08.480 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:38:08.481 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:38:08.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:08.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:08.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:08.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:08.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:08.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:08.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:08.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:08.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:08.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:08.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:38:08.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:38:08.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:08.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:08.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:08.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:08.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:08.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:08.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:08.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:08.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:08.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:08.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:08.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:08.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:08.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:08.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:38:08.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:38:08.780 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:38:08.780 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:38:08.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:08.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:38:08.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:08.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:08.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:08.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:09.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:09.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:09.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:09.140 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:38:09.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:09.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:09.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:09.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:09.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:09.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:09.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:09.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:09.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:09.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:38:09.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:38:09.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:09.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:09.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:38:09.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:09.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:09.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:09.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:09.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:09.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:09.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:09.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:09.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:09.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:09.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:09.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:09.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:38:09.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:38:09.876 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:38:09.877 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:38:09.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:09.884 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:38:09.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:09.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:09.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:09.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:10.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:38:10.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:10.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:10.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:10.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:10.444 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:38:10.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:10.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:10.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:10.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:10.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:38:10.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:38:10.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:38:10.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:38:10.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:38:10.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:38:10.452 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:38:10.452 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:10.452 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:10.452 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:10.452 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:10.452 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:10.452 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:38:15.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:38:15.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:38:15.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:38:15.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:38:15.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:38:15.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:38:15.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:38:15.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:38:15.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:15.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:38:15.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:38:15.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:38:15.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:38:15.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:38:15.474 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:15.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:38:15.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:38:15.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:38:15.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:38:15.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:15.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:38:15.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:38:15.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:38:15.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:15.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:38:15.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:38:15.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:38:15.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:38:15.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:15.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:38:15.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:38:15.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:38:15.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:38:15.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:38:15.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:38:15.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:38:15.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:38:15.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:15.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:38:15.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:38:15.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:38:15.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:38:15.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:38:15.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:38:15.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:38:15.485 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:38:15.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:38:15.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:38:15.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:38:16.005 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:38:16.007 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:38:16.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:16.008 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:38:16.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:16.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:16.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:16.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:16.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:16.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:16.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:16.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:16.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:16.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:16.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:38:16.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:38:16.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:16.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:16.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:16.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:16.433 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:38:16.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:16.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:16.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:16.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:16.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:38:17.388 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:38:17.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:17.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:17.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:17.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:17.864 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:38:18.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:38:18.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:18.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:18.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:18.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:18.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:38:19.295 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:38:19.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:19.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:19.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:19.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:19.770 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:38:20.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:38:20.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:38:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:38:20.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:38:20.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:38:20.713 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:38:21.192 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:38:21.666 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:38:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:38:22.612 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:38:23.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:38:23.556 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:38:24.032 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:38:24.506 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:38:24.981 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:38:25.456 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:38:25.928 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:38:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:38:26.877 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:38:27.350 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:38:27.821 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:38:28.295 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:38:28.770 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:38:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:38:29.719 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:38:30.191 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:38:30.666 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:38:31.139 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:38:31.612 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:38:32.089 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:38:32.561 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:38:33.034 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:38:33.503 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:38:33.979 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:38:34.455 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:38:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:38:35.407 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:38:35.879 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:38:36.349 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:38:36.826 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:38:37.300 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:38:37.775 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:38:38.249 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:38:38.724 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:38:39.201 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:38:39.675 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:38:40.147 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:38:40.623 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:38:41.099 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:38:41.575 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:38:42.055 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:38:42.534 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:38:43.008 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:38:43.483 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:38:43.958 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:38:44.434 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:38:44.913 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:38:45.391 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:38:45.871 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:38:46.346 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:38:46.821 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:38:47.295 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:38:47.771 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:38:48.249 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:38:48.726 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:38:49.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:49.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:49.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:49.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:49.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:49.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:49.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:38:49.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:38:49.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:38:49.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:38:49.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:49.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:38:49.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:38:49.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:38:49.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:38:49.143 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:38:49.143 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:38:49.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:49.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:38:49.198 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:38:49.671 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:38:50.142 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:38:50.617 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:38:51.091 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:38:51.565 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:38:52.044 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:38:52.521 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 03:38:52.995 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 03:38:53.469 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 03:38:53.944 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 03:38:54.418 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 03:38:54.893 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 03:38:55.365 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 03:38:55.838 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 03:38:56.310 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 03:38:56.782 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 03:38:57.256 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 03:38:57.732 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 03:38:58.206 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 03:38:58.683 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 03:38:59.160 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 03:38:59.634 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 03:39:00.106 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 03:39:00.575 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 03:39:01.053 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 03:39:01.532 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 03:39:02.012 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 03:39:02.485 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 03:39:02.964 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 03:39:03.443 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 03:39:03.914 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-02 03:39:04.388 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-02 03:39:04.866 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-02 03:39:05.341 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-02 03:39:05.815 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-02 03:39:06.285 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-02 03:39:06.756 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-02 03:39:07.226 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-02 03:39:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-02 03:39:08.168 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-02 03:39:08.637 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-02 03:39:09.109 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-02 03:39:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-02 03:39:10.047 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-02 03:39:10.518 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-02 03:39:10.989 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-02 03:39:11.460 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-02 03:39:11.927 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-02 03:39:12.397 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-02 03:39:12.868 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-02 03:39:13.338 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-02 03:39:13.810 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-02 03:39:14.280 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-02 03:39:14.752 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-02 03:39:15.224 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-02 03:39:15.703 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-02 03:39:16.182 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-02 03:39:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-02 03:39:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-02 03:39:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-02 03:39:18.092 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-02 03:39:18.571 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-02 03:39:19.048 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-02 03:39:19.525 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-02 03:39:20.002 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-02 03:39:20.475 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-02 03:39:20.945 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-02 03:39:21.416 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-02 03:39:21.884 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-02 03:39:22.354 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-02 03:39:22.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:22.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:39:22.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:39:22.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:39:22.758 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:39:22.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:39:22.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:39:22.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:39:22.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:39:22.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:39:22.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:39:22.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:39:22.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:22.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:39:22.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:39:22.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:39:22.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:39:22.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:39:22.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:39:22.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:22.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:22.824 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-02 03:39:23.294 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-02 03:39:23.763 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-02 03:39:24.232 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-02 03:39:24.700 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-02 03:39:25.169 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-02 03:39:25.639 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-02 03:39:26.107 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-02 03:39:26.576 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-02 03:39:27.046 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-02 03:39:27.515 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-02 03:39:27.984 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-02 03:39:28.452 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-02 03:39:28.920 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-02 03:39:29.394 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-02 03:39:29.874 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-02 03:39:30.352 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-02 03:39:30.831 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-02 03:39:31.310 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-02 03:39:31.791 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-02 03:39:32.269 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-02 03:39:32.746 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-02 03:39:33.225 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-02 03:39:33.705 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-02 03:39:34.178 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-02 03:39:34.651 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-02 03:39:35.130 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-02 03:39:35.605 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-02 03:39:36.073 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-02 03:39:36.542 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-02 03:39:37.011 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-02 03:39:37.479 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-02 03:39:37.947 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-02 03:39:38.417 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-02 03:39:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-02 03:39:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-02 03:39:39.823 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-02 03:39:40.291 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-02 03:39:40.761 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-02 03:39:41.231 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-02 03:39:41.700 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-02 03:39:42.169 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-02 03:39:42.637 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-02 03:39:43.106 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-02 03:39:43.577 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-02 03:39:44.047 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-02 03:39:44.516 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-02 03:39:44.991 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-02 03:39:45.465 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-02 03:39:45.940 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-02 03:39:46.413 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-03-02 03:39:46.888 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-03-02 03:39:47.364 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-03-02 03:39:47.842 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-03-02 03:39:48.321 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-03-02 03:39:48.799 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-03-02 03:39:49.278 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-03-02 03:39:49.758 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-03-02 03:39:50.233 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-03-02 03:39:50.708 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-03-02 03:39:51.180 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-03-02 03:39:51.655 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-03-02 03:39:52.134 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-03-02 03:39:52.608 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-03-02 03:39:53.080 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-03-02 03:39:53.556 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-03-02 03:39:54.030 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-03-02 03:39:54.505 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-03-02 03:39:54.978 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-03-02 03:39:55.454 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-03-02 03:39:55.928 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-03-02 03:39:56.403 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-03-02 03:39:56.878 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-03-02 03:39:57.352 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-03-02 03:39:57.823 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-03-02 03:39:58.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:58.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:39:58.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:39:58.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:39:58.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:39:58.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:39:58.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:39:58.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:39:58.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:39:58.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:39:58.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:39:58.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:58.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:39:58.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:39:58.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:39:58.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:39:58.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:39:58.147 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:39:58.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:58.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:39:58.297 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-03-02 03:39:58.775 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-03-02 03:39:59.254 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-03-02 03:39:59.732 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-03-02 03:40:00.212 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-03-02 03:40:00.690 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-03-02 03:40:01.164 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-03-02 03:40:01.636 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-03-02 03:40:02.110 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-03-02 03:40:02.584 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-03-02 03:40:03.055 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-03-02 03:40:03.530 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-03-02 03:40:04.004 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-03-02 03:40:04.474 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-03-02 03:40:04.945 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-03-02 03:40:05.415 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-03-02 03:40:05.885 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-03-02 03:40:06.354 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-03-02 03:40:06.827 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-03-02 03:40:07.300 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-03-02 03:40:07.776 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-03-02 03:40:08.249 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-03-02 03:40:08.721 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-03-02 03:40:09.192 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-03-02 03:40:09.662 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-03-02 03:40:10.134 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-03-02 03:40:10.605 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-03-02 03:40:11.075 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-03-02 03:40:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-03-02 03:40:12.022 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-03-02 03:40:12.502 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-03-02 03:40:12.981 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-03-02 03:40:13.460 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-03-02 03:40:13.940 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-03-02 03:40:14.419 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-03-02 03:40:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-03-02 03:40:15.373 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-03-02 03:40:15.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:15.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:15.629 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:40:15.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:15.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:15.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:15.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:15.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:15.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:15.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:15.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:15.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:40:15.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:40:15.634 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:40:20.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:40:20.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:40:20.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:20.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:20.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:20.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:20.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:20.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:40:20.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:20.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:40:20.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:40:20.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:40:20.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:40:20.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:40:20.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:20.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:20.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:40:20.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:40:20.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:40:20.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:20.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:40:20.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:40:20.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:40:20.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:20.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:20.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:40:20.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:40:20.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:40:20.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:20.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:40:20.669 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:40:20.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:40:20.669 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:20.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:20.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:40:20.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:40:20.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:40:20.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:40:20.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:40:20.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:40:20.674 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:40:20.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:20.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:40:20.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:40:20.676 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:20.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:40:25.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:40:25.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:25.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:25.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:25.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:25.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:25.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:40:25.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:25.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:40:25.695 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:40:25.700 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:40:25.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:40:25.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:40:25.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:25.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:25.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:40:25.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:40:25.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:40:25.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:25.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:40:25.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:40:25.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:40:25.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:25.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:25.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:40:25.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:40:25.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:40:25.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:25.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:40:25.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:40:25.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:40:25.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:25.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:25.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:40:25.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:40:25.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:40:25.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:40:25.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:40:25.713 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:40:25.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:40:25.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:25.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:25.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:25.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:25.718 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:40:26.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:40:26.226 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:40:26.226 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:40:26.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:26.227 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:40:26.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:26.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:26.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:26.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:26.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:26.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:26.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:26.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:26.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:26.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:26.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:40:26.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:40:26.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:26.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:26.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:26.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:26.680 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:40:26.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:27.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:40:27.639 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:40:27.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:27.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:27.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:27.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:27.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:27.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:27.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:27.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:27.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:27.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:27.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:27.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:27.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:27.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:27.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:27.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:27.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:27.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:27.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:40:27.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:40:27.774 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:40:27.774 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:40:27.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:27.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:28.113 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:40:28.585 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:40:28.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:28.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:28.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:28.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:29.064 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:40:29.541 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:40:29.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:29.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:29.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:29.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:30.015 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:40:30.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:30.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:30.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:30.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:30.049 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:40:30.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:30.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:30.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:30.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:30.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:30.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:30.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:30.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:30.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:30.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:30.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:40:30.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:40:30.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:30.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:30.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:30.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:30.490 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:40:30.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:30.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:30.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:30.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:30.964 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:40:31.442 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:40:31.922 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:40:32.400 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:40:32.874 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:40:33.350 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:40:33.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:33.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:33.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:33.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:33.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:33.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:33.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:33.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:33.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:33.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:33.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:33.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:33.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:33.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:33.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:40:33.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:40:33.585 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:40:33.585 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:40:33.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:33.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:33.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:40:34.302 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:40:34.776 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:40:34.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:34.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:34.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:34.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:34.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:34.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:34.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:34.864 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:40:34.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:34.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:34.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:34.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:40:34.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:40:34.865 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:40:39.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:40:39.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:40:39.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:39.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:39.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:39.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:39.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:40:39.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:40:39.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:39.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:40:39.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:40:39.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:40:39.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:40:39.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:40:39.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:39.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:40:39.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:40:39.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:40:39.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:40:39.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:39.891 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:40:39.892 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:40:39.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:40:39.892 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:39.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:40:39.893 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:40:39.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:40:39.893 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:40:39.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:39.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:40:39.895 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:40:39.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:40:39.895 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:40:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:40:39.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:40:39.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:40:39.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:40:39.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:39.898 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:40:39.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:40:39.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.899 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:40:39.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:40:39.900 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:40:39.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:40:39.904 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:40:40.376 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:40:40.419 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:40:40.421 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:40:40.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:40.423 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:40:40.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:40.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:40.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:40.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:40.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:40.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:40.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:40.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:40.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:40.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:40:40.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:40:40.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:40.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:40.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:40.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:40.844 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:40:40.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:40.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:40.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:40.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:41.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:40:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:40:41.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:41.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:41.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:41.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:42.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:40:42.712 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:40:42.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:42.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:42.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:42.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:43.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:40:43.645 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:40:43.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:43.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:43.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:43.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:44.112 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:40:44.578 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:40:44.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:40:44.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:40:44.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:40:44.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:40:45.044 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:40:45.510 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:40:45.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:40:46.454 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:40:46.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:40:47.401 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:40:47.868 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:40:48.338 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:40:48.806 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:40:49.276 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:40:49.746 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:40:50.213 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:40:50.681 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:40:51.149 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:40:51.615 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:40:52.083 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:40:52.550 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:40:53.018 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:40:53.485 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:40:53.952 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:40:54.417 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:40:54.887 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:40:55.355 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:40:55.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:55.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:55.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:55.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:55.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:55.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:55.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:55.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:40:55.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:40:55.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:40:55.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:40:55.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:55.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:40:55.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:40:55.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:40:55.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:40:55.725 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:40:55.726 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:40:55.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:55.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:40:55.821 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:40:56.295 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:40:56.768 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:40:57.233 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:40:57.700 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:40:58.166 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:40:58.633 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:40:59.098 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:40:59.564 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:41:00.029 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:41:00.494 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:41:00.959 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:41:01.425 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:41:01.892 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:41:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:41:02.826 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:41:03.294 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:41:03.760 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:41:04.230 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:41:04.698 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:41:05.167 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:41:05.634 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:41:06.101 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:41:06.570 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:41:07.041 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:41:07.510 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:41:07.976 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:41:08.442 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:41:08.914 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:41:09.382 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:41:09.854 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:41:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:41:10.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:10.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:10.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:10.675 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:41:10.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:10.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:10.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:10.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:10.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:10.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:10.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:10.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:10.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:10.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:10.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:41:10.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:41:10.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:10.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:10.787 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:41:11.255 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:41:11.721 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:41:12.188 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:41:12.658 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:41:13.127 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:41:13.597 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:41:14.063 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:41:14.528 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:41:14.998 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:41:15.465 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:41:15.933 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:41:16.397 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 03:41:16.867 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 03:41:17.333 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 03:41:17.800 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 03:41:18.267 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 03:41:18.733 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 03:41:19.199 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 03:41:19.665 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 03:41:20.133 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 03:41:20.608 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 03:41:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 03:41:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 03:41:22.021 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 03:41:22.489 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 03:41:22.959 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 03:41:23.429 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 03:41:23.900 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 03:41:24.373 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 03:41:24.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:24.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:24.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:24.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:24.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:24.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:24.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:24.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:24.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:24.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:24.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:24.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:24.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:24.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:24.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:41:24.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:41:24.845 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 03:41:24.891 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:41:24.892 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:41:24.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:24.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:25.319 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 03:41:25.790 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 03:41:26.259 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 03:41:26.732 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 03:41:27.204 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 03:41:27.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:27.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:27.597 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:41:27.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:27.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:27.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:27.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:27.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:41:27.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:41:27.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:41:27.603 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:41:27.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:41:27.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:41:27.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:41:27.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:41:27.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:41:27.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:41:27.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:41:27.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:41:27.603 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:41:32.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:41:32.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:41:32.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:41:32.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:41:32.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:41:32.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:41:32.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:41:32.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:41:32.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:41:32.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:41:32.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:41:32.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:41:32.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:41:32.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:41:32.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:41:32.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:41:32.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:41:32.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:41:32.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:41:32.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:32.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:41:32.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:41:32.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:41:32.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:41:32.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:41:32.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:41:32.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:41:32.627 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:41:32.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:32.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:41:32.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:41:32.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:41:32.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:41:32.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:41:32.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:41:32.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:41:32.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:41:32.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:32.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:41:32.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:41:32.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:41:32.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:41:32.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:41:32.632 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:41:32.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:41:32.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:41:32.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:41:32.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:41:32.637 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:41:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:41:33.154 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:41:33.156 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:41:33.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:33.157 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:41:33.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:33.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:33.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:33.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:33.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:33.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:33.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:33.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:33.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:33.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:33.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:41:33.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:41:33.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:33.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:33.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:33.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:33.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:41:33.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:33.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:33.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:33.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:34.047 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:41:34.520 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:41:34.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:34.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:34.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:34.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:34.992 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:41:35.466 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:41:35.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:35.934 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:41:36.406 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:41:36.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:36.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:36.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:36.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:36.879 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:41:37.353 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:41:37.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:41:37.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:41:37.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:41:37.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:41:37.825 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:41:38.299 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:41:38.766 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:41:39.235 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:41:39.700 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:41:40.168 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:41:40.634 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:41:41.102 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:41:41.570 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:41:42.034 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:41:42.501 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:41:42.967 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:41:43.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:43.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:43.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:43.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:43.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:43.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:43.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:43.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:43.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:43.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:43.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:43.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:43.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:43.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:43.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:41:43.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:41:43.198 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:41:43.198 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:41:43.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:43.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:43.435 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:41:43.901 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:41:44.369 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:41:44.835 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:41:45.300 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:41:45.765 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:41:46.235 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:41:46.708 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:41:47.182 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:41:47.646 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:41:48.115 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:41:48.581 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:41:49.047 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:41:49.513 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:41:49.979 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:41:50.446 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:41:50.912 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:41:51.377 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:41:51.842 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:41:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:41:52.777 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:41:53.243 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:41:53.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:53.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:53.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:53.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:53.406 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:41:53.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:53.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:53.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:53.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:41:53.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:41:53.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:41:53.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:41:53.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:53.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:53.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:53.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:41:53.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:41:53.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:41:53.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:41:53.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:53.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:41:53.710 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:41:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:41:54.644 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:41:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:41:55.576 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:41:56.044 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:41:56.518 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:41:56.992 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:41:57.459 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:41:57.926 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:41:58.392 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:41:58.858 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:41:59.324 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:41:59.790 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:42:00.260 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:42:00.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:00.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:00.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:00.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:00.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:00.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:00.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:00.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:00.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:00.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:00.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:00.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:00.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:00.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:00.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:00.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:00.348 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:00.348 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:42:00.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:00.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:00.733 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:42:01.208 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:42:01.677 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:42:02.150 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-02 03:42:02.626 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-02 03:42:03.099 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-02 03:42:03.568 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-02 03:42:04.039 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-02 03:42:04.506 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-02 03:42:04.979 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-02 03:42:05.450 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-02 03:42:05.917 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-02 03:42:06.382 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-02 03:42:06.847 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-02 03:42:07.318 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-02 03:42:07.789 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-02 03:42:08.263 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-02 03:42:08.731 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-02 03:42:09.197 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-02 03:42:09.663 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-02 03:42:10.129 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-02 03:42:10.595 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-02 03:42:11.062 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-02 03:42:11.528 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-02 03:42:11.993 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-02 03:42:12.458 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-02 03:42:12.924 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-02 03:42:13.390 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-02 03:42:13.861 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-02 03:42:14.332 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-02 03:42:14.805 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-02 03:42:15.272 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-02 03:42:15.737 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-02 03:42:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-02 03:42:16.672 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-02 03:42:17.138 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-02 03:42:17.603 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-02 03:42:18.069 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-02 03:42:18.542 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-02 03:42:19.017 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-02 03:42:19.489 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-02 03:42:19.954 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-02 03:42:20.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:20.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:20.312 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:42:20.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:20.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:20.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:20.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:20.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:20.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:42:20.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:42:20.319 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:42:20.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:20.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:20.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10382 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10382 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:20.319 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=10383 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:25.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:42:25.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:42:25.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:25.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:25.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:25.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:25.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:25.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:42:25.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:25.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:42:25.338 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:42:25.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:42:25.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:42:25.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:42:25.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:25.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:25.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:42:25.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:42:25.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:42:25.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:25.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:42:25.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:42:25.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:42:25.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:25.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:25.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:42:25.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:42:25.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:42:25.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:25.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:42:25.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:42:25.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:42:25.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:25.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:25.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:42:25.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:42:25.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:42:25.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:42:25.353 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:42:25.353 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:42:25.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:42:25.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:25.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:25.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:42:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:42:25.868 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:42:25.868 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:42:25.869 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:42:25.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:25.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:25.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:25.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:25.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:25.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:25.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:25.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:25.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:25.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:25.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:25.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:25.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:25.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:25.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:25.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:25.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:26.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:26.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:26.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:26.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:26.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:26.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:26.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:26.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:26.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:26.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:26.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:26.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:26.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:26.302 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:42:26.306 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:26.306 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:42:26.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:26.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:26.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:26.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:26.775 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:42:26.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:26.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:26.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:26.784 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:42:26.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:26.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:26.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:26.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:26.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:26.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:26.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:26.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:26.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:26.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:26.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:26.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:26.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:26.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:26.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:27.247 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:42:27.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:27.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:27.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:27.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:27.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:27.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:27.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:27.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:27.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:27.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:27.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:27.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:27.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:27.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:27.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:27.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:27.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:27.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:27.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:27.713 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:27.714 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:42:27.714 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:42:27.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:27.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:28.180 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:42:28.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:28.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:28.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:28.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:28.646 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:42:29.112 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:42:29.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:29.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:29.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:29.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:42:30.045 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:42:30.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:30.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:30.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:30.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:30.511 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:42:30.976 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:42:31.443 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:42:31.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:31.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:31.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:31.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:31.734 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:42:31.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:31.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:31.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:31.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:31.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:31.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:42:31.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:42:31.743 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:42:31.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:31.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:31.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:31.743 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1393 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:31.743 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1393 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:31.743 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1393 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:31.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1393 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:31.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1393 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:31.744 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=1393 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:36.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:42:36.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:42:36.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:36.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:36.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:36.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:36.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:36.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:42:36.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:36.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:42:36.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:42:36.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:42:36.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:42:36.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:42:36.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:36.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:36.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:42:36.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:42:36.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:42:36.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:36.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:42:36.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:42:36.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:42:36.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:36.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:36.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:42:36.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:42:36.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:42:36.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:36.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:42:36.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:42:36.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:42:36.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:36.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:36.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:42:36.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:42:36.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:42:36.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:42:36.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:42:36.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:42:36.775 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:42:36.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:36.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:36.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:36.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:36.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:42:37.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:42:37.302 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:42:37.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:37.306 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:42:37.309 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:42:37.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:37.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:37.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:37.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:37.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:37.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:37.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:37.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:37.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:37.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:37.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:37.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:37.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:37.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:37.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:37.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:37.710 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:42:37.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:37.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:37.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:37.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:38.178 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:42:38.645 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:42:38.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:38.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:38.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:38.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:39.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:42:39.581 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:42:39.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:39.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:39.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:39.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:40.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:42:40.514 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:42:40.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:40.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:40.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:40.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:40.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:40.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:40.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:40.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:40.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:40.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:40.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:40.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:40.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:40.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:40.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:40.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:40.646 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:40.647 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:42:40.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:40.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:40.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:40.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:40.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:40.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:40.979 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:42:41.445 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:42:41.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:41.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:41.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:41.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:41.911 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:42:42.378 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:42:42.844 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:42:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:42:43.779 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:42:43.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:43.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:43.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:43.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:43.987 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:42:44.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:44.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:44.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:44.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:44.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:44.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:44.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:44.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:44.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:44.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:44.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:44.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:44.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:44.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:44.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:44.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:44.253 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:42:44.726 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:42:45.194 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:42:45.660 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:42:46.126 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:42:46.596 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:42:47.064 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:42:47.531 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:42:47.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:47.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:47.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:47.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:47.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:47.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:47.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:47.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:47.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:47.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:47.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:47.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:47.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:47.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:47.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:47.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:47.765 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:47.765 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:42:47.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:47.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:48.000 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:42:48.475 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:42:48.948 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:42:49.417 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:42:49.882 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:42:50.349 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:42:50.814 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:42:51.280 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:42:51.745 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:42:51.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:51.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:51.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:51.831 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:42:51.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:51.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:51.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:51.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:51.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:51.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:42:51.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:42:51.853 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:42:51.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:51.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:51.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:51.854 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.854 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.854 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.854 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.855 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.855 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.855 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.855 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.855 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.856 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.856 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.856 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.856 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.856 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:51.857 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:42:56.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:42:56.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:42:56.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:56.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:56.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:56.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:56.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:42:56.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:42:56.859 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:56.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:42:56.860 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:42:56.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:42:56.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:42:56.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:42:56.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:56.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:42:56.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:42:56.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:42:56.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:42:56.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:56.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:42:56.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:42:56.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:42:56.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:56.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:42:56.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:42:56.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:42:56.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:42:56.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:56.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:42:56.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:42:56.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:42:56.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:42:56.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:42:56.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:42:56.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:42:56.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:42:56.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:42:56.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:42:56.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:42:56.874 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:42:56.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:42:56.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:42:56.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:42:56.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:42:56.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:42:57.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:42:57.399 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:42:57.401 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:42:57.402 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:42:57.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:57.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:57.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:57.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:57.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:57.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:57.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:57.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:57.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:57.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:57.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:57.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:57.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:57.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:57.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:57.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:57.812 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:42:57.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:57.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:57.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:57.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:57.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:57.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:57.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:57.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:57.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:57.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:57.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:57.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:57.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:57.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:57.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:57.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:57.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:57.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:57.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:57.901 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:57.901 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:42:57.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:57.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:58.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:42:58.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:58.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:58.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:58.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:58.455 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:42:58.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:58.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:58.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:58.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:58.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:58.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:58.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:58.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:58.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:58.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:58.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:58.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:58.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:58.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:58.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:58.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:58.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:42:58.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:58.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:58.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:58.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:42:59.211 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:42:59.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:59.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:59.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:59.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:59.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:59.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:59.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:59.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:42:59.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:42:59.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:42:59.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:42:59.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:59.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:42:59.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:42:59.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:42:59.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:42:59.677 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:42:59.679 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:42:59.680 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:42:59.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:59.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:42:59.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:42:59.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:42:59.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:42:59.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:00.142 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:43:00.608 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:43:00.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:00.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:00.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:00.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:01.074 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:43:01.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:43:01.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:01.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:01.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:01.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:02.004 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:43:02.469 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:43:02.934 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:43:03.399 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:43:03.864 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:43:04.331 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:43:04.800 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:43:05.270 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:43:05.735 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:43:06.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:43:06.671 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:43:07.142 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:43:07.607 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:43:08.072 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:43:08.540 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:43:09.010 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:43:09.476 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:43:09.941 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:43:10.407 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:43:10.873 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:43:11.339 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:43:11.804 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:43:12.270 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:43:12.738 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:43:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:43:13.673 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:43:14.138 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:43:14.605 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:43:15.071 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:43:15.536 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:43:16.004 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:43:16.468 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:43:16.933 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:43:17.400 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:43:17.866 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:43:18.331 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:43:18.796 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:43:19.261 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:43:19.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:19.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:19.622 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:43:19.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:19.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:19.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:19.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:19.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:43:19.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:43:19.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:43:19.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:43:19.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:43:19.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:43:19.630 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:43:24.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:43:24.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:43:24.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:43:24.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:43:24.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:43:24.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:43:24.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:43:24.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:43:24.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:24.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:43:24.648 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:43:24.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:43:24.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:43:24.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:43:24.657 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:24.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:43:24.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:43:24.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:43:24.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:43:24.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:24.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:43:24.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:43:24.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:43:24.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:24.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:43:24.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:43:24.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:43:24.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:43:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:24.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:43:24.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:43:24.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:43:24.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:24.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:43:24.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:43:24.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:43:24.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:43:24.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:24.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:43:24.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:43:24.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:43:24.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:43:24.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:43:24.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:43:24.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:43:24.670 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:43:24.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:24.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:24.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:24.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:24.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:43:25.138 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:43:25.196 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:43:25.199 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:43:25.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:25.201 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:43:25.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:25.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:25.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:25.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:25.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:25.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:25.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:25.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:25.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:25.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:25.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:25.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:25.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:25.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:25.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:25.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:43:25.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:25.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:25.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:25.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:26.084 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:43:26.556 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:43:26.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:26.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:26.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:26.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:27.024 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:43:27.495 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:43:27.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:27.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:27.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:27.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:27.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:43:28.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:28.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:28.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:28.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:28.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:28.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:28.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:28.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:28.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:28.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:28.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:28.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:28.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:28.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:28.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:28.200 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:43:28.200 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:43:28.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:28.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:28.434 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:43:28.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:28.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:28.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:28.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:28.907 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:43:29.378 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:43:29.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:29.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:29.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:29.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:29.848 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:43:30.319 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:43:30.790 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:43:31.261 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:43:31.731 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:43:32.200 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:43:32.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:43:32.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:32.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:32.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:32.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:32.693 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:43:32.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:32.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:32.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:32.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:32.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:32.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:32.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:32.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:32.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:32.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:32.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:32.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:32.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:32.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:32.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:32.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:33.135 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:43:33.601 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:43:34.070 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:43:34.537 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:43:35.007 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:43:35.475 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:43:35.942 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:43:36.411 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:43:36.879 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:43:37.348 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:43:37.819 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:43:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:43:38.760 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:43:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:43:39.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:39.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:39.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:39.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:39.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:39.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:39.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:39.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:39.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:39.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:39.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:39.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:39.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:39.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:39.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:39.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:39.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:43:39.464 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:43:39.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:39.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:39.702 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:43:40.172 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:43:40.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:40.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:40.254 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:43:40.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:40.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:43:40.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:43:40.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:43:40.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:43:40.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:43:40.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:43:40.261 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:43:45.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:43:45.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:43:45.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:43:45.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:43:45.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:43:45.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:43:45.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:43:45.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:43:45.278 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:45.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:43:45.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:43:45.282 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:43:45.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:43:45.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:43:45.283 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:45.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:43:45.284 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:43:45.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:43:45.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:43:45.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:45.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:43:45.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:43:45.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:43:45.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:45.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:43:45.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:43:45.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:43:45.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:43:45.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:45.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:43:45.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:43:45.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:43:45.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:43:45.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:43:45.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:43:45.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:43:45.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:43:45.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:45.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:43:45.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:43:45.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:43:45.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:43:45.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:43:45.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:43:45.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:43:45.294 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:43:45.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:43:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:43:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:43:45.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:43:45.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:43:45.808 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:43:45.809 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:43:45.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:45.811 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:43:45.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:45.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:45.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:45.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:45.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:45.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:45.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:45.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:45.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:45.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:45.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:45.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:45.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:45.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:45.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:45.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:46.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:43:46.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:46.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:46.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:46.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:46.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:43:47.193 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:43:47.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:47.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:47.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:47.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:47.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:47.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:47.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:47.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:47.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:47.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:47.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:47.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:47.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:47.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:47.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:47.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:47.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:47.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:47.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:47.659 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:43:47.659 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-02 03:43:47.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:47.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:47.665 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:43:48.137 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:43:48.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:48.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:48.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:48.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:48.610 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:43:49.082 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:43:49.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:49.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:49.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:49.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:49.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:43:50.016 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:43:50.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:43:50.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:43:50.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:43:50.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:43:50.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:50.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:50.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:50.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:50.382 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:43:50.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:50.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:50.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:50.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:50.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:50.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:50.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:50.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:50.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:50.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:50.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:50.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:50.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:50.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:50.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:50.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:50.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:43:50.948 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:43:51.415 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:43:51.881 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:43:52.348 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:43:52.814 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:43:53.281 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:43:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:43:54.217 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:43:54.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:54.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:54.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:54.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:54.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:54.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:54.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:54.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:43:54.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:43:54.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:43:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:43:54.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:54.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:43:54.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:43:54.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:43:54.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:43:54.688 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:43:54.688 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.244.22:6700) Recv SETFH cmd
2026-03-02 03:43:54.688 [INFO] transceiver.py:201 (MS@172.18.244.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-02 03:43:54.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:54.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:43:55.160 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:43:55.625 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:43:56.090 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:43:56.555 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:43:57.019 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:43:57.485 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:43:57.951 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:43:58.417 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:43:58.884 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:43:59.349 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:43:59.814 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:44:00.280 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:44:00.745 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:44:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-02 03:44:01.676 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-02 03:44:02.146 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-02 03:44:02.618 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-02 03:44:03.084 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-02 03:44:03.555 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-02 03:44:04.026 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-02 03:44:04.495 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-02 03:44:04.962 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-02 03:44:05.431 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-02 03:44:05.901 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-02 03:44:06.372 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-02 03:44:06.836 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-02 03:44:07.303 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-02 03:44:07.773 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-02 03:44:08.243 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-02 03:44:08.712 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-02 03:44:09.177 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-02 03:44:09.649 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-02 03:44:10.119 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-02 03:44:10.585 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-02 03:44:11.050 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-02 03:44:11.521 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-02 03:44:11.989 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-02 03:44:12.454 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-02 03:44:12.920 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-02 03:44:13.387 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-02 03:44:13.851 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-02 03:44:14.318 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-02 03:44:14.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:44:14.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:44:14.632 [INFO] transceiver.py:205 (MS@172.18.244.22:6700) Frequency hopping disabled
2026-03-02 03:44:14.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:14.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:14.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:14.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:14.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:14.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:14.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:14.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:14.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:14.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:14.639 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:14.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:14.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:14.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:14.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:14.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:14.639 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=6396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:19.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:19.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:19.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:19.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:19.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:19.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:19.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:19.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:19.651 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:19.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:19.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:44:19.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:44:19.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:44:19.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:19.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:19.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:19.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:44:19.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:19.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:44:19.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:19.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:44:19.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:44:19.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:19.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:19.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:19.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:44:19.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:19.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:44:19.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:19.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:44:19.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:44:19.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:19.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:19.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:19.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:44:19.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:19.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:44:19.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:19.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:44:19.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:44:19.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:44:19.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:44:19.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:44:19.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:44:19.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:44:19.666 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:44:19.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:44:20.143 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:44:20.185 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:44:20.186 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:44:20.188 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:44:20.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:44:20.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:20.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:20.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:20.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:20.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:20.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:44:21.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:21.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:21.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:21.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:21.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:21.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:21.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:21.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:21.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:21.522 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:21.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:21.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:26.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:26.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:26.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:26.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:26.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:26.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:26.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:26.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:26.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:26.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:26.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:44:26.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:44:26.540 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:44:26.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:26.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:26.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:26.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:44:26.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:26.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:44:26.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:26.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:44:26.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:44:26.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:26.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:26.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:26.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:44:26.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:26.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:44:26.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:26.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:44:26.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:44:26.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:26.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:26.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:26.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:44:26.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:26.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:44:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:44:26.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:44:26.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:44:26.551 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:44:26.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:44:26.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:26.556 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:44:27.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:44:27.076 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:44:27.078 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:44:27.080 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:44:27.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.485 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:44:27.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:27.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:27.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:27.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:27.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:27.956 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:44:28.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.424 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:44:28.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:28.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:28.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:28.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:28.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:28.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:28.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:28.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:28.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:28.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:28.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:28.462 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:28.462 [WARNING] transceiver.py:257 (TRX1@172.18.244.20:5700/1) RX TRXD message (ver=1 fn=418 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.463 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.464 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.464 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.464 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.464 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.464 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.465 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.465 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.465 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.465 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=418 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.465 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.466 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:28.467 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=419 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:33.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:33.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:33.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:33.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:33.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:33.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:33.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:33.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:33.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:33.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:33.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:44:33.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:44:33.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:44:33.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:33.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:33.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:33.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:44:33.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:33.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:44:33.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:33.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:44:33.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:44:33.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:33.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:33.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:33.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:44:33.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:33.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:44:33.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:33.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:44:33.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:44:33.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:33.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:33.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:33.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:44:33.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:33.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:44:33.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:33.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:44:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:44:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:44:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:44:33.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:44:33.496 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:44:33.496 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:33.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:44:33.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:44:34.017 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:44:34.019 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:44:34.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.021 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:44:34.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:44:34.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:34.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:34.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:34.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:34.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:34.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:44:35.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:35.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:35.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:35.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:35.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:35.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:35.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:35.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:35.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:35.366 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:35.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:35.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:40.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:40.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:40.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:40.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:40.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:40.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:40.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:40.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:40.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:40.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:40.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:44:40.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:44:40.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:44:40.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:40.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:40.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:40.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:44:40.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:40.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:44:40.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:40.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:44:40.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:44:40.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:40.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:40.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:40.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:44:40.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:40.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:44:40.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:40.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:44:40.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:44:40.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:40.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:40.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:40.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:44:40.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:40.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:44:40.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:44:40.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:44:40.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:44:40.401 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:44:40.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:40.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:40.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:40.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:44:40.874 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:44:40.923 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:44:40.925 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:44:40.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:40.929 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:44:40.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.342 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:44:41.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:41.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:41.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:41.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:41.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.815 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:44:41.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:42.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:42.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:42.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:42.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:42.284 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:44:42.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:42.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:42.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:42.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:42.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:42.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:42.294 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:42.294 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.295 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.296 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.296 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.296 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.296 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.296 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.297 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.297 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.297 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.297 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.297 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.297 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.298 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.298 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.298 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.298 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.298 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.299 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.299 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.299 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.299 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.299 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:42.299 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:47.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:47.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:47.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:47.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:47.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:47.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:47.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:47.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:47.304 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:47.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:47.305 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:44:47.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:44:47.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:44:47.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:47.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:47.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:47.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:44:47.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:47.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:44:47.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:47.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:44:47.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:44:47.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:47.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:47.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:47.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:44:47.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:47.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:44:47.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:47.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:44:47.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:44:47.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:47.317 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:47.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:47.317 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:44:47.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:47.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:44:47.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:44:47.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:44:47.321 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:44:47.321 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:47.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.326 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:44:47.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:44:47.843 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:44:47.845 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:44:47.847 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:44:47.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:47.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:47.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:44:48.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:48.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:48.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:48.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:48.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.736 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:44:48.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:49.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:49.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:49.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:49.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:49.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:49.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:44:49.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:49.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:49.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:49.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:49.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:49.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:49.209 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:49.209 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.210 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.210 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.210 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.210 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.210 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.210 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.211 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.211 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.211 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.211 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.211 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.212 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.212 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.212 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.212 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.212 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.212 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.213 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.214 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:49.215 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:54.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:54.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:54.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:54.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:54.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:54.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:54.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:54.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:54.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:54.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:44:54.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:44:54.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:44:54.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:44:54.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:54.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:54.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:54.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:44:54.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:44:54.228 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:44:54.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:54.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:44:54.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:44:54.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:54.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:54.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:54.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:44:54.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:44:54.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:44:54.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:54.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:44:54.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:44:54.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:54.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:44:54.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:54.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:44:54.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:44:54.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:44:54.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:54.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:44:54.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:44:54.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.238 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:44:54.238 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:44:54.239 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:44:54.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.243 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:44:54.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:44:54.756 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:44:54.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:54.759 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:44:54.762 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:44:54.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:44:54.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:54.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:54.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:54.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:44:55.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:55.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:55.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:55.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:55.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.659 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:44:55.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:55.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:56.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:56.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:56.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:44:56.130 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:44:56.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:44:56.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:44:56.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:44:56.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:44:56.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:44:56.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:44:56.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:44:56.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:44:56.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:44:56.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:44:56.133 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:44:56.133 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:56.133 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:56.133 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:44:56.133 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:01.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:01.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:01.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:01.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:01.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:01.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:01.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:01.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:01.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:01.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:01.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:01.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:01.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:01.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:01.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:01.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:01.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:01.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:01.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:01.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:01.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:01.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:01.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:01.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:01.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:01.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:01.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:01.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:01.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:01.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:01.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:01.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:01.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:01.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:01.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:01.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:01.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:01.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:01.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:01.151 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:01.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:01.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:01.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:01.631 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:01.671 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:01.673 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:01.674 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:01.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:01.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:01.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:01.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:01.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:45:02.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:02.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:02.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:02.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:02.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:45:02.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:02.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:03.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:03.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:03.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:03.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:03.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:03.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:03.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:03.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:03.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:03.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:03.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:03.034 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:03.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:03.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:08.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:08.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:08.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:08.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:08.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:08.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:08.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:08.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:08.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:08.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:08.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:08.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:08.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:08.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:08.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:08.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:08.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:08.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:08.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:08.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:08.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:08.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:08.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:08.063 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:08.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:08.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:08.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:08.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:08.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:08.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:08.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:08.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:08.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:08.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:08.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:08.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:08.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:08.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:08.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:08.071 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:08.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:08.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:08.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:08.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:08.076 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:08.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:08.587 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:08.589 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:08.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.590 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:08.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:08.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:08.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:08.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:08.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:08.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:08.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:08.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:08.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:08.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:08.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:08.710 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:08.711 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:08.711 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:08.711 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:08.711 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:08.711 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:08.711 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:13.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:13.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:13.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:13.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:13.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:13.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:13.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:13.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:13.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:13.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:13.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:13.729 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:13.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:13.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:13.730 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:13.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:13.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:13.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:13.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:13.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:13.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:13.735 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:13.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:13.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:13.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:13.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:13.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:13.737 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:13.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:13.739 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:13.739 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:13.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:13.739 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:13.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:13.740 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:13.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:13.740 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:13.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:13.744 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:13.744 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:13.744 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:13.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:13.749 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:14.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:14.260 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:14.261 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:14.262 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:14.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:14.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:14.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:14.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:14.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:14.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:14.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:14.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:14.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:14.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:14.399 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:14.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:19.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:19.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:19.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:19.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:19.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:19.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:19.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:19.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:19.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:19.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:19.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:19.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:19.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:19.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:19.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:19.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:19.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:19.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:19.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:19.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:19.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:19.426 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:19.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:19.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:19.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:19.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:19.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:19.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:19.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:19.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:19.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:19.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:19.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:19.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:19.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:19.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:19.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:19.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:19.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:19.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:19.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:19.435 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:19.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:19.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:19.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:19.916 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:19.950 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:19.951 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:19.952 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:19.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:19.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:19.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:20.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:20.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:20.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:20.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:20.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:20.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:20.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:20.066 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:20.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:20.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:20.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:20.066 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:20.066 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:20.066 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:20.066 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:20.066 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:20.066 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:25.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:25.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:25.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:25.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:25.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:25.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:25.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:25.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:25.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:25.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:25.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:25.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:25.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:25.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:25.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:25.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:25.088 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:25.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:25.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:25.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:25.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:25.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:25.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:25.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:25.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:25.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:25.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:25.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:25.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:25.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:25.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:25.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:25.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:25.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:25.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:25.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:25.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:25.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:25.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:25.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:25.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:25.098 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:25.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:25.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:25.103 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:25.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:25.623 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:25.625 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:25.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.627 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:25.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:25.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:25.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:25.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:25.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:25.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:25.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:25.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:25.729 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:25.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:25.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:25.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:25.729 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:25.729 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:25.729 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:25.729 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:25.729 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:25.730 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:30.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:30.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:30.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:30.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:30.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:30.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:30.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:30.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:30.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:30.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:30.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:30.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:30.746 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:30.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:30.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:30.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:30.747 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:30.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:30.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:30.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:30.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:30.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:30.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:30.750 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:30.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:30.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:30.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:30.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:30.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:30.752 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:30.752 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:30.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:30.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:30.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:30.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:30.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:30.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:30.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:30.755 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:30.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:30.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:30.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:30.755 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:30.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:30.756 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:30.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:30.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:30.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:30.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:31.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:31.276 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:31.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.279 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:31.283 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:31.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:31.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:31.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:31.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:31.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:31.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:31.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:31.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:31.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:31.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:31.399 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:31.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:31.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:31.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:31.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:31.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:31.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:31.400 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:36.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:36.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:36.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:36.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:36.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:36.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:36.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:36.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:36.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:36.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:36.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:36.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:36.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:36.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:36.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:36.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:36.420 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:36.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:36.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:36.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:36.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:36.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:36.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:36.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:36.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:36.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:36.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:36.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:36.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:36.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:36.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:36.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:36.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:36.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:36.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:36.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:36.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:36.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:36.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:36.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:36.429 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:36.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:36.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:36.951 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:36.953 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:36.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:36.955 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:36.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:36.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:36.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:36.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:37.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:37.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:37.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:37.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:37.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:37.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:37.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:37.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:37.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:37.091 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:37.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:42.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:42.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:42.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:42.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:42.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:42.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:42.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:42.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:42.107 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:42.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:42.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:42.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:42.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:42.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:42.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:42.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:42.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:42.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:42.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:42.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:42.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:42.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:42.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:42.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:42.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:42.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:42.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:42.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:42.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:42.125 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:42.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:42.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:42.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:42.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:42.126 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:42.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:42.126 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:42.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:42.129 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:42.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:42.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:42.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.130 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:42.130 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:42.130 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:42.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:42.135 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:42.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:42.654 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:42.656 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:42.658 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:42.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:42.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:42.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:42.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:42.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:42.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:42.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:42.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:42.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:42.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:42.774 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:42.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:42.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:47.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:47.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:47.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:47.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:47.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:47.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:47.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:47.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:47.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:47.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:47.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:47.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:47.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:47.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:47.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:47.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:47.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:47.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:47.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:47.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:47.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:47.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:47.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:47.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:47.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:47.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:47.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:47.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:47.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:47.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:47.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:47.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:47.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:47.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:47.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:47.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:47.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:47.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:47.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:47.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:47.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:47.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:47.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:47.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:47.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:47.805 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:47.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:47.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:47.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:48.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:48.330 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:48.333 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:48.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:48.336 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:48.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:45:48.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:45:48.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:45:48.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:45:48.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:45:48.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:45:48.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:45:48.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:45:48.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:45:48.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:48.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:48.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:48.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:49.209 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:45:49.678 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:45:49.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:49.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:49.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:49.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:50.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:45:50.612 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:45:50.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:50.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:50.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:50.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:51.081 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:45:51.549 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:45:51.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:45:51.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:45:51.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:51.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:51.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:51.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:51.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:51.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:51.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:51.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:51.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:51.789 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:51.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:51.789 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.789 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.789 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.789 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.790 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:51.791 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=870 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:45:56.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:56.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:56.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:56.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:56.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:56.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:56.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:56.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:56.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:56.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:45:56.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:45:56.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:45:56.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:45:56.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:56.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:56.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:56.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:45:56.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:45:56.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:45:56.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:56.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:45:56.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:45:56.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:56.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:56.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:56.820 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:45:56.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:45:56.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:45:56.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:56.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:45:56.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:45:56.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:56.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:45:56.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:45:56.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:45:56.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:45:56.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:45:56.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:56.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:45:56.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:45:56.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:45:56.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:45:56.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:45:56.827 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:45:56.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:45:56.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:45:57.310 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:45:57.344 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:45:57.345 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:45:57.346 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:45:57.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:57.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:45:57.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:45:57.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:45:57.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:45:57.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:45:57.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:45:57.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:45:57.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:45:57.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 03:45:57.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:45:57.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:45:57.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:45:57.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:45:57.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:45:57.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:57.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:57.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:57.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:57.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:45:57.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:45:57.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:45:57.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:45:57.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:45:57.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:45:57.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:45:57.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:45:57.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:45:57.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:45:57.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:45:57.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:45:57.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:45:57.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:45:57.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:45:57.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:45:57.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:45:57.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:45:57.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:45:57.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:45:57.972 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:45:57.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:45:57.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:02.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:02.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:02.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:02.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:02.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:02.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:02.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:02.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:02.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:02.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:02.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:46:02.996 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:46:02.997 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:46:02.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:02.997 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:02.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:02.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:46:03.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:03.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:46:03.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:03.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:46:03.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:46:03.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:03.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:03.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:03.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:46:03.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:03.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:46:03.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:03.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:46:03.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:46:03.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:03.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:03.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:03.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:46:03.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:03.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:46:03.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:46:03.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:46:03.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:46:03.013 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:46:03.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:46:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:03.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:03.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:46:03.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:46:03.541 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:46:03.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:03.544 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:46:03.546 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:46:03.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:03.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:03.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:03.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:03.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:03.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:03.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:03.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:03.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 03:46:03.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:03.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:03.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:03.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:03.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:03.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:03.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:03.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:03.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:03.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:03.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:03.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:03.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:46:04.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:04.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:04.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:04.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:46:04.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:46:05.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:05.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:05.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:05.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:05.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:46:05.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-02 03:46:06.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:06.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:06.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:06.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:06.281 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-02 03:46:06.753 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-02 03:46:07.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:07.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:07.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:07.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:07.225 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-02 03:46:07.695 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-02 03:46:08.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:08.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:08.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:08.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:08.166 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-02 03:46:08.638 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-02 03:46:09.111 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-02 03:46:09.585 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-02 03:46:10.056 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-02 03:46:10.530 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-02 03:46:11.005 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-02 03:46:11.478 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-02 03:46:11.952 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-02 03:46:12.418 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-02 03:46:12.883 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-02 03:46:13.350 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-02 03:46:13.817 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-02 03:46:14.282 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-02 03:46:14.751 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-02 03:46:15.216 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-02 03:46:15.685 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-02 03:46:16.151 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-02 03:46:16.616 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-02 03:46:17.083 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-02 03:46:17.554 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-02 03:46:18.021 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-02 03:46:18.492 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-02 03:46:18.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:18.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:18.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:18.787 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.787 [WARNING] transceiver.py:257 (MS@172.18.244.22:6700) RX TRXD message (fn=3432 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:18.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:18.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:18.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:18.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:18.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:18.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:18.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:18.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:18.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:18.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:18.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:18.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:18.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:18.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:18.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:18.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:18.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:18.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:18.832 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:46:18.832 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.833 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.833 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.833 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.833 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.833 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.834 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.834 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.834 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.834 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.834 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.834 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.835 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:18.836 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:23.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:23.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:23.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:23.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:23.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:23.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:23.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:23.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:23.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:23.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:23.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:46:23.854 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:46:23.854 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:46:23.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:23.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:23.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:23.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:46:23.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:23.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:46:23.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:23.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:46:23.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:46:23.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:23.859 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:23.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:23.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:46:23.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:23.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:46:23.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:23.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:46:23.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:46:23.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:23.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:23.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:23.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:46:23.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:23.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:46:23.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:46:23.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:46:23.867 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:46:23.867 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:23.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:23.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:23.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:23.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:46:24.350 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:46:24.382 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:46:24.383 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:46:24.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:24.385 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:46:24.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:24.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:24.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:24.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:24.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:24.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:24.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:24.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:24.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 03:46:24.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:24.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:24.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:24.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:24.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:24.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 03:46:24.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:24.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:24.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:24.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:24.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:24.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:24.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:24.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:24.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:24.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:24.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:24.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:24.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:24.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:24.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:24.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:24.781 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:46:24.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:24.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:24.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:24.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:24.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:24.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:24.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:24.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:24.782 [WARNING] transceiver.py:257 (BTS@172.18.244.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-02 03:46:29.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:29.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:29.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:29.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:29.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:29.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:29.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:29.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:29.799 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:29.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:29.800 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:46:29.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:46:29.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:46:29.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:29.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:29.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:46:29.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:29.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:46:29.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:29.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:46:29.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:46:29.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:29.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:29.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:29.809 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:46:29.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:29.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:46:29.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:29.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:46:29.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:46:29.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:29.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:29.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:29.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:46:29.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:29.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:46:29.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:29.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:46:29.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:46:29.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:46:29.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:46:29.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:46:29.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:46:29.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:46:29.815 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:46:29.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:29.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:29.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-02 03:46:30.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-02 03:46:30.336 [DEBUG] fake_trx.py:278 (BTS@172.18.244.20:5700) Recv FAKE_TOA cmd
2026-03-02 03:46:30.338 [DEBUG] fake_trx.py:297 (BTS@172.18.244.20:5700) Recv FAKE_RSSI cmd
2026-03-02 03:46:30.340 [DEBUG] fake_trx.py:322 (BTS@172.18.244.20:5700) Recv FAKE_CI cmd
2026-03-02 03:46:30.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:30.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:30.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:30.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:30.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:30.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:30.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:30.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:30.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD HANDOVER
2026-03-02 03:46:30.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:30.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:30.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:30.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:30.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-02 03:46:30.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:31.225 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-02 03:46:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-02 03:46:31.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:31.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:31.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:31.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:32.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-02 03:46:32.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:32.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:32.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:32.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD ECHO
2026-03-02 03:46:32.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.244.22:6700) Ignore CMD SETSLOT
2026-03-02 03:46:32.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.244.22:6700) Recv RXTUNE cmd
2026-03-02 03:46:32.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.244.22:6700) Recv TXTUNE cmd
2026-03-02 03:46:32.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.244.22:6700) Recv POWERON CMD
2026-03-02 03:46:32.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.244.22:6700) Starting transceiver...
2026-03-02 03:46:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD NOHANDOVER
2026-03-02 03:46:32.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.244.22:6700) Recv POWEROFF cmd
2026-03-02 03:46:32.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.244.22:6700) Stopping transceiver...
2026-03-02 03:46:32.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:32.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:32.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:32.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:32.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:32.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:32.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:32.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:32.456 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:46:32.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:32.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:37.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:37.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:37.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:37.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:37.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:37.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:37.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:37.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:37.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:37.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:37.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:46:37.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:46:37.466 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:46:37.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:37.466 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:37.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:37.467 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:46:37.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:37.467 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:46:37.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:37.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:46:37.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:46:37.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:37.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:37.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:37.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:46:37.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:37.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:46:37.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:37.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:46:37.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:46:37.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:37.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:37.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:37.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:46:37.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:37.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:46:37.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:46:37.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:46:37.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:46:37.478 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:46:37.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:37.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:37.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:37.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:37.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:37.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:37.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:37.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:37.480 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:46:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:37.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:42.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:42.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:42.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:42.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:42.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:42.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:42.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:42.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.244.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:42.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.244.20:5700) Recv SETFORMAT cmd
2026-03-02 03:46:42.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.244.20:5700) TRXD header version 1 -> 1
2026-03-02 03:46:42.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.244.20:5700/1) Recv RXTUNE cmd
2026-03-02 03:46:42.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.244.20:5700/1) Recv TXTUNE cmd
2026-03-02 03:46:42.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:42.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.244.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:42.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:42.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.244.20:5700/1) Recv NOMTXPOWER cmd
2026-03-02 03:46:42.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.244.20:5700/1) Recv SETFORMAT cmd
2026-03-02 03:46:42.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.244.20:5700/1) TRXD header version 1 -> 1
2026-03-02 03:46:42.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.244.20:5700/1) Recv SETPOWER cmd
2026-03-02 03:46:42.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.244.20:5700/2) Recv RXTUNE cmd
2026-03-02 03:46:42.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.244.20:5700/2) Recv TXTUNE cmd
2026-03-02 03:46:42.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:42.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.244.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:42.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:42.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.244.20:5700/2) Recv NOMTXPOWER cmd
2026-03-02 03:46:42.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.244.20:5700/2) Recv SETFORMAT cmd
2026-03-02 03:46:42.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.244.20:5700/2) TRXD header version 1 -> 1
2026-03-02 03:46:42.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.244.20:5700/2) Recv SETPOWER cmd
2026-03-02 03:46:42.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.244.20:5700/3) Recv RXTUNE cmd
2026-03-02 03:46:42.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.244.20:5700/3) Recv TXTUNE cmd
2026-03-02 03:46:42.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:42.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.244.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-02 03:46:42.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.244.20:5700/3) Recv RFMUTE cmd
2026-03-02 03:46:42.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.244.20:5700/3) Recv NOMTXPOWER cmd
2026-03-02 03:46:42.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.244.20:5700/3) Recv SETFORMAT cmd
2026-03-02 03:46:42.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.244.20:5700/3) TRXD header version 1 -> 1
2026-03-02 03:46:42.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.244.20:5700/3) Recv SETPOWER cmd
2026-03-02 03:46:42.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.244.20:5700) Recv RXTUNE cmd
2026-03-02 03:46:42.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETTSC
2026-03-02 03:46:42.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETTSC
2026-03-02 03:46:42.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETTSC
2026-03-02 03:46:42.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.244.20:5700) Recv TXTUNE cmd
2026-03-02 03:46:42.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETRXGAIN
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETTSC
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETRXGAIN
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETRXGAIN
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.244.20:5700) Recv NOMTXPOWER cmd
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.244.20:5700) Recv SETPOWER cmd
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.244.20:5700) Recv POWERON CMD
2026-03-02 03:46:42.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.244.20:5700) Starting transceiver...
2026-03-02 03:46:42.502 [INFO] transceiver.py:243 Starting clock generator
2026-03-02 03:46:42.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETRXGAIN
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.244.20:5700/1) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.244.20:5700/1) Recv RFMUTE cmd
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.244.20:5700) Ignore CMD SETSLOT
2026-03-02 03:46:42.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.244.20:5700/2) Ignore CMD SETSLOT
2026-03-02 03:46:42.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.244.20:5700) Recv RFMUTE cmd
2026-03-02 03:46:42.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT
2026-03-02 03:46:42.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.244.20:5700) Recv POWEROFF cmd
2026-03-02 03:46:42.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.244.20:5700) Stopping transceiver...
2026-03-02 03:46:42.505 [INFO] transceiver.py:246 Stopping clock generator
2026-03-02 03:46:42.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.244.20:5700/2) Recv RFMUTE cmd
2026-03-02 03:46:42.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.244.20:5700/3) Ignore CMD SETSLOT